About the Execution of ITS-Tools.L for ResAllocation-PT-R100C002
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15757.660 | 8936.00 | 22276.00 | 325.10 | T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
............................
/home/mcc/execution
total 572K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.1K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 404K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is ResAllocation-PT-R100C002, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r141-qhx2-152673583100419
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityDeadlock-0
=== Now, execution of the tool begins
BK_START 1527933183011
Flatten gal took : 183 ms
Performed 2 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 400 transition count 200
Constant places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 5 place count 397 transition count 200
Applied a total of 5 rules in 69 ms. Remains 397 /400 variables (removed 3) and now considering 200/202 (removed 2) transitions.
// Phase 1: matrix 200 rows 397 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph4263897059674315921.txt, -o, /tmp/graph4263897059674315921.bin, -w, /tmp/graph4263897059674315921.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph4263897059674315921.bin, -l, -1, -v, -w, /tmp/graph4263897059674315921.weights, -q, 0, -e, 0.001], workingDir=null]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 200 rows 397 cols
invariant :p_0_71 + r_0_71 + -1'r_1_71 = 0
invariant :p_1_28 + r_1_28 = 1
invariant :p_1_52 + r_1_52 = 1
invariant :p_1_96 + r_1_96 = 1
invariant :p_0_57 + r_0_57 + -1'r_1_57 = 0
invariant :p_0_5 + r_0_5 + -1'r_1_5 = 0
invariant :p_1_70 + r_1_70 = 1
invariant :p_0_22 + r_0_22 + -1'r_1_22 = 0
invariant :p_0_72 + r_0_72 + -1'r_1_72 = 0
invariant :p_1_69 + r_1_69 = 1
invariant :p_0_45 + r_0_45 + -1'r_1_45 = 0
invariant :p_1_12 + r_1_12 = 1
invariant :p_1_33 + r_1_33 = 1
invariant :p_0_51 + r_0_51 + -1'r_1_51 = 0
invariant :p_0_91 + r_0_91 + -1'r_1_91 = 0
invariant :p_0_0 + r_0_0 = 1
invariant :p_0_26 + r_0_26 + -1'r_1_26 = 0
invariant :p_1_94 + r_1_94 = 1
invariant :p_0_84 + r_0_84 + -1'r_1_84 = 0
invariant :p_1_2 + r_1_2 = 1
invariant :p_1_95 + r_1_95 = 1
invariant :p_0_70 + r_0_70 + -1'r_1_70 = 0
invariant :p_0_75 + r_0_75 + -1'r_1_75 = 0
invariant :p_1_81 + r_1_81 = 1
invariant :p_1_55 + r_1_55 = 1
invariant :p_0_20 + r_0_20 + -1'r_1_20 = 0
invariant :p_0_41 + r_0_41 + -1'r_1_41 = 0
invariant :p_1_83 + r_1_83 = 1
invariant :p_1_13 + r_1_13 = 1
invariant :p_0_40 + r_0_40 + -1'r_1_40 = 0
invariant :p_1_30 + r_1_30 = 1
invariant :p_1_47 + r_1_47 = 1
invariant :p_1_44 + r_1_44 = 1
invariant :p_0_8 + r_0_8 + -1'r_1_8 = 0
invariant :p_0_46 + r_0_46 + -1'r_1_46 = 0
invariant :p_0_47 + r_0_47 + -1'r_1_47 = 0
invariant :p_0_17 + r_0_17 + -1'r_1_17 = 0
invariant :p_0_94 + r_0_94 + -1'r_1_94 = 0
invariant :p_1_51 + r_1_51 = 1
invariant :p_0_52 + r_0_52 + -1'r_1_52 = 0
invariant :p_0_96 + r_0_96 + -1'r_1_96 = 0
invariant :p_1_56 + r_1_56 = 1
invariant :p_1_21 + r_1_21 = 1
invariant :p_0_18 + r_0_18 + -1'r_1_18 = 0
invariant :p_1_19 + r_1_19 = 1
invariant :p_0_35 + r_0_35 + -1'r_1_35 = 0
invariant :p_0_74 + r_0_74 + -1'r_1_74 = 0
invariant :p_1_48 + r_1_48 = 1
invariant :p_0_64 + r_0_64 + -1'r_1_64 = 0
invariant :p_0_93 + r_0_93 + -1'r_1_93 = 0
invariant :p_0_86 + r_0_86 + -1'r_1_86 = 0
invariant :p_0_11 + r_0_11 + -1'r_1_11 = 0
invariant :p_0_38 + r_0_38 + -1'r_1_38 = 0
invariant :p_1_9 + r_1_9 = 1
invariant :p_1_88 + r_1_88 = 1
invariant :p_1_65 + r_1_65 = 1
invariant :p_1_66 + r_1_66 = 1
invariant :p_1_78 + r_1_78 = 1
invariant :p_0_76 + r_0_76 + -1'r_1_76 = 0
invariant :p_0_21 + r_0_21 + -1'r_1_21 = 0
invariant :p_1_32 + r_1_32 = 1
invariant :p_1_37 + r_1_37 = 1
invariant :p_1_86 + r_1_86 = 1
invariant :p_0_25 + r_0_25 + -1'r_1_25 = 0
invariant :p_1_80 + r_1_80 = 1
invariant :p_0_31 + r_0_31 + -1'r_1_31 = 0
invariant :p_0_90 + r_0_90 + -1'r_1_90 = 0
invariant :p_1_77 + r_1_77 = 1
invariant :p_0_42 + r_0_42 + -1'r_1_42 = 0
invariant :p_0_69 + r_0_69 + -1'r_1_69 = 0
invariant :p_0_83 + r_0_83 + -1'r_1_83 = 0
invariant :p_1_14 + r_1_14 = 1
invariant :p_1_72 + r_1_72 = 1
invariant :p_0_88 + r_0_88 + -1'r_1_88 = 0
invariant :p_1_71 + r_1_71 = 1
invariant :p_1_22 + r_1_22 = 1
invariant :p_0_1 + r_0_1 + -1'r_1_1 = 0
invariant :p_0_32 + r_0_32 + -1'r_1_32 = 0
invariant :p_0_82 + r_0_82 + -1'r_1_82 = 0
invariant :p_1_20 + r_1_20 = 1
invariant :p_0_12 + r_0_12 + -1'r_1_12 = 0
invariant :p_0_61 + r_0_61 + -1'r_1_61 = 0
invariant :p_0_13 + r_0_13 + -1'r_1_13 = 0
invariant :p_0_44 + r_0_44 + -1'r_1_44 = 0
invariant :p_0_23 + r_0_23 + -1'r_1_23 = 0
invariant :p_1_31 + r_1_31 = 1
invariant :p_0_79 + r_0_79 + -1'r_1_79 = 0
invariant :p_0_67 + r_0_67 + -1'r_1_67 = 0
invariant :p_1_93 + r_1_93 = 1
invariant :p_1_7 + r_1_7 = 1
invariant :p_1_34 + r_1_34 = 1
invariant :p_0_34 + r_0_34 + -1'r_1_34 = 0
invariant :p_0_62 + r_0_62 + -1'r_1_62 = 0
invariant :p_1_3 + r_1_3 = 1
invariant :p_0_50 + r_0_50 + -1'r_1_50 = 0
invariant :p_1_41 + r_1_41 = 1
invariant :p_1_62 + r_1_62 = 1
invariant :p_0_68 + r_0_68 + -1'r_1_68 = 0
invariant :p_1_97 + r_1_97 = 1
invariant :p_1_10 + r_1_10 = 1
invariant :p_0_15 + r_0_15 + -1'r_1_15 = 0
invariant :p_0_98 + r_0_98 + -1'r_1_98 = 0
invariant :p_0_9 + r_0_9 + -1'r_1_9 = 0
invariant :p_0_97 + r_0_97 + -1'r_1_97 = 0
invariant :p_0_63 + r_0_63 + -1'r_1_63 = 0
invariant :p_1_26 + r_1_26 = 1
invariant :p_0_78 + r_0_78 + -1'r_1_78 = 0
invariant :p_0_27 + r_0_27 + -1'r_1_27 = 0
invariant :p_0_54 + r_0_54 + -1'r_1_54 = 0
invariant :p_1_36 + r_1_36 = 1
invariant :p_0_55 + r_0_55 + -1'r_1_55 = 0
invariant :p_0_81 + r_0_81 + -1'r_1_81 = 0
invariant :p_1_5 + r_1_5 = 1
invariant :p_1_42 + r_1_42 = 1
invariant :p_1_24 + r_1_24 = 1
invariant :p_1_57 + r_1_57 = 1
invariant :p_1_87 + r_1_87 = 1
invariant :p_1_79 + r_1_79 = 1
invariant :p_0_37 + r_0_37 + -1'r_1_37 = 0
invariant :p_0_3 + r_0_3 + -1'r_1_3 = 0
invariant :p_0_7 + r_0_7 + -1'r_1_7 = 0
invariant :p_1_98 + r_1_98 = 1
invariant :p_1_99 + r_1_99 = 1
invariant :p_1_25 + r_1_25 = 1
invariant :p_1_85 + r_1_85 = 1
invariant :p_0_24 + r_0_24 + -1'r_1_24 = 0
invariant :p_0_36 + r_0_36 + -1'r_1_36 = 0
invariant :p_0_14 + r_0_14 + -1'r_1_14 = 0
invariant :p_0_92 + r_0_92 + -1'r_1_92 = 0
invariant :p_1_68 + r_1_68 = 1
invariant :p_1_67 + r_1_67 = 1
invariant :p_0_4 + r_0_4 + -1'r_1_4 = 0
invariant :p_1_8 + r_1_8 = 1
invariant :p_1_38 + r_1_38 = 1
invariant :p_1_23 + r_1_23 = 1
invariant :p_1_15 + r_1_15 = 1
invariant :p_0_65 + r_0_65 + -1'r_1_65 = 0
invariant :p_0_56 + r_0_56 + -1'r_1_56 = 0
invariant :p_1_35 + r_1_35 = 1
invariant :p_0_29 + r_0_29 + -1'r_1_29 = 0
invariant :p_1_17 + r_1_17 = 1
invariant :p_1_61 + r_1_61 = 1
invariant :p_1_90 + r_1_90 = 1
invariant :p_0_2 + r_0_2 + -1'r_1_2 = 0
invariant :p_1_50 + r_1_50 = 1
invariant :p_0_39 + r_0_39 + -1'r_1_39 = 0
invariant :p_1_76 + r_1_76 = 1
invariant :p_0_59 + r_0_59 + -1'r_1_59 = 0
invariant :p_1_29 + r_1_29 = 1
invariant :p_0_85 + r_0_85 + -1'r_1_85 = 0
invariant :p_1_91 + r_1_91 = 1
invariant :p_1_40 + r_1_40 = 1
invariant :p_1_75 + r_1_75 = 1
invariant :p_0_6 + r_0_6 + -1'r_1_6 = 0
invariant :p_1_59 + r_1_59 = 1
invariant :p_0_66 + r_0_66 + -1'r_1_66 = 0
invariant :p_0_77 + r_0_77 + -1'r_1_77 = 0
invariant :p_0_89 + r_0_89 + -1'r_1_89 = 0
invariant :p_1_43 + r_1_43 = 1
invariant :p_0_49 + r_0_49 + -1'r_1_49 = 0
invariant :p_0_80 + r_0_80 + -1'r_1_80 = 0
invariant :p_1_89 + r_1_89 = 1
invariant :p_1_60 + r_1_60 = 1
invariant :p_1_27 + r_1_27 = 1
invariant :p_1_84 + r_1_84 = 1
invariant :p_1_6 + r_1_6 = 1
invariant :p_1_82 + r_1_82 = 1
invariant :r_0_99 + -1'r_1_99 = 0
invariant :p_0_10 + r_0_10 + -1'r_1_10 = 0
invariant :p_1_11 + r_1_11 = 1
invariant :p_1_1 + r_1_1 = 1
invariant :p_0_95 + r_0_95 + -1'r_1_95 = 0
invariant :p_1_45 + r_1_45 = 1
invariant :p_0_73 + r_0_73 + -1'r_1_73 = 0
invariant :p_1_16 + r_1_16 = 1
invariant :p_1_63 + r_1_63 = 1
invariant :p_1_58 + r_1_58 = 1
invariant :p_0_28 + r_0_28 + -1'r_1_28 = 0
invariant :p_0_30 + r_0_30 + -1'r_1_30 = 0
invariant :p_0_58 + r_0_58 + -1'r_1_58 = 0
invariant :p_0_43 + r_0_43 + -1'r_1_43 = 0
invariant :p_0_87 + r_0_87 + -1'r_1_87 = 0
invariant :p_1_64 + r_1_64 = 1
invariant :p_0_16 + r_0_16 + -1'r_1_16 = 0
invariant :p_1_18 + r_1_18 = 1
invariant :p_0_19 + r_0_19 + -1'r_1_19 = 0
invariant :p_1_39 + r_1_39 = 1
invariant :p_1_92 + r_1_92 = 1
invariant :p_1_53 + r_1_53 = 1
invariant :p_0_48 + r_0_48 + -1'r_1_48 = 0
invariant :p_1_49 + r_1_49 = 1
invariant :p_1_74 + r_1_74 = 1
invariant :p_1_46 + r_1_46 = 1
invariant :p_0_60 + r_0_60 + -1'r_1_60 = 0
invariant :p_1_73 + r_1_73 = 1
invariant :p_0_53 + r_0_53 + -1'r_1_53 = 0
invariant :p_1_54 + r_1_54 = 1
invariant :p_1_4 + r_1_4 = 1
invariant :p_0_33 + r_0_33 + -1'r_1_33 = 0
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
its-ctl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 25 ordering constraints for composite.
built 16 ordering constraints for composite.
built 14 ordering constraints for composite.
built 14 ordering constraints for composite.
built 20 ordering constraints for composite.
built 14 ordering constraints for composite.
built 22 ordering constraints for composite.
built 16 ordering constraints for composite.
built 16 ordering constraints for composite.
built 14 ordering constraints for composite.
built 20 ordering constraints for composite.
built 16 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,6.33825e+31,0.937344,18144,146,8,34092,135,261,33143,19,126,0
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,99,0.96008,18144,118,7,34092,135,794,33143,65,126,2438
System contains 99 deadlocks (shown below if less than --print-limit option) !
FORMULA ResAllocation-PT-R100C002-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 99 states ] showing 10 first states
[ i12={[ u197={[ p_1_99=1 ]
} u196={[ p_1_98=1 ]
} u98={[ ]
} u195={[ p_1_97=1 ]
} u97={[ ]
} u194={[ p_1_96=1 ]
} u96={[ ]
} u193={[ p_1_95=1 ]
} u95={[ ]
} u192={[ p_1_94=1 ]
} u94={[ ]
} u191={[ p_1_93=1 ]
} u93={[ ]
} u190={[ p_1_92=1 ]
} u92={[ ]
} u189={[ p_1_91=1 ]
} u91={[ ]
} u188={[ r_1_90=1 ]
} u90={[ p_0_90=1 ]
} ]
[ u197={[ p_1_99=1 ]
} u196={[ p_1_98=1 ]
} u98={[ ]
} u195={[ p_1_97=1 ]
} u97={[ ]
} u194={[ p_1_96=1 ]
} u96={[ ]
} u193={[ p_1_95=1 ]
} u95={[ ]
} u192={[ p_1_94=1 ]
} u94={[ ]
} u191={[ p_1_93=1 ]
} u93={[ ]
} u190={[ p_1_92=1 ]
} u92={[ ]
} u189={[ r_1_91=1 ]
} u91={[ p_0_91=1 ]
} u188={[ r_1_90=1 ]
} u90={[ p_0_90=1 ]
} ]
[ u197={[ p_1_99=1 ]
} u196={[ p_1_98=1 ]
} u98={[ ]
} u195={[ p_1_97=1 ]
} u97={[ ]
} u194={[ p_1_96=1 ]
} u96={[ ]
} u193={[ p_1_95=1 ]
} u95={[ ]
} u192={[ p_1_94=1 ]
} u94={[ ]
} u191={[ p_1_93=1 ]
} u93={[ ]
} u190={[ r_1_92=1 ]
} u92={[ p_0_92=1 ]
} u189={[ r_1_91=1 ]
} u91={[ p_0_91=1 ]
} u188={[ r_1_90=1 ]
} u90={[ p_0_90=1 ]
} ]
[ u197={[ p_1_99=1 ]
} u196={[ p_1_98=1 ]
} u98={[ ]
} u195={[ p_1_97=1 ]
} u97={[ ]
} u194={[ p_1_96=1 ]
} u96={[ ]
} u193={[ p_1_95=1 ]
} u95={[ ]
} u192={[ p_1_94=1 ]
} u94={[ ]
} u191={[ r_1_93=1 ]
} u93={[ p_0_93=1 ]
} u190={[ r_1_92=1 ]
} u92={[ p_0_92=1 ]
} u189={[ r_1_91=1 ]
} u91={[ p_0_91=1 ]
} u188={[ r_1_90=1 ]
} u90={[ p_0_90=1 ]
} ]
[ u197={[ p_1_99=1 ]
} u196={[ p_1_98=1 ]
} u98={[ ]
} u195={[ p_1_97=1 ]
} u97={[ ]
} u194={[ p_1_96=1 ]
} u96={[ ]
} u193={[ p_1_95=1 ]
} u95={[ ]
} u192={[ r_1_94=1 ]
} u94={[ p_0_94=1 ]
} u191={[ r_1_93=1 ]
} u93={[ p_0_93=1 ]
} u190={[ r_1_92=1 ]
} u92={[ p_0_92=1 ]
} u189={[ r_1_91=1 ]
} u91={[ p_0_91=1 ]
} u188={[ r_1_90=1 ]
} u90={[ p_0_90=1 ]
} ]
[ u197={[ p_1_99=1 ]
} u196={[ p_1_98=1 ]
} u98={[ ]
} u195={[ p_1_97=1 ]
} u97={[ ]
} u194={[ p_1_96=1 ]
} u96={[ ]
} u193={[ r_1_95=1 ]
} u95={[ p_0_95=1 ]
} u192={[ r_1_94=1 ]
} u94={[ p_0_94=1 ]
} u191={[ r_1_93=1 ]
} u93={[ p_0_93=1 ]
} u190={[ r_1_92=1 ]
} u92={[ p_0_92=1 ]
} u189={[ r_1_91=1 ]
} u91={[ p_0_91=1 ]
} u188={[ r_1_90=1 ]
} u90={[ p_0_90=1 ]
} ]
[ u197={[ p_1_99=1 ]
} u196={[ p_1_98=1 ]
} u98={[ ]
} u195={[ p_1_97=1 ]
} u97={[ ]
} u194={[ r_1_96=1 ]
} u96={[ p_0_96=1 ]
} u193={[ r_1_95=1 ]
} u95={[ p_0_95=1 ]
} u192={[ r_1_94=1 ]
} u94={[ p_0_94=1 ]
} u191={[ r_1_93=1 ]
} u93={[ p_0_93=1 ]
} u190={[ r_1_92=1 ]
} u92={[ p_0_92=1 ]
} u189={[ r_1_91=1 ]
} u91={[ p_0_91=1 ]
} u188={[ r_1_90=1 ]
} u90={[ p_0_90=1 ]
} ]
[ u197={[ p_1_99=1 ]
} u196={[ p_1_98=1 ]
} u98={[ ]
} u195={[ r_1_97=1 ]
} u97={[ p_0_97=1 ]
} u194={[ r_1_96=1 ]
} u96={[ p_0_96=1 ]
} u193={[ r_1_95=1 ]
} u95={[ p_0_95=1 ]
} u192={[ r_1_94=1 ]
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} ]
} i3={[ u126={[ p_1_28=1 ]
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} i2={[ u117={[ p_1_19=1 ]
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} ]
} i1={[ u111={[ p_1_13=1 ]
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} i0={[ u105={[ p_1_7=1 ]
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} ]
} ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1527933191947
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 9:53:06 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 02, 2018 9:53:06 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 9:53:06 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 174 ms
Jun 02, 2018 9:53:06 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 400 places.
Jun 02, 2018 9:53:06 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 202 transitions.
Jun 02, 2018 9:53:07 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 93 ms
Jun 02, 2018 9:53:07 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 176 ms
Jun 02, 2018 9:53:07 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 19 ms
Jun 02, 2018 9:53:07 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 202 transitions.
Jun 02, 2018 9:53:08 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 9:53:08 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 137 ms
Jun 02, 2018 9:53:08 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 200 transitions.
Jun 02, 2018 9:53:08 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 78 ms
Begin: Sat Jun 2 09:53:08 2018
Computation of communities with the Newman-Girvan Modularity quality function
level 0:
start computation: Sat Jun 2 09:53:08 2018
network size: 397 nodes, 1774 links, 400 weight
quality increased from -0.00294271 to 0.362567
end computation: Sat Jun 2 09:53:08 2018
level 1:
start computation: Sat Jun 2 09:53:08 2018
network size: 198 nodes, 1178 links, 400 weight
quality increased from 0.362567 to 0.758011
end computation: Sat Jun 2 09:53:08 2018
level 2:
start computation: Sat Jun 2 09:53:08 2018
network size: 42 nodes, 124 links, 400 weight
quality increased from 0.758011 to 0.8502
end computation: Sat Jun 2 09:53:08 2018
level 3:
start computation: Sat Jun 2 09:53:08 2018
network size: 19 nodes, 55 links, 400 weight
quality increased from 0.8502 to 0.856867
end computation: Sat Jun 2 09:53:08 2018
level 4:
start computation: Sat Jun 2 09:53:08 2018
network size: 13 nodes, 37 links, 400 weight
quality increased from 0.856867 to 0.856867
end computation: Sat Jun 2 09:53:08 2018
End: Sat Jun 2 09:53:08 2018
Total duration: 0 sec
0.856867
Jun 02, 2018 9:53:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 9:53:09 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 199 place invariants in 148 ms
Jun 02, 2018 9:53:09 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 129 ms
Jun 02, 2018 9:53:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 9:53:09 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 29 ms
Jun 02, 2018 9:53:10 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout :(error "Failed to check-sat")
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 02, 2018 9:53:10 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2299ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R100C002"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R100C002.tgz
mv ResAllocation-PT-R100C002 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is ResAllocation-PT-R100C002, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r141-qhx2-152673583100419"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;