Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 240K
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.7K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 68K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is ResAllocation-PT-R003C010, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r141-qhx2-152673583000350
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-00
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-01
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-02
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-03
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-04
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-05
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-06
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-07
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-08
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-09
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-10
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-11
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-12
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-13
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-14
FORMULA_NAME ResAllocation-PT-R003C010-ReachabilityFireability-15

=== Now, execution of the tool begins

BK_START 1527927676482

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph8209623523246166759.txt, -o, /tmp/graph8209623523246166759.bin, -w, /tmp/graph8209623523246166759.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph8209623523246166759.bin, -l, -1, -v, -w, /tmp/graph8209623523246166759.weights, -q, 0, -e, 0.001], workingDir=null]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 40 rows 60 cols
invariant :p_6_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 = 0
invariant :p_3_2 + r_3_2 + -1'r_4_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 = 1
invariant :p_4_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 = 0
invariant :p_5_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 = 1
invariant :p_1_1 + r_1_1 + -1'r_2_1 + r_3_1 + -1'r_4_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 = 1
invariant :p_7_2 + r_7_2 + -1'r_8_2 + r_9_2 = 1
invariant :p_9_2 + r_9_2 = 1
invariant :p_0_0 + r_0_0 + -1'r_1_0 + r_2_0 + -1'r_3_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 = 0
invariant :p_9_1 + r_9_1 = 1
invariant :p_9_0 + r_9_0 = 1
invariant :p_6_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 = 0
invariant :p_8_0 + r_8_0 + -1'r_9_0 = 0
invariant :p_8_2 + r_8_2 + -1'r_9_2 = 0
invariant :p_2_0 + r_2_0 + -1'r_3_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 = 0
invariant :p_2_2 + r_2_2 + -1'r_3_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 = 0
invariant :p_8_1 + r_8_1 + -1'r_9_1 = 0
invariant :p_1_2 + r_1_2 + -1'r_2_2 + r_3_2 + -1'r_4_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 = 1
invariant :p_3_1 + r_3_1 + -1'r_4_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 = 1
invariant :p_1_0 + r_1_0 + -1'r_2_0 + r_3_0 + -1'r_4_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 = 1
invariant :p_3_0 + r_3_0 + -1'r_4_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 = 1
invariant :p_5_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 = 1
invariant :p_0_1 + r_0_1 + -1'r_1_1 + r_2_1 + -1'r_3_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 = 0
invariant :p_5_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 = 1
invariant :p_2_1 + r_2_1 + -1'r_3_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 = 0
invariant :p_6_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 = 0
invariant :p_0_2 + r_0_2 + -1'r_1_2 + r_2_2 + -1'r_3_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 = 0
invariant :p_7_0 + r_7_0 + -1'r_8_0 + r_9_0 = 1
invariant :p_4_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 = 0
invariant :p_4_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 = 0
invariant :p_7_1 + r_7_1 + -1'r_8_1 + r_9_1 = 1
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-11 FALSE TECHNIQUES SAT_SMT TAUTOLOGY
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-12 FALSE TECHNIQUES SAT_SMT TAUTOLOGY
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-15 FALSE TECHNIQUES SAT_SMT TAUTOLOGY
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityFireability.pnml.gal, -t, CGAL, -reachable-file, ReachabilityFireability.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityFireability.pnml.gal -t CGAL -reachable-file ReachabilityFireability.prop --nowitness
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 40 rows 60 cols
invariant :p_6_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 = 0
invariant :p_3_2 + r_3_2 + -1'r_4_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 = 1
invariant :p_4_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 = 0
invariant :p_5_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 = 1
invariant :p_1_1 + r_1_1 + -1'r_2_1 + r_3_1 + -1'r_4_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 = 1
invariant :p_7_2 + r_7_2 + -1'r_8_2 + r_9_2 = 1
invariant :p_9_2 + r_9_2 = 1
invariant :p_0_0 + r_0_0 + -1'r_1_0 + r_2_0 + -1'r_3_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 = 0
invariant :p_9_1 + r_9_1 = 1
invariant :p_9_0 + r_9_0 = 1
invariant :p_6_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 = 0
invariant :p_8_0 + r_8_0 + -1'r_9_0 = 0
invariant :p_8_2 + r_8_2 + -1'r_9_2 = 0
invariant :p_2_0 + r_2_0 + -1'r_3_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 = 0
invariant :p_2_2 + r_2_2 + -1'r_3_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 = 0
invariant :p_8_1 + r_8_1 + -1'r_9_1 = 0
invariant :p_1_2 + r_1_2 + -1'r_2_2 + r_3_2 + -1'r_4_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 = 1
invariant :p_3_1 + r_3_1 + -1'r_4_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 = 1
invariant :p_1_0 + r_1_0 + -1'r_2_0 + r_3_0 + -1'r_4_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 = 1
invariant :p_3_0 + r_3_0 + -1'r_4_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 = 1
invariant :p_5_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 = 1
invariant :p_0_1 + r_0_1 + -1'r_1_1 + r_2_1 + -1'r_3_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 = 0
invariant :p_5_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 = 1
invariant :p_2_1 + r_2_1 + -1'r_3_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 = 0
invariant :p_6_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 = 0
invariant :p_0_2 + r_0_2 + -1'r_1_2 + r_2_2 + -1'r_3_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 = 0
invariant :p_7_0 + r_7_0 + -1'r_8_0 + r_9_0 = 1
invariant :p_4_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 = 0
invariant :p_4_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 = 0
invariant :p_7_1 + r_7_1 + -1'r_8_1 + r_9_1 = 1
Loading property file ReachabilityFireability.prop.
Read [invariant] property : ResAllocation-PT-R003C010-ReachabilityFireability-00 with value :(((((i2.u10.r_3_2>=1)&&(i2.u8.r_2_2>=1))||((i2.u14.p_6_2>=1)||(((i3.u9.r_3_0>=1)&&(i1.u7.p_3_1>=1))&&(i1.u6.r_2_0>=1))))||((i1.u0.r_0_0>=1)&&(!((i1.u0.p_0_0>=1)&&(i1.u1.r_0_1>=1)))))||(!(((((i4.u18.p_8_0>=1)&&(i5.u21.r_8_1>=1))&&(i5.u16.r_7_1>=1))||(i2.u14.p_6_2>=1))&&(((i0.u5.r_1_2>=1)&&(i0.u2.r_0_2>=1))&&(i5.u19.p_8_2>=1)))))
Read [reachable] property : ResAllocation-PT-R003C010-ReachabilityFireability-01 with value :((!((!(((i1.u6.p_2_0>=1)&&(i1.u7.r_2_1>=1))&&(i1.u4.r_1_1>=1)))||(!(i5.u19.p_8_2>=1))))&&(((i3.u13.r_5_1>=1)&&(i2.u11.p_5_2>=1))&&(i3.u9.r_4_1>=1)))
Read [invariant] property : ResAllocation-PT-R003C010-ReachabilityFireability-02 with value :((i1.u0.r_0_0>=1)||((!(i5.u19.p_8_2>=1))||(!(((i3.u12.r_5_0>=1)&&(i3.u13.p_5_1>=1))&&(i3.u9.r_4_0>=1)))))
Read [reachable] property : ResAllocation-PT-R003C010-ReachabilityFireability-03 with value :(((i1.u1.p_0_1>=1)&&(i0.u2.r_0_2>=1))&&(i4.u17.p_7_0>=1))
Read [reachable] property : ResAllocation-PT-R003C010-ReachabilityFireability-04 with value :((((i1.u6.r_2_0>=1)&&(i1.u3.r_1_0>=1))&&(i1.u3.p_1_0>=1))&&((((i1.u6.p_3_0>=1)||((i5.u22.r_9_2>=1)&&(i5.u19.r_8_2>=1)))&&(!(((i1.u4.r_1_1>=1)&&(i0.u5.p_1_2>=1))&&(i1.u1.r_0_1>=1))))||(((((i3.u13.p_6_1>=1)&&(i5.u16.r_6_2>=1))&&(i2.u14.r_5_2>=1))||(i5.u19.p_8_2>=1))||(((i0.u5.r_1_2>=1)&&(i0.u2.r_0_2>=1))&&(((i5.u16.r_7_1>=1)&&(i5.u16.p_7_2>=1))&&(i5.u16.r_6_1>=1))))))
Read [reachable] property : ResAllocation-PT-R003C010-ReachabilityFireability-05 with value :((i2.u14.p_6_2>=1)&&((((i1.u3.p_1_0>=1)&&(((i3.u15.p_6_0>=1)&&(i5.u16.r_6_1>=1))&&(i3.u13.r_5_1>=1)))||((i1.u0.r_0_0>=1)&&(((i3.u13.r_5_1>=1)&&(i2.u11.p_5_2>=1))&&(i3.u9.r_4_1>=1))))&&(((i5.u16.r_7_2>=1)&&(i5.u16.r_6_2>=1))||(((i3.u15.p_6_0>=1)&&(i5.u16.r_6_1>=1))&&(i3.u13.r_5_1>=1)))))
Read [reachable] property : ResAllocation-PT-R003C010-ReachabilityFireability-06 with value :((((i3.u9.r_3_0>=1)&&(i1.u7.p_3_1>=1))&&(i1.u6.r_2_0>=1))&&((((((i1.u7.p_2_1>=1)&&(i2.u8.r_2_2>=1))&&(i0.u5.r_1_2>=1))&&((i1.u0.p_0_0>=1)&&(i1.u1.r_0_1>=1)))&&((((i3.u9.r_3_0>=1)&&(i1.u7.p_3_1>=1))&&(i1.u6.r_2_0>=1))&&(((i4.u20.r_9_0>=1)&&(i5.u21.p_9_1>=1))&&(i4.u18.r_8_0>=1))))||((!(i2.u14.p_6_2>=1))&&(((i1.u6.p_2_0>=1)&&(i1.u7.r_2_1>=1))&&(i1.u4.r_1_1>=1)))))
Read [invariant] property : ResAllocation-PT-R003C010-ReachabilityFireability-07 with value :((!(((i5.u21.p_8_1>=1)&&(i5.u19.r_8_2>=1))&&(i5.u16.r_7_2>=1)))||(!(((i5.u21.r_9_1>=1)&&(i5.u22.p_9_2>=1))&&(i5.u21.r_8_1>=1))))
Read [reachable] property : ResAllocation-PT-R003C010-ReachabilityFireability-08 with value :((!((((i5.u22.r_9_2>=1)&&(i5.u19.r_8_2>=1))||((i2.u14.r_5_2>=1)&&(i2.u11.r_4_2>=1)))&&(((i3.u9.p_4_1>=1)&&(i2.u11.r_4_2>=1))&&(i2.u10.r_3_2>=1))))&&((((((i4.u20.r_9_0>=1)&&(i5.u21.p_9_1>=1))&&(i4.u18.r_8_0>=1))||(i5.u19.p_8_2>=1))&&((((i3.u12.r_5_0>=1)&&(i3.u13.p_5_1>=1))&&(i3.u9.r_4_0>=1))&&(i1.u6.p_3_0>=1)))&&(((((i5.u21.p_8_1>=1)&&(i5.u19.r_8_2>=1))&&(i5.u16.r_7_2>=1))&&(i1.u3.p_1_0>=1))||(i0.u5.p_2_2>=1))))
Read [invariant] property : ResAllocation-PT-R003C010-ReachabilityFireability-09 with value :((((((i2.u14.r_5_2>=1)&&(i2.u11.r_4_2>=1))||(((i5.u21.r_9_1>=1)&&(i5.u22.p_9_2>=1))&&(i5.u21.r_8_1>=1)))||((((i3.u9.r_3_1>=1)&&(i2.u8.p_3_2>=1))&&(i1.u7.r_2_1>=1))||(i2.u14.p_6_2>=1)))||((!(i3.u12.p_5_0>=1))||((((i3.u9.r_3_0>=1)&&(i1.u7.p_3_1>=1))&&(i1.u6.r_2_0>=1))&&(((i1.u3.r_1_0>=1)&&(i1.u4.p_1_1>=1))&&(i1.u0.r_0_0>=1)))))||((!((((i3.u9.r_3_0>=1)&&(i1.u7.p_3_1>=1))&&(i1.u6.r_2_0>=1))&&(i1.u0.r_0_0>=1)))||(i5.u19.p_8_2>=1)))
Read [invariant] property : ResAllocation-PT-R003C010-ReachabilityFireability-10 with value :(((!(((i1.u1.p_0_1>=1)&&(i0.u2.r_0_2>=1))&&(i0.u5.p_2_2>=1)))||(i5.u19.p_8_2>=1))||(((i1.u6.p_2_0>=1)&&(i1.u7.r_2_1>=1))&&(i1.u4.r_1_1>=1)))
Read [reachable] property : ResAllocation-PT-R003C010-ReachabilityFireability-11 with value :(((((i3.u9.r_3_1>=1)&&(i2.u8.p_3_2>=1))&&(i1.u7.r_2_1>=1))&&((i1.u1.p_0_1>=1)&&(i0.u2.r_0_2>=1)))&&((!(((i3.u9.r_3_1>=1)&&(i2.u8.p_3_2>=1))&&(i1.u7.r_2_1>=1)))&&(((i1.u3.p_1_0>=1)||((i5.u16.r_7_2>=1)&&(i5.u16.r_6_2>=1)))&&((i3.u9.r_4_0>=1)&&(i3.u9.r_3_0>=1)))))
Read [reachable] property : ResAllocation-PT-R003C010-ReachabilityFireability-12 with value :(!((((i1.u6.p_2_0>=1)&&(i1.u7.r_2_1>=1))&&(i1.u4.r_1_1>=1))||((!(i5.u19.p_8_2>=1))||(i5.u19.p_8_2>=1))))
Read [invariant] property : ResAllocation-PT-R003C010-ReachabilityFireability-13 with value :((((i1.u0.p_0_0>=1)&&(i1.u1.r_0_1>=1))||(!(((i3.u12.r_5_0>=1)&&(i3.u13.p_5_1>=1))&&(i3.u9.r_4_0>=1))))||((!(((i1.u0.p_0_0>=1)&&(i1.u1.r_0_1>=1))&&(((i3.u13.p_6_1>=1)&&(i5.u16.r_6_2>=1))&&(i2.u14.r_5_2>=1))))&&((!(((i1.u3.r_1_0>=1)&&(i1.u4.p_1_1>=1))&&(i1.u0.r_0_0>=1)))||(!((i1.u1.p_0_1>=1)&&(i0.u2.r_0_2>=1))))))
Read [reachable] property : ResAllocation-PT-R003C010-ReachabilityFireability-14 with value :(((((((i3.u9.p_4_0>=1)&&(i3.u9.r_4_1>=1))&&(i3.u9.r_3_1>=1))&&(((i4.u18.p_8_0>=1)&&(i5.u21.r_8_1>=1))&&(i5.u16.r_7_1>=1)))||(!((i3.u15.r_6_0>=1)&&(i3.u12.r_5_0>=1))))&&(((((i4.u20.r_9_0>=1)&&(i5.u21.p_9_1>=1))&&(i4.u18.r_8_0>=1))&&(((i3.u13.p_6_1>=1)&&(i5.u16.r_6_2>=1))&&(i2.u14.r_5_2>=1)))&&((((i3.u9.p_4_1>=1)&&(i2.u11.r_4_2>=1))&&(i2.u10.r_3_2>=1))||(i1.u3.p_1_0>=1))))&&(((i3.u9.r_3_0>=1)&&(i1.u7.p_3_1>=1))&&(i1.u6.r_2_0>=1)))
Read [reachable] property : ResAllocation-PT-R003C010-ReachabilityFireability-15 with value :((i0.u2.p_0_2>=1)&&(!(((((i3.u9.p_4_0>=1)&&(i3.u9.r_4_1>=1))&&(i3.u9.r_3_1>=1))||(((i1.u6.p_2_0>=1)&&(i1.u7.r_2_1>=1))&&(i1.u4.r_1_1>=1)))||((i0.u2.p_0_2>=1)||(((i3.u9.p_4_1>=1)&&(i2.u11.r_4_2>=1))&&(i2.u10.r_3_2>=1))))))
built 18 ordering constraints for composite.
built 5 ordering constraints for composite.
built 11 ordering constraints for composite.
built 10 ordering constraints for composite.
built 12 ordering constraints for composite.
built 6 ordering constraints for composite.
built 10 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation\_PT\_R003C010\_flat\_flat\_flat\_flat\_mod,823552,0.098259,4768,244,61,1744,217,185,2731,47,472,0
Total reachable state count : 823552

Verifying 16 reachability properties.
Invariant property ResAllocation-PT-R003C010-ReachabilityFireability-00 does not hold.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-00,1024,0.104789,4800,161,54,1744,217,259,2731,51,472,475
Reachability property ResAllocation-PT-R003C010-ReachabilityFireability-01 is true.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-01,32,0.107485,5088,43,19,1744,217,296,2731,54,472,618
Invariant property ResAllocation-PT-R003C010-ReachabilityFireability-02 does not hold.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-02,1344,0.109975,5088,94,27,1744,217,314,2731,54,472,804
Reachability property ResAllocation-PT-R003C010-ReachabilityFireability-03 is true.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-03,3072,0.110541,5088,52,24,1744,217,320,2731,54,472,831
Reachability property ResAllocation-PT-R003C010-ReachabilityFireability-04 does not hold.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : ResAllocation-PT-R003C010-ReachabilityFireability-04

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-04,0,0.115135,5088,1,0,1744,217,389,2731,63,472,1249
Reachability property ResAllocation-PT-R003C010-ReachabilityFireability-05 is true.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-05,576,0.118719,5088,43,20,1744,217,420,2947,65,472,1632
Reachability property ResAllocation-PT-R003C010-ReachabilityFireability-06 does not hold.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : ResAllocation-PT-R003C010-ReachabilityFireability-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-06,0,0.121256,5088,1,0,1744,217,465,2974,67,472,1791
Invariant property ResAllocation-PT-R003C010-ReachabilityFireability-07 is true.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-07,0,0.122152,5088,1,0,1744,217,497,3012,69,472,1936
Reachability property ResAllocation-PT-R003C010-ReachabilityFireability-08 does not hold.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : ResAllocation-PT-R003C010-ReachabilityFireability-08

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-08,0,0.125656,5088,1,0,1744,217,528,3251,69,472,2278
Invariant property ResAllocation-PT-R003C010-ReachabilityFireability-09 does not hold.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-09,1632,0.129813,5088,62,27,1902,217,577,3879,69,472,2579
Invariant property ResAllocation-PT-R003C010-ReachabilityFireability-10 does not hold.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-10,23616,0.132116,5088,134,47,1988,217,587,3995,69,472,2644
Reachability property ResAllocation-PT-R003C010-ReachabilityFireability-11 does not hold.
No reachable states exhibit your property : ResAllocation-PT-R003C010-ReachabilityFireability-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-11,0,0.137165,5164,1,0,2092,217,614,4149,72,472,2877
Reachability property ResAllocation-PT-R003C010-ReachabilityFireability-12 does not hold.
No reachable states exhibit your property : ResAllocation-PT-R003C010-ReachabilityFireability-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-12,0,0.141406,5200,1,0,2097,217,619,4168,73,472,2945
Invariant property ResAllocation-PT-R003C010-ReachabilityFireability-13 is true.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-13,0,0.14592,5268,1,0,2211,217,633,4506,73,472,3170
Reachability property ResAllocation-PT-R003C010-ReachabilityFireability-14 is true.
FORMULA ResAllocation-PT-R003C010-ReachabilityFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-14,16,0.151419,5536,42,17,2342,217,676,4674,78,472,3482
Reachability property ResAllocation-PT-R003C010-ReachabilityFireability-15 does not hold.
No reachable states exhibit your property : ResAllocation-PT-R003C010-ReachabilityFireability-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R003C010-ReachabilityFireability-15,0,0.156302,5576,1,0,2411,217,684,4887,78,472,3528
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527927689356

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 8:21:25 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 02, 2018 8:21:26 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 8:21:26 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 68 ms
Jun 02, 2018 8:21:26 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 60 places.
Jun 02, 2018 8:21:26 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 40 transitions.
Jun 02, 2018 8:21:26 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 13 ms
Jun 02, 2018 8:21:26 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 52 ms
Jun 02, 2018 8:21:26 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 8:21:26 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 38 ms
Jun 02, 2018 8:21:26 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 24 ms
Jun 02, 2018 8:21:26 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 29 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 40 transitions.
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 40 transitions.
Begin: Sat Jun 2 08:21:27 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Sat Jun 2 08:21:27 2018
network size: 60 nodes, 266 links, 80 weight
quality increased from -0.0180729 to 0.434427
end computation: Sat Jun 2 08:21:27 2018
level 1:
start computation: Sat Jun 2 08:21:27 2018
network size: 23 nodes, 131 links, 80 weight
quality increased from 0.434427 to 0.593142
end computation: Sat Jun 2 08:21:27 2018
level 2:
start computation: Sat Jun 2 08:21:27 2018
network size: 8 nodes, 34 links, 80 weight
quality increased from 0.593142 to 0.599184
end computation: Sat Jun 2 08:21:27 2018
level 3:
start computation: Sat Jun 2 08:21:27 2018
network size: 6 nodes, 24 links, 80 weight
quality increased from 0.599184 to 0.599184
end computation: Sat Jun 2 08:21:27 2018
End: Sat Jun 2 08:21:27 2018
Total duration: 0 sec
0.599184
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 30 place invariants in 30 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 62 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, reachability predicate is unrealizable ResAllocation-PT-R003C010-ReachabilityFireability-11
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, reachability predicate is unrealizable ResAllocation-PT-R003C010-ReachabilityFireability-12
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, reachability predicate is unrealizable ResAllocation-PT-R003C010-ReachabilityFireability-15
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 3 / 16 in 875 ms.
Jun 02, 2018 8:21:27 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityFireability.pnml.gal : 14 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityFireability.prop : 3 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 40 transitions.
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-00(UNSAT) depth K=0 took 37 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-01(UNSAT) depth K=0 took 10 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-02(UNSAT) depth K=0 took 12 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-03(UNSAT) depth K=0 took 3 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-04(UNSAT) depth K=0 took 5 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-05(UNSAT) depth K=0 took 9 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-06(UNSAT) depth K=0 took 21 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-07(UNSAT) depth K=0 took 17 ms
Jun 02, 2018 8:21:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-08(UNSAT) depth K=0 took 13 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-09(UNSAT) depth K=0 took 3 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-10(UNSAT) depth K=0 took 15 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-13(UNSAT) depth K=0 took 8 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 30 place invariants in 7 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-14(UNSAT) depth K=0 took 28 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-00(UNSAT) depth K=1 took 25 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-01(UNSAT) depth K=1 took 6 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-02(UNSAT) depth K=1 took 11 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-03(UNSAT) depth K=1 took 22 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-04(UNSAT) depth K=1 took 6 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-05(UNSAT) depth K=1 took 9 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-06(UNSAT) depth K=1 took 10 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-07(UNSAT) depth K=1 took 7 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-08(UNSAT) depth K=1 took 7 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-09(UNSAT) depth K=1 took 10 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-10(UNSAT) depth K=1 took 6 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-13(UNSAT) depth K=1 took 12 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R003C010-ReachabilityFireability-14(UNSAT) depth K=1 took 10 ms
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Exception in thread "Thread-6" Error adding positive variable constraint (error "Failed to assert expression: java.io.IOException: Broken pipe (>= (select (select s 0) 43) 0)")
Skipping mayMatrices nes/nds SMT assertion produced unexpected response success
java.lang.RuntimeException: SMT assertion produced unexpected response success
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:145)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.smt.ISMTSolver.init(ISMTSolver.java:17)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:278)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying ResAllocation-PT-R003C010-ReachabilityFireability-13 SMT depth 2
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 2
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 2
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 3/ 16 properties. Interrupting other analysis methods.
Jun 02, 2018 8:21:28 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 948ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C010"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C010.tgz
mv ResAllocation-PT-R003C010 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is ResAllocation-PT-R003C010, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r141-qhx2-152673583000350"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;