About the Execution of ITS-Tools.L for QuasiCertifProtocol-COL-06
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15729.210 | 78928.00 | 218899.00 | 371.00 | FFFFTTFFTFFTFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................
/home/mcc/execution
total 244K
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 12K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 117 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 355 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 61K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is QuasiCertifProtocol-COL-06, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r141-qhx2-152673582500019
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-00
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-01
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-02
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-03
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-04
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-05
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-06
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-07
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-08
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-09
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-10
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-11
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-12
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-13
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-14
FORMULA_NAME QuasiCertifProtocol-COL-06-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1527875448122
17:51:11.418 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
17:51:11.423 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-00 with value :((((((((((c1_0+c1_1)+c1_2)+c1_3)+c1_4)+c1_5)+c1_6)>=2)&&(((((((n4_0+n4_1)+n4_2)+n4_3)+n4_4)+n4_5)+n4_6)<=((((((n1_0+n1_1)+n1_2)+n1_3)+n1_4)+n1_5)+n1_6)))||(AstopOK_0<=SstopAbort_0))||(((((((((s6_0+s6_1)+s6_2)+s6_3)+s6_4)+s6_5)+s6_6)>=2)||(((((((SstopOK_0+SstopOK_1)+SstopOK_2)+SstopOK_3)+SstopOK_4)+SstopOK_5)+SstopOK_6)<=((((((n5_0+n5_1)+n5_2)+n5_3)+n5_4)+n5_5)+n5_6)))||(!(((((((n2_0+n2_1)+n2_2)+n2_3)+n2_4)+n2_5)+n2_6)<=((((((s3_0+s3_1)+s3_2)+s3_3)+s3_4)+s3_5)+s3_6)))))
Read [invariant] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-01 with value :((AstopOK_0<=((((((s4_0+s4_1)+s4_2)+s4_3)+s4_4)+s4_5)+s4_6))&&(((((((((((((((((((((((((((((((((((((((((((((((((((n7_0+n7_1)+n7_2)+n7_3)+n7_4)+n7_5)+n7_6)+n7_7)+n7_8)+n7_9)+n7_10)+n7_11)+n7_12)+n7_13)+n7_14)+n7_15)+n7_16)+n7_17)+n7_18)+n7_19)+n7_20)+n7_21)+n7_22)+n7_23)+n7_24)+n7_25)+n7_26)+n7_27)+n7_28)+n7_29)+n7_30)+n7_31)+n7_32)+n7_33)+n7_34)+n7_35)+n7_36)+n7_37)+n7_38)+n7_39)+n7_40)+n7_41)+n7_42)+n7_43)+n7_44)+n7_45)+n7_46)+n7_47)+n7_48)<=((((((((((((((((((((((((((((((((((((((((((((((((n9_0+n9_1)+n9_2)+n9_3)+n9_4)+n9_5)+n9_6)+n9_7)+n9_8)+n9_9)+n9_10)+n9_11)+n9_12)+n9_13)+n9_14)+n9_15)+n9_16)+n9_17)+n9_18)+n9_19)+n9_20)+n9_21)+n9_22)+n9_23)+n9_24)+n9_25)+n9_26)+n9_27)+n9_28)+n9_29)+n9_30)+n9_31)+n9_32)+n9_33)+n9_34)+n9_35)+n9_36)+n9_37)+n9_38)+n9_39)+n9_40)+n9_41)+n9_42)+n9_43)+n9_44)+n9_45)+n9_46)+n9_47)+n9_48))&&(AstopOK_0<=((((((n4_0+n4_1)+n4_2)+n4_3)+n4_4)+n4_5)+n4_6)))||((((((((s4_0+s4_1)+s4_2)+s4_3)+s4_4)+s4_5)+s4_6)>=2)&&(((((((s3_0+s3_1)+s3_2)+s3_3)+s3_4)+s3_5)+s3_6)>=2))))
Read [reachable] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-02 with value :(((!(((((((Sstart_0+Sstart_1)+Sstart_2)+Sstart_3)+Sstart_4)+Sstart_5)+Sstart_6)<=((((((n2_0+n2_1)+n2_2)+n2_3)+n2_4)+n2_5)+n2_6)))||(((((((s6_0+s6_1)+s6_2)+s6_3)+s6_4)+s6_5)+s6_6)>=1))&&(((((((((((((((((((((((((((((((((((((((((((((((((n7_0+n7_1)+n7_2)+n7_3)+n7_4)+n7_5)+n7_6)+n7_7)+n7_8)+n7_9)+n7_10)+n7_11)+n7_12)+n7_13)+n7_14)+n7_15)+n7_16)+n7_17)+n7_18)+n7_19)+n7_20)+n7_21)+n7_22)+n7_23)+n7_24)+n7_25)+n7_26)+n7_27)+n7_28)+n7_29)+n7_30)+n7_31)+n7_32)+n7_33)+n7_34)+n7_35)+n7_36)+n7_37)+n7_38)+n7_39)+n7_40)+n7_41)+n7_42)+n7_43)+n7_44)+n7_45)+n7_46)+n7_47)+n7_48)>=1))
Read [invariant] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-03 with value :(((!(a5_0<=malicious_reservoir_0))||(!(((((((s6_0+s6_1)+s6_2)+s6_3)+s6_4)+s6_5)+s6_6)>=1)))||(!((((((((n3_0+n3_1)+n3_2)+n3_3)+n3_4)+n3_5)+n3_6)<=a3_0)||(((((((SstopOK_0+SstopOK_1)+SstopOK_2)+SstopOK_3)+SstopOK_4)+SstopOK_5)+SstopOK_6)<=AstopOK_0))))
Read [reachable] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-04 with value :((((((((((n1_0+n1_1)+n1_2)+n1_3)+n1_4)+n1_5)+n1_6)>=3)&&(malicious_reservoir_0<=a3_0))||((((((((s6_0+s6_1)+s6_2)+s6_3)+s6_4)+s6_5)+s6_6)>=3)&&(((((((s6_0+s6_1)+s6_2)+s6_3)+s6_4)+s6_5)+s6_6)>=2)))&&(!((((((((Sstart_0+Sstart_1)+Sstart_2)+Sstart_3)+Sstart_4)+Sstart_5)+Sstart_6)>=1)||(((((((n2_0+n2_1)+n2_2)+n2_3)+n2_4)+n2_5)+n2_6)<=AstopAbort_0))))
Read [reachable] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-05 with value :(!(((((((n6_0+n6_1)+n6_2)+n6_3)+n6_4)+n6_5)+n6_6)<=((((((((((((((((((((((((((((((((((((((((((((((((n7_0+n7_1)+n7_2)+n7_3)+n7_4)+n7_5)+n7_6)+n7_7)+n7_8)+n7_9)+n7_10)+n7_11)+n7_12)+n7_13)+n7_14)+n7_15)+n7_16)+n7_17)+n7_18)+n7_19)+n7_20)+n7_21)+n7_22)+n7_23)+n7_24)+n7_25)+n7_26)+n7_27)+n7_28)+n7_29)+n7_30)+n7_31)+n7_32)+n7_33)+n7_34)+n7_35)+n7_36)+n7_37)+n7_38)+n7_39)+n7_40)+n7_41)+n7_42)+n7_43)+n7_44)+n7_45)+n7_46)+n7_47)+n7_48)))
Read [invariant] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-06 with value :(a5_0<=((((((c1_0+c1_1)+c1_2)+c1_3)+c1_4)+c1_5)+c1_6))
Read [reachable] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-07 with value :(((((((((c1_0+c1_1)+c1_2)+c1_3)+c1_4)+c1_5)+c1_6)>=2)||((AstopOK_0<=SstopAbort_0)||(a1_0>=2)))&&(a3_0>=2))
Read [reachable] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-08 with value :((((((((s5_0+s5_1)+s5_2)+s5_3)+s5_4)+s5_5)+s5_6)>=1)&&(((((((((n6_0+n6_1)+n6_2)+n6_3)+n6_4)+n6_5)+n6_6)>=2)||(CstopAbort_0>=1))||(a2_0<=a5_0)))
Read [reachable] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-09 with value :(!((!(((((((s3_0+s3_1)+s3_2)+s3_3)+s3_4)+s3_5)+s3_6)<=((((((Sstart_0+Sstart_1)+Sstart_2)+Sstart_3)+Sstart_4)+Sstart_5)+Sstart_6)))||(((((((s3_0+s3_1)+s3_2)+s3_3)+s3_4)+s3_5)+s3_6)<=a5_0)))
Read [reachable] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-10 with value :(((!(((((((s6_0+s6_1)+s6_2)+s6_3)+s6_4)+s6_5)+s6_6)<=((((((n6_0+n6_1)+n6_2)+n6_3)+n6_4)+n6_5)+n6_6)))&&((((((((n1_0+n1_1)+n1_2)+n1_3)+n1_4)+n1_5)+n1_6)>=3)&&(((((((n4_0+n4_1)+n4_2)+n4_3)+n4_4)+n4_5)+n4_6)<=((((((Sstart_0+Sstart_1)+Sstart_2)+Sstart_3)+Sstart_4)+Sstart_5)+Sstart_6))))&&(((((((((n6_0+n6_1)+n6_2)+n6_3)+n6_4)+n6_5)+n6_6)>=3)&&(((((((Sstart_0+Sstart_1)+Sstart_2)+Sstart_3)+Sstart_4)+Sstart_5)+Sstart_6)>=1))&&((((((((n2_0+n2_1)+n2_2)+n2_3)+n2_4)+n2_5)+n2_6)>=2)||(a2_0<=((((((Cstart_0+Cstart_1)+Cstart_2)+Cstart_3)+Cstart_4)+Cstart_5)+Cstart_6)))))
Read [invariant] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-11 with value :(!((a2_0>=3)&&(((((((s2_0+s2_1)+s2_2)+s2_3)+s2_4)+s2_5)+s2_6)>=1)))
Read [invariant] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-12 with value :(!((!(((((((CstopOK_0+CstopOK_1)+CstopOK_2)+CstopOK_3)+CstopOK_4)+CstopOK_5)+CstopOK_6)<=a1_0))&&((((((((s5_0+s5_1)+s5_2)+s5_3)+s5_4)+s5_5)+s5_6)<=((((((n2_0+n2_1)+n2_2)+n2_3)+n2_4)+n2_5)+n2_6))||(((((((((((((((((((((((((((((((((((((((((((((((((n7_0+n7_1)+n7_2)+n7_3)+n7_4)+n7_5)+n7_6)+n7_7)+n7_8)+n7_9)+n7_10)+n7_11)+n7_12)+n7_13)+n7_14)+n7_15)+n7_16)+n7_17)+n7_18)+n7_19)+n7_20)+n7_21)+n7_22)+n7_23)+n7_24)+n7_25)+n7_26)+n7_27)+n7_28)+n7_29)+n7_30)+n7_31)+n7_32)+n7_33)+n7_34)+n7_35)+n7_36)+n7_37)+n7_38)+n7_39)+n7_40)+n7_41)+n7_42)+n7_43)+n7_44)+n7_45)+n7_46)+n7_47)+n7_48)>=1))))
Read [reachable] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-13 with value :((((((((((n5_0+n5_1)+n5_2)+n5_3)+n5_4)+n5_5)+n5_6)>=3)||(AstopAbort_0>=2))||((((((((SstopOK_0+SstopOK_1)+SstopOK_2)+SstopOK_3)+SstopOK_4)+SstopOK_5)+SstopOK_6)<=a1_0)&&(((((((((((((((((((((((((((((((((((((((((((((((((n9_0+n9_1)+n9_2)+n9_3)+n9_4)+n9_5)+n9_6)+n9_7)+n9_8)+n9_9)+n9_10)+n9_11)+n9_12)+n9_13)+n9_14)+n9_15)+n9_16)+n9_17)+n9_18)+n9_19)+n9_20)+n9_21)+n9_22)+n9_23)+n9_24)+n9_25)+n9_26)+n9_27)+n9_28)+n9_29)+n9_30)+n9_31)+n9_32)+n9_33)+n9_34)+n9_35)+n9_36)+n9_37)+n9_38)+n9_39)+n9_40)+n9_41)+n9_42)+n9_43)+n9_44)+n9_45)+n9_46)+n9_47)+n9_48)<=((((((n4_0+n4_1)+n4_2)+n4_3)+n4_4)+n4_5)+n4_6))))&&((!(malicious_reservoir_0>=1))&&((((((((c1_0+c1_1)+c1_2)+c1_3)+c1_4)+c1_5)+c1_6)>=2)&&(((((((((((((((((((((((((((((((((((((((((((((((((n8_0+n8_1)+n8_2)+n8_3)+n8_4)+n8_5)+n8_6)+n8_7)+n8_8)+n8_9)+n8_10)+n8_11)+n8_12)+n8_13)+n8_14)+n8_15)+n8_16)+n8_17)+n8_18)+n8_19)+n8_20)+n8_21)+n8_22)+n8_23)+n8_24)+n8_25)+n8_26)+n8_27)+n8_28)+n8_29)+n8_30)+n8_31)+n8_32)+n8_33)+n8_34)+n8_35)+n8_36)+n8_37)+n8_38)+n8_39)+n8_40)+n8_41)+n8_42)+n8_43)+n8_44)+n8_45)+n8_46)+n8_47)+n8_48)>=3))))
Read [invariant] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-14 with value :((!((((((((s6_0+s6_1)+s6_2)+s6_3)+s6_4)+s6_5)+s6_6)>=2)||(((((((s5_0+s5_1)+s5_2)+s5_3)+s5_4)+s5_5)+s5_6)>=1)))||((malicious_reservoir_0>=1)&&((((((((s2_0+s2_1)+s2_2)+s2_3)+s2_4)+s2_5)+s2_6)>=2)&&(AstopAbort_0<=((((((((((((((((((((((((((((((((((((((((((((((((n9_0+n9_1)+n9_2)+n9_3)+n9_4)+n9_5)+n9_6)+n9_7)+n9_8)+n9_9)+n9_10)+n9_11)+n9_12)+n9_13)+n9_14)+n9_15)+n9_16)+n9_17)+n9_18)+n9_19)+n9_20)+n9_21)+n9_22)+n9_23)+n9_24)+n9_25)+n9_26)+n9_27)+n9_28)+n9_29)+n9_30)+n9_31)+n9_32)+n9_33)+n9_34)+n9_35)+n9_36)+n9_37)+n9_38)+n9_39)+n9_40)+n9_41)+n9_42)+n9_43)+n9_44)+n9_45)+n9_46)+n9_47)+n9_48)))))
Read [invariant] property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-15 with value :(((((((s4_0+s4_1)+s4_2)+s4_3)+s4_4)+s4_5)+s4_6)<=((((((s2_0+s2_1)+s2_2)+s2_3)+s2_4)+s2_5)+s2_6))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 116 rows 270 cols
invariant :n9_34 + -1'SstopOK_4 + CstopOK_6 = 0
invariant :n8_11 + -1'n8_13 + Cstart_4 + -1'Cstart_6 = 0
invariant :n7_11 + -1'n7_13 + -1'Cstart_4 + Cstart_6 = 0
invariant :n8_31 + -1'n8_34 + Cstart_3 + -1'Cstart_6 = 0
invariant :n7_47 + -1'n7_48 + -1'Cstart_5 + Cstart_6 = 0
invariant :n9_20 + -1'SstopOK_2 + CstopOK_6 = 0
invariant :n6_4 + -1'n6_6 + n5_4 + -1'n5_6 = 0
invariant :n9_9 + -1'SstopOK_1 + CstopOK_2 = 0
invariant :n7_4 + -1'n7_6 + -1'Cstart_4 + Cstart_6 = 0
invariant :n9_16 + -1'SstopOK_2 + CstopOK_2 = 0
invariant :n8_3 + -1'n8_6 + Cstart_3 + -1'Cstart_6 = 0
invariant :n9_35 + -1'SstopOK_5 + CstopOK_0 = 0
invariant :n8_17 + -1'n8_20 + Cstart_3 + -1'Cstart_6 = 0
invariant :n8_14 + -1'n8_20 + Cstart_0 + -1'Cstart_6 = 0
invariant :n8_25 + -1'n8_27 + Cstart_4 + -1'Cstart_6 = 0
invariant :n9_38 + -1'SstopOK_5 + CstopOK_3 = 0
invariant :n9_24 + -1'SstopOK_3 + CstopOK_3 = 0
invariant :n7_29 + -1'n7_34 + -1'Cstart_1 + Cstart_6 = 0
invariant :n8_19 + -1'n8_20 + Cstart_5 + -1'Cstart_6 = 0
invariant :n8_36 + -1'n8_41 + Cstart_1 + -1'Cstart_6 = 0
invariant :n9_11 + -1'SstopOK_1 + CstopOK_4 = 0
invariant :n7_24 + -1'n7_27 + -1'Cstart_3 + Cstart_6 = 0
invariant :n2_4 + -1'n2_6 + n1_4 + -1'n1_6 = 0
invariant :n7_7 + -1'n7_13 + -1'Cstart_0 + Cstart_6 = 0
invariant :n7_9 + -1'n7_13 + -1'Cstart_2 + Cstart_6 = 0
invariant :n2_5 + -1'n2_6 + n1_5 + -1'n1_6 = 0
invariant :n8_21 + -1'n8_27 + Cstart_0 + -1'Cstart_6 = 0
invariant :n7_46 + -1'n7_48 + -1'Cstart_4 + Cstart_6 = 0
invariant :n2_3 + -1'n2_6 + n1_3 + -1'n1_6 = 0
invariant :n8_12 + -1'n8_13 + Cstart_5 + -1'Cstart_6 = 0
invariant :n7_37 + -1'n7_41 + -1'Cstart_2 + Cstart_6 = 0
invariant :n8_18 + -1'n8_20 + Cstart_4 + -1'Cstart_6 = 0
invariant :n8_28 + -1'n8_34 + Cstart_0 + -1'Cstart_6 = 0
invariant :n7_38 + -1'n7_41 + -1'Cstart_3 + Cstart_6 = 0
invariant :n7_26 + -1'n7_27 + -1'Cstart_5 + Cstart_6 = 0
invariant :n7_21 + -1'n7_27 + -1'Cstart_0 + Cstart_6 = 0
invariant :n8_24 + -1'n8_27 + Cstart_3 + -1'Cstart_6 = 0
invariant :n8_43 + -1'n8_48 + Cstart_1 + -1'Cstart_6 = 0
invariant :n9_14 + -1'SstopOK_2 + CstopOK_0 = 0
invariant :n6_2 + -1'n6_6 + n5_2 + -1'n5_6 = 0
invariant :n9_33 + -1'SstopOK_4 + CstopOK_5 = 0
invariant :n7_16 + -1'n7_20 + -1'Cstart_2 + Cstart_6 = 0
invariant :n9_22 + -1'SstopOK_3 + CstopOK_1 = 0
invariant :n8_8 + -1'n8_13 + Cstart_1 + -1'Cstart_6 = 0
invariant :n7_39 + -1'n7_41 + -1'Cstart_4 + Cstart_6 = 0
invariant :n8_42 + -1'n8_48 + Cstart_0 + -1'Cstart_6 = 0
invariant :malicious_reservoir_0 + -1'c1_0 + -1'c1_1 + -1'c1_2 + -1'c1_3 + -1'c1_4 + -1'c1_5 + -1'c1_6 + -1'Cstart_0 + -1'Cstart_1 + -1'Cstart_2 + -1'Cstart_3 + -1'Cstart_4 + -1'Cstart_5 + -1'Cstart_6 + -1'Sstart_0 + -1'Sstart_1 + -1'Sstart_2 + -1'Sstart_3 + -1'Sstart_4 + -1'Sstart_5 + -1'Sstart_6 + -1's2_0 + -1's2_1 + -1's2_2 + -1's2_3 + -1's2_4 + -1's2_5 + -1's2_6 + -1's3_0 + -1's3_1 + -1's3_2 + -1's3_3 + -1's3_4 + -1's3_5 + -1's3_6 + -1's4_0 + -1's4_1 + -1's4_2 + -1's4_3 + -1's4_4 + -1's4_5 + -1's4_6 + -1's5_0 + -1's5_1 + -1's5_2 + -1's5_3 + -1's5_4 + -1's5_5 + -1's5_6 + -1's6_0 + -1's6_1 + -1's6_2 + -1's6_3 + -1's6_4 + -1's6_5 + -1's6_6 + -1'SstopOK_0 + -1'SstopOK_1 + -1'SstopOK_2 + -1'SstopOK_3 + -1'SstopOK_4 + -1'SstopOK_5 + -1'SstopOK_6 + -1'CstopOK_0 + -1'CstopOK_1 + -1'CstopOK_2 + -1'CstopOK_3 + -1'CstopOK_4 + -1'CstopOK_5 + -1'CstopOK_6 = -11
invariant :n9_7 + -1'SstopOK_1 + CstopOK_0 = 0
invariant :n7_28 + -1'n7_34 + -1'Cstart_0 + Cstart_6 = 0
invariant :n7_0 + -1'n7_6 + -1'Cstart_0 + Cstart_6 = 0
invariant :n9_43 + -1'SstopOK_6 + CstopOK_1 = 0
invariant :n9_44 + -1'SstopOK_6 + CstopOK_2 = 0
invariant :n6_3 + -1'n6_6 + n5_3 + -1'n5_6 = 0
invariant :n7_5 + -1'n7_6 + -1'Cstart_5 + Cstart_6 = 0
invariant :n8_33 + -1'n8_34 + Cstart_5 + -1'Cstart_6 = 0
invariant :n4_2 + -1'n4_6 + n3_2 + -1'n3_6 = 0
invariant :n8_7 + -1'n8_13 + Cstart_0 + -1'Cstart_6 = 0
invariant :n7_15 + -1'n7_20 + -1'Cstart_1 + Cstart_6 = 0
invariant :n9_27 + -1'SstopOK_3 + CstopOK_6 = 0
invariant :n9_46 + -1'SstopOK_6 + CstopOK_4 = 0
invariant :n9_12 + -1'SstopOK_1 + CstopOK_5 = 0
invariant :n8_0 + -1'n8_6 + Cstart_0 + -1'Cstart_6 = 0
invariant :n4_5 + -1'n4_6 + n3_5 + -1'n3_6 = 0
invariant :n7_22 + -1'n7_27 + -1'Cstart_1 + Cstart_6 = 0
invariant :n7_2 + -1'n7_6 + -1'Cstart_2 + Cstart_6 = 0
invariant :n9_1 + -1'SstopOK_0 + CstopOK_1 = 0
invariant :n8_1 + -1'n8_6 + Cstart_1 + -1'Cstart_6 = 0
invariant :n8_2 + -1'n8_6 + Cstart_2 + -1'Cstart_6 = 0
invariant :n7_23 + -1'n7_27 + -1'Cstart_2 + Cstart_6 = 0
invariant :n9_5 + -1'SstopOK_0 + CstopOK_5 = 0
invariant :n8_47 + -1'n8_48 + Cstart_5 + -1'Cstart_6 = 0
invariant :n9_37 + -1'SstopOK_5 + CstopOK_2 = 0
invariant :n8_45 + -1'n8_48 + Cstart_3 + -1'Cstart_6 = 0
invariant :n9_10 + -1'SstopOK_1 + CstopOK_3 = 0
invariant :n7_40 + -1'n7_41 + -1'Cstart_5 + Cstart_6 = 0
invariant :n8_5 + -1'n8_6 + Cstart_5 + -1'Cstart_6 = 0
invariant :n7_44 + -1'n7_48 + -1'Cstart_2 + Cstart_6 = 0
invariant :n9_6 + -1'SstopOK_0 + CstopOK_6 = 0
invariant :n8_40 + -1'n8_41 + Cstart_5 + -1'Cstart_6 = 0
invariant :n2_1 + -1'n2_6 + n1_1 + -1'n1_6 = 0
invariant :n9_3 + -1'SstopOK_0 + CstopOK_3 = 0
invariant :n8_35 + -1'n8_41 + Cstart_0 + -1'Cstart_6 = 0
invariant :n7_35 + -1'n7_41 + -1'Cstart_0 + Cstart_6 = 0
invariant :n9_15 + -1'SstopOK_2 + CstopOK_1 = 0
invariant :n2_2 + -1'n2_6 + n1_2 + -1'n1_6 = 0
invariant :n9_42 + -1'SstopOK_6 + CstopOK_0 = 0
invariant :n8_16 + -1'n8_20 + Cstart_2 + -1'Cstart_6 = 0
invariant :n7_3 + -1'n7_6 + -1'Cstart_3 + Cstart_6 = 0
invariant :n4_0 + -1'n4_6 + n3_0 + -1'n3_6 = 0
invariant :CstopAbort_0 + c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 + c1_6 + Cstart_0 + Cstart_1 + Cstart_2 + Cstart_3 + Cstart_4 + Cstart_5 + Cstart_6 + CstopOK_0 + CstopOK_1 + CstopOK_2 + CstopOK_3 + CstopOK_4 + CstopOK_5 + CstopOK_6 = 7
invariant :n9_18 + -1'SstopOK_2 + CstopOK_4 = 0
invariant :n7_32 + -1'n7_34 + -1'Cstart_4 + Cstart_6 = 0
invariant :n9_2 + -1'SstopOK_0 + CstopOK_2 = 0
invariant :n9_40 + -1'SstopOK_5 + CstopOK_5 = 0
invariant :n8_29 + -1'n8_34 + Cstart_1 + -1'Cstart_6 = 0
invariant :n7_45 + -1'n7_48 + -1'Cstart_3 + Cstart_6 = 0
invariant :n8_9 + -1'n8_13 + Cstart_2 + -1'Cstart_6 = 0
invariant :n9_48 + -1'SstopOK_6 + CstopOK_6 = 0
invariant :n9_45 + -1'SstopOK_6 + CstopOK_3 = 0
invariant :n4_4 + -1'n4_6 + n3_4 + -1'n3_6 = 0
invariant :n9_8 + -1'SstopOK_1 + CstopOK_1 = 0
invariant :n8_46 + -1'n8_48 + Cstart_4 + -1'Cstart_6 = 0
invariant :n8_30 + -1'n8_34 + Cstart_2 + -1'Cstart_6 = 0
invariant :n9_23 + -1'SstopOK_3 + CstopOK_2 = 0
invariant :n7_8 + -1'n7_13 + -1'Cstart_1 + Cstart_6 = 0
invariant :n9_41 + -1'SstopOK_5 + CstopOK_6 = 0
invariant :n7_30 + -1'n7_34 + -1'Cstart_2 + Cstart_6 = 0
invariant :n4_3 + -1'n4_6 + n3_3 + -1'n3_6 = 0
invariant :n8_10 + -1'n8_13 + Cstart_3 + -1'Cstart_6 = 0
invariant :n9_29 + -1'SstopOK_4 + CstopOK_1 = 0
invariant :n7_43 + -1'n7_48 + -1'Cstart_1 + Cstart_6 = 0
invariant :n7_18 + -1'n7_20 + -1'Cstart_4 + Cstart_6 = 0
invariant :n9_0 + -1'SstopOK_0 + CstopOK_0 = 0
invariant :n8_15 + -1'n8_20 + Cstart_1 + -1'Cstart_6 = 0
invariant :n7_1 + -1'n7_6 + -1'Cstart_1 + Cstart_6 = 0
invariant :SstopAbort_0 + Sstart_0 + Sstart_1 + Sstart_2 + Sstart_3 + Sstart_4 + Sstart_5 + Sstart_6 + s2_0 + s2_1 + s2_2 + s2_3 + s2_4 + s2_5 + s2_6 + s3_0 + s3_1 + s3_2 + s3_3 + s3_4 + s3_5 + s3_6 + s4_0 + s4_1 + s4_2 + s4_3 + s4_4 + s4_5 + s4_6 + s5_0 + s5_1 + s5_2 + s5_3 + s5_4 + s5_5 + s5_6 + s6_0 + s6_1 + s6_2 + s6_3 + s6_4 + s6_5 + s6_6 + SstopOK_0 + SstopOK_1 + SstopOK_2 + SstopOK_3 + SstopOK_4 + SstopOK_5 + SstopOK_6 = 7
invariant :n7_17 + -1'n7_20 + -1'Cstart_3 + Cstart_6 = 0
invariant :n8_39 + -1'n8_41 + Cstart_4 + -1'Cstart_6 = 0
invariant :n6_5 + -1'n6_6 + n5_5 + -1'n5_6 = 0
invariant :n9_32 + -1'SstopOK_4 + CstopOK_4 = 0
invariant :n2_0 + -1'n2_6 + n1_0 + -1'n1_6 = 0
invariant :n7_36 + -1'n7_41 + -1'Cstart_1 + Cstart_6 = 0
invariant :n8_4 + -1'n8_6 + Cstart_4 + -1'Cstart_6 = 0
invariant :n7_42 + -1'n7_48 + -1'Cstart_0 + Cstart_6 = 0
invariant :n8_38 + -1'n8_41 + Cstart_3 + -1'Cstart_6 = 0
invariant :n7_12 + -1'n7_13 + -1'Cstart_5 + Cstart_6 = 0
invariant :n8_22 + -1'n8_27 + Cstart_1 + -1'Cstart_6 = 0
invariant :n6_1 + -1'n6_6 + n5_1 + -1'n5_6 = 0
invariant :n9_28 + -1'SstopOK_4 + CstopOK_0 = 0
invariant :n9_47 + -1'SstopOK_6 + CstopOK_5 = 0
invariant :n7_31 + -1'n7_34 + -1'Cstart_3 + Cstart_6 = 0
invariant :n9_19 + -1'SstopOK_2 + CstopOK_5 = 0
invariant :n7_10 + -1'n7_13 + -1'Cstart_3 + Cstart_6 = 0
invariant :n6_0 + -1'n6_6 + n5_0 + -1'n5_6 = 0
invariant :n9_17 + -1'SstopOK_2 + CstopOK_3 = 0
invariant :AstopAbort_0 + a5_0 + a4_0 + a3_0 + a2_0 + a1_0 + Astart_0 + AstopOK_0 = 1
invariant :n9_31 + -1'SstopOK_4 + CstopOK_3 = 0
invariant :n8_23 + -1'n8_27 + Cstart_2 + -1'Cstart_6 = 0
invariant :n9_36 + -1'SstopOK_5 + CstopOK_1 = 0
invariant :n4_1 + -1'n4_6 + n3_1 + -1'n3_6 = 0
invariant :n8_26 + -1'n8_27 + Cstart_5 + -1'Cstart_6 = 0
invariant :n9_30 + -1'SstopOK_4 + CstopOK_2 = 0
invariant :n7_19 + -1'n7_20 + -1'Cstart_5 + Cstart_6 = 0
invariant :n9_39 + -1'SstopOK_5 + CstopOK_4 = 0
invariant :n7_33 + -1'n7_34 + -1'Cstart_5 + Cstart_6 = 0
invariant :n9_21 + -1'SstopOK_3 + CstopOK_0 = 0
invariant :n7_25 + -1'n7_27 + -1'Cstart_4 + Cstart_6 = 0
invariant :n8_32 + -1'n8_34 + Cstart_4 + -1'Cstart_6 = 0
invariant :n8_37 + -1'n8_41 + Cstart_2 + -1'Cstart_6 = 0
invariant :n8_44 + -1'n8_48 + Cstart_2 + -1'Cstart_6 = 0
invariant :n9_26 + -1'SstopOK_3 + CstopOK_5 = 0
invariant :n9_13 + -1'SstopOK_1 + CstopOK_6 = 0
invariant :n9_25 + -1'SstopOK_3 + CstopOK_4 = 0
invariant :n9_4 + -1'SstopOK_0 + CstopOK_4 = 0
invariant :n7_14 + -1'n7_20 + -1'Cstart_0 + Cstart_6 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 116 rows 270 cols
invariant :n9_34 + -1'SstopOK_4 + CstopOK_6 = 0
invariant :n8_11 + -1'n8_13 + Cstart_4 + -1'Cstart_6 = 0
invariant :n7_11 + -1'n7_13 + -1'Cstart_4 + Cstart_6 = 0
invariant :n8_31 + -1'n8_34 + Cstart_3 + -1'Cstart_6 = 0
invariant :n7_47 + -1'n7_48 + -1'Cstart_5 + Cstart_6 = 0
invariant :n9_20 + -1'SstopOK_2 + CstopOK_6 = 0
invariant :n6_4 + -1'n6_6 + n5_4 + -1'n5_6 = 0
invariant :n9_9 + -1'SstopOK_1 + CstopOK_2 = 0
invariant :n7_4 + -1'n7_6 + -1'Cstart_4 + Cstart_6 = 0
invariant :n9_16 + -1'SstopOK_2 + CstopOK_2 = 0
invariant :n8_3 + -1'n8_6 + Cstart_3 + -1'Cstart_6 = 0
invariant :n9_35 + -1'SstopOK_5 + CstopOK_0 = 0
invariant :n8_17 + -1'n8_20 + Cstart_3 + -1'Cstart_6 = 0
invariant :n8_14 + -1'n8_20 + Cstart_0 + -1'Cstart_6 = 0
invariant :n8_25 + -1'n8_27 + Cstart_4 + -1'Cstart_6 = 0
invariant :n9_38 + -1'SstopOK_5 + CstopOK_3 = 0
invariant :n9_24 + -1'SstopOK_3 + CstopOK_3 = 0
invariant :n7_29 + -1'n7_34 + -1'Cstart_1 + Cstart_6 = 0
invariant :n8_19 + -1'n8_20 + Cstart_5 + -1'Cstart_6 = 0
invariant :n8_36 + -1'n8_41 + Cstart_1 + -1'Cstart_6 = 0
invariant :n9_11 + -1'SstopOK_1 + CstopOK_4 = 0
invariant :n7_24 + -1'n7_27 + -1'Cstart_3 + Cstart_6 = 0
invariant :n2_4 + -1'n2_6 + n1_4 + -1'n1_6 = 0
invariant :n7_7 + -1'n7_13 + -1'Cstart_0 + Cstart_6 = 0
invariant :n7_9 + -1'n7_13 + -1'Cstart_2 + Cstart_6 = 0
invariant :n2_5 + -1'n2_6 + n1_5 + -1'n1_6 = 0
invariant :n8_21 + -1'n8_27 + Cstart_0 + -1'Cstart_6 = 0
invariant :n7_46 + -1'n7_48 + -1'Cstart_4 + Cstart_6 = 0
invariant :n2_3 + -1'n2_6 + n1_3 + -1'n1_6 = 0
invariant :n8_12 + -1'n8_13 + Cstart_5 + -1'Cstart_6 = 0
invariant :n7_37 + -1'n7_41 + -1'Cstart_2 + Cstart_6 = 0
invariant :n8_18 + -1'n8_20 + Cstart_4 + -1'Cstart_6 = 0
invariant :n8_28 + -1'n8_34 + Cstart_0 + -1'Cstart_6 = 0
invariant :n7_38 + -1'n7_41 + -1'Cstart_3 + Cstart_6 = 0
invariant :n7_26 + -1'n7_27 + -1'Cstart_5 + Cstart_6 = 0
invariant :n7_21 + -1'n7_27 + -1'Cstart_0 + Cstart_6 = 0
invariant :n8_24 + -1'n8_27 + Cstart_3 + -1'Cstart_6 = 0
invariant :n8_43 + -1'n8_48 + Cstart_1 + -1'Cstart_6 = 0
invariant :n9_14 + -1'SstopOK_2 + CstopOK_0 = 0
invariant :n6_2 + -1'n6_6 + n5_2 + -1'n5_6 = 0
invariant :n9_33 + -1'SstopOK_4 + CstopOK_5 = 0
invariant :n7_16 + -1'n7_20 + -1'Cstart_2 + Cstart_6 = 0
invariant :n9_22 + -1'SstopOK_3 + CstopOK_1 = 0
invariant :n8_8 + -1'n8_13 + Cstart_1 + -1'Cstart_6 = 0
invariant :n7_39 + -1'n7_41 + -1'Cstart_4 + Cstart_6 = 0
invariant :n8_42 + -1'n8_48 + Cstart_0 + -1'Cstart_6 = 0
invariant :malicious_reservoir_0 + -1'c1_0 + -1'c1_1 + -1'c1_2 + -1'c1_3 + -1'c1_4 + -1'c1_5 + -1'c1_6 + -1'Cstart_0 + -1'Cstart_1 + -1'Cstart_2 + -1'Cstart_3 + -1'Cstart_4 + -1'Cstart_5 + -1'Cstart_6 + -1'Sstart_0 + -1'Sstart_1 + -1'Sstart_2 + -1'Sstart_3 + -1'Sstart_4 + -1'Sstart_5 + -1'Sstart_6 + -1's2_0 + -1's2_1 + -1's2_2 + -1's2_3 + -1's2_4 + -1's2_5 + -1's2_6 + -1's3_0 + -1's3_1 + -1's3_2 + -1's3_3 + -1's3_4 + -1's3_5 + -1's3_6 + -1's4_0 + -1's4_1 + -1's4_2 + -1's4_3 + -1's4_4 + -1's4_5 + -1's4_6 + -1's5_0 + -1's5_1 + -1's5_2 + -1's5_3 + -1's5_4 + -1's5_5 + -1's5_6 + -1's6_0 + -1's6_1 + -1's6_2 + -1's6_3 + -1's6_4 + -1's6_5 + -1's6_6 + -1'SstopOK_0 + -1'SstopOK_1 + -1'SstopOK_2 + -1'SstopOK_3 + -1'SstopOK_4 + -1'SstopOK_5 + -1'SstopOK_6 + -1'CstopOK_0 + -1'CstopOK_1 + -1'CstopOK_2 + -1'CstopOK_3 + -1'CstopOK_4 + -1'CstopOK_5 + -1'CstopOK_6 = -11
invariant :n9_7 + -1'SstopOK_1 + CstopOK_0 = 0
invariant :n7_28 + -1'n7_34 + -1'Cstart_0 + Cstart_6 = 0
invariant :n7_0 + -1'n7_6 + -1'Cstart_0 + Cstart_6 = 0
invariant :n9_43 + -1'SstopOK_6 + CstopOK_1 = 0
invariant :n9_44 + -1'SstopOK_6 + CstopOK_2 = 0
invariant :n6_3 + -1'n6_6 + n5_3 + -1'n5_6 = 0
invariant :n7_5 + -1'n7_6 + -1'Cstart_5 + Cstart_6 = 0
invariant :n8_33 + -1'n8_34 + Cstart_5 + -1'Cstart_6 = 0
invariant :n4_2 + -1'n4_6 + n3_2 + -1'n3_6 = 0
invariant :n8_7 + -1'n8_13 + Cstart_0 + -1'Cstart_6 = 0
invariant :n7_15 + -1'n7_20 + -1'Cstart_1 + Cstart_6 = 0
invariant :n9_27 + -1'SstopOK_3 + CstopOK_6 = 0
invariant :n9_46 + -1'SstopOK_6 + CstopOK_4 = 0
invariant :n9_12 + -1'SstopOK_1 + CstopOK_5 = 0
invariant :n8_0 + -1'n8_6 + Cstart_0 + -1'Cstart_6 = 0
invariant :n4_5 + -1'n4_6 + n3_5 + -1'n3_6 = 0
invariant :n7_22 + -1'n7_27 + -1'Cstart_1 + Cstart_6 = 0
invariant :n7_2 + -1'n7_6 + -1'Cstart_2 + Cstart_6 = 0
invariant :n9_1 + -1'SstopOK_0 + CstopOK_1 = 0
invariant :n8_1 + -1'n8_6 + Cstart_1 + -1'Cstart_6 = 0
invariant :n8_2 + -1'n8_6 + Cstart_2 + -1'Cstart_6 = 0
invariant :n7_23 + -1'n7_27 + -1'Cstart_2 + Cstart_6 = 0
invariant :n9_5 + -1'SstopOK_0 + CstopOK_5 = 0
invariant :n8_47 + -1'n8_48 + Cstart_5 + -1'Cstart_6 = 0
invariant :n9_37 + -1'SstopOK_5 + CstopOK_2 = 0
invariant :n8_45 + -1'n8_48 + Cstart_3 + -1'Cstart_6 = 0
invariant :n9_10 + -1'SstopOK_1 + CstopOK_3 = 0
invariant :n7_40 + -1'n7_41 + -1'Cstart_5 + Cstart_6 = 0
invariant :n8_5 + -1'n8_6 + Cstart_5 + -1'Cstart_6 = 0
invariant :n7_44 + -1'n7_48 + -1'Cstart_2 + Cstart_6 = 0
invariant :n9_6 + -1'SstopOK_0 + CstopOK_6 = 0
invariant :n8_40 + -1'n8_41 + Cstart_5 + -1'Cstart_6 = 0
invariant :n2_1 + -1'n2_6 + n1_1 + -1'n1_6 = 0
invariant :n9_3 + -1'SstopOK_0 + CstopOK_3 = 0
invariant :n8_35 + -1'n8_41 + Cstart_0 + -1'Cstart_6 = 0
invariant :n7_35 + -1'n7_41 + -1'Cstart_0 + Cstart_6 = 0
invariant :n9_15 + -1'SstopOK_2 + CstopOK_1 = 0
invariant :n2_2 + -1'n2_6 + n1_2 + -1'n1_6 = 0
invariant :n9_42 + -1'SstopOK_6 + CstopOK_0 = 0
invariant :n8_16 + -1'n8_20 + Cstart_2 + -1'Cstart_6 = 0
invariant :n7_3 + -1'n7_6 + -1'Cstart_3 + Cstart_6 = 0
invariant :n4_0 + -1'n4_6 + n3_0 + -1'n3_6 = 0
invariant :CstopAbort_0 + c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 + c1_6 + Cstart_0 + Cstart_1 + Cstart_2 + Cstart_3 + Cstart_4 + Cstart_5 + Cstart_6 + CstopOK_0 + CstopOK_1 + CstopOK_2 + CstopOK_3 + CstopOK_4 + CstopOK_5 + CstopOK_6 = 7
invariant :n9_18 + -1'SstopOK_2 + CstopOK_4 = 0
invariant :n7_32 + -1'n7_34 + -1'Cstart_4 + Cstart_6 = 0
invariant :n9_2 + -1'SstopOK_0 + CstopOK_2 = 0
invariant :n9_40 + -1'SstopOK_5 + CstopOK_5 = 0
invariant :n8_29 + -1'n8_34 + Cstart_1 + -1'Cstart_6 = 0
invariant :n7_45 + -1'n7_48 + -1'Cstart_3 + Cstart_6 = 0
invariant :n8_9 + -1'n8_13 + Cstart_2 + -1'Cstart_6 = 0
invariant :n9_48 + -1'SstopOK_6 + CstopOK_6 = 0
invariant :n9_45 + -1'SstopOK_6 + CstopOK_3 = 0
invariant :n4_4 + -1'n4_6 + n3_4 + -1'n3_6 = 0
invariant :n9_8 + -1'SstopOK_1 + CstopOK_1 = 0
invariant :n8_46 + -1'n8_48 + Cstart_4 + -1'Cstart_6 = 0
invariant :n8_30 + -1'n8_34 + Cstart_2 + -1'Cstart_6 = 0
invariant :n9_23 + -1'SstopOK_3 + CstopOK_2 = 0
invariant :n7_8 + -1'n7_13 + -1'Cstart_1 + Cstart_6 = 0
invariant :n9_41 + -1'SstopOK_5 + CstopOK_6 = 0
invariant :n7_30 + -1'n7_34 + -1'Cstart_2 + Cstart_6 = 0
invariant :n4_3 + -1'n4_6 + n3_3 + -1'n3_6 = 0
invariant :n8_10 + -1'n8_13 + Cstart_3 + -1'Cstart_6 = 0
invariant :n9_29 + -1'SstopOK_4 + CstopOK_1 = 0
invariant :n7_43 + -1'n7_48 + -1'Cstart_1 + Cstart_6 = 0
invariant :n7_18 + -1'n7_20 + -1'Cstart_4 + Cstart_6 = 0
invariant :n9_0 + -1'SstopOK_0 + CstopOK_0 = 0
invariant :n8_15 + -1'n8_20 + Cstart_1 + -1'Cstart_6 = 0
invariant :n7_1 + -1'n7_6 + -1'Cstart_1 + Cstart_6 = 0
invariant :SstopAbort_0 + Sstart_0 + Sstart_1 + Sstart_2 + Sstart_3 + Sstart_4 + Sstart_5 + Sstart_6 + s2_0 + s2_1 + s2_2 + s2_3 + s2_4 + s2_5 + s2_6 + s3_0 + s3_1 + s3_2 + s3_3 + s3_4 + s3_5 + s3_6 + s4_0 + s4_1 + s4_2 + s4_3 + s4_4 + s4_5 + s4_6 + s5_0 + s5_1 + s5_2 + s5_3 + s5_4 + s5_5 + s5_6 + s6_0 + s6_1 + s6_2 + s6_3 + s6_4 + s6_5 + s6_6 + SstopOK_0 + SstopOK_1 + SstopOK_2 + SstopOK_3 + SstopOK_4 + SstopOK_5 + SstopOK_6 = 7
invariant :n7_17 + -1'n7_20 + -1'Cstart_3 + Cstart_6 = 0
invariant :n8_39 + -1'n8_41 + Cstart_4 + -1'Cstart_6 = 0
invariant :n6_5 + -1'n6_6 + n5_5 + -1'n5_6 = 0
invariant :n9_32 + -1'SstopOK_4 + CstopOK_4 = 0
invariant :n2_0 + -1'n2_6 + n1_0 + -1'n1_6 = 0
invariant :n7_36 + -1'n7_41 + -1'Cstart_1 + Cstart_6 = 0
invariant :n8_4 + -1'n8_6 + Cstart_4 + -1'Cstart_6 = 0
invariant :n7_42 + -1'n7_48 + -1'Cstart_0 + Cstart_6 = 0
invariant :n8_38 + -1'n8_41 + Cstart_3 + -1'Cstart_6 = 0
invariant :n7_12 + -1'n7_13 + -1'Cstart_5 + Cstart_6 = 0
invariant :n8_22 + -1'n8_27 + Cstart_1 + -1'Cstart_6 = 0
invariant :n6_1 + -1'n6_6 + n5_1 + -1'n5_6 = 0
invariant :n9_28 + -1'SstopOK_4 + CstopOK_0 = 0
invariant :n9_47 + -1'SstopOK_6 + CstopOK_5 = 0
invariant :n7_31 + -1'n7_34 + -1'Cstart_3 + Cstart_6 = 0
invariant :n9_19 + -1'SstopOK_2 + CstopOK_5 = 0
invariant :n7_10 + -1'n7_13 + -1'Cstart_3 + Cstart_6 = 0
invariant :n6_0 + -1'n6_6 + n5_0 + -1'n5_6 = 0
invariant :n9_17 + -1'SstopOK_2 + CstopOK_3 = 0
invariant :AstopAbort_0 + a5_0 + a4_0 + a3_0 + a2_0 + a1_0 + Astart_0 + AstopOK_0 = 1
invariant :n9_31 + -1'SstopOK_4 + CstopOK_3 = 0
invariant :n8_23 + -1'n8_27 + Cstart_2 + -1'Cstart_6 = 0
invariant :n9_36 + -1'SstopOK_5 + CstopOK_1 = 0
invariant :n4_1 + -1'n4_6 + n3_1 + -1'n3_6 = 0
invariant :n8_26 + -1'n8_27 + Cstart_5 + -1'Cstart_6 = 0
invariant :n9_30 + -1'SstopOK_4 + CstopOK_2 = 0
invariant :n7_19 + -1'n7_20 + -1'Cstart_5 + Cstart_6 = 0
invariant :n9_39 + -1'SstopOK_5 + CstopOK_4 = 0
invariant :n7_33 + -1'n7_34 + -1'Cstart_5 + Cstart_6 = 0
invariant :n9_21 + -1'SstopOK_3 + CstopOK_0 = 0
invariant :n7_25 + -1'n7_27 + -1'Cstart_4 + Cstart_6 = 0
invariant :n8_32 + -1'n8_34 + Cstart_4 + -1'Cstart_6 = 0
invariant :n8_37 + -1'n8_41 + Cstart_2 + -1'Cstart_6 = 0
invariant :n8_44 + -1'n8_48 + Cstart_2 + -1'Cstart_6 = 0
invariant :n9_26 + -1'SstopOK_3 + CstopOK_5 = 0
invariant :n9_13 + -1'SstopOK_1 + CstopOK_6 = 0
invariant :n9_25 + -1'SstopOK_3 + CstopOK_4 = 0
invariant :n9_4 + -1'SstopOK_0 + CstopOK_4 = 0
invariant :n7_14 + -1'n7_20 + -1'Cstart_0 + Cstart_6 = 0
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-07 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-11 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Document\_flat\_flat,2.27196e+06,37.3403,366352,2,201814,5,1.80068e+06,6,0,1262,1.52099e+06,0
Total reachable state count : 2271960
Verifying 16 reachability properties.
Invariant property QuasiCertifProtocol-COL-06-ReachabilityCardinality-00 does not hold.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-00,1,37.3837,366560,2,271,6,1.80068e+06,7,0,1315,1.52099e+06,0
Invariant property QuasiCertifProtocol-COL-06-ReachabilityCardinality-01 does not hold.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-01,1,37.4514,366656,2,271,6,1.80068e+06,8,0,1435,1.52099e+06,0
Reachability property QuasiCertifProtocol-COL-06-ReachabilityCardinality-02 does not hold.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-02
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-02,0,38.4759,366656,1,0,6,1.80068e+06,9,0,2237,1.52099e+06,0
Invariant property QuasiCertifProtocol-COL-06-ReachabilityCardinality-03 does not hold.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-03,229272,39.4008,366656,2,53037,7,1.80068e+06,10,0,2299,1.52099e+06,0
Reachability property QuasiCertifProtocol-COL-06-ReachabilityCardinality-04 is true.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-04,70,39.7898,366656,2,959,8,1.80068e+06,11,0,2427,1.52099e+06,0
Reachability property QuasiCertifProtocol-COL-06-ReachabilityCardinality-05 is true.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-05,2,39.8223,366656,2,296,9,1.80068e+06,12,0,2489,1.52099e+06,0
Invariant property QuasiCertifProtocol-COL-06-ReachabilityCardinality-06 does not hold.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-06,26,39.8354,366656,2,1565,10,1.80068e+06,13,0,2499,1.52099e+06,0
Reachability property QuasiCertifProtocol-COL-06-ReachabilityCardinality-07 does not hold.
No reachable states exhibit your property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-07
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-07,0,40.4153,366656,1,0,10,1.80068e+06,14,0,2506,1.52099e+06,0
Reachability property QuasiCertifProtocol-COL-06-ReachabilityCardinality-08 is true.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-08,2.0075e+06,41.4884,366656,2,178345,11,1.80068e+06,15,0,2575,1.52099e+06,0
Reachability property QuasiCertifProtocol-COL-06-ReachabilityCardinality-09 does not hold.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-09
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-09,0,42.0357,366656,1,0,11,1.80068e+06,16,0,2700,1.52099e+06,0
Reachability property QuasiCertifProtocol-COL-06-ReachabilityCardinality-10 does not hold.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : QuasiCertifProtocol-COL-06-ReachabilityCardinality-10
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-10,0,43.5523,366656,1,0,11,1.80068e+06,17,0,2794,1.52099e+06,0
Invariant property QuasiCertifProtocol-COL-06-ReachabilityCardinality-11 is true.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-11,0,44.0164,366656,1,0,11,1.80068e+06,18,0,2797,1.52099e+06,0
Invariant property QuasiCertifProtocol-COL-06-ReachabilityCardinality-12 does not hold.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-12,1,44.0291,366656,2,271,11,1.80068e+06,19,0,2822,1.52099e+06,0
Reachability property QuasiCertifProtocol-COL-06-ReachabilityCardinality-13 is true.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-13,97758,47.2454,366656,2,40139,12,1.80068e+06,20,0,6823,1.52099e+06,0
Invariant property QuasiCertifProtocol-COL-06-ReachabilityCardinality-14 does not hold.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-14,2.16162e+06,50.3551,366656,2,183968,13,1.80068e+06,21,0,9208,1.52099e+06,0
Invariant property QuasiCertifProtocol-COL-06-ReachabilityCardinality-15 does not hold.
FORMULA QuasiCertifProtocol-COL-06-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-COL-06-ReachabilityCardinality-15,1,50.6192,366676,2,271,14,1.80068e+06,22,0,9250,1.52099e+06,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1527875527050
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 5:50:50 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 01, 2018 5:50:50 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 5:50:50 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Jun 01, 2018 5:51:12 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 21251 ms
Jun 01, 2018 5:51:12 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 30 places.
Jun 01, 2018 5:51:12 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Jun 01, 2018 5:51:12 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :tsidxtsid->n9,n8,n7,
Dot->malicious_reservoir,CstopAbort,SstopAbort,AstopAbort,a5,a4,a3,a2,a1,Astart,AstopOK,
tsid->n6,n5,n4,n3,n2,n1,c1,Cstart,Sstart,s2,s3,s4,s5,s6,SstopOK,CstopOK,
Jun 01, 2018 5:51:12 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 26 transitions.
Jun 01, 2018 5:51:12 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Jun 01, 2018 5:51:12 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 15 ms
Jun 01, 2018 5:51:12 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 164 ms
Jun 01, 2018 5:51:13 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 87 ms
Jun 01, 2018 5:51:13 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 24 ms
Jun 01, 2018 5:51:14 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 84 ms
Jun 01, 2018 5:51:14 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 3 ms
Jun 01, 2018 5:51:14 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 74 transitions. Expanding to a total of 123 deterministic transitions.
Jun 01, 2018 5:51:14 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 41 ms.
Jun 01, 2018 5:51:14 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 74 transitions. Expanding to a total of 123 deterministic transitions.
Jun 01, 2018 5:51:14 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 5 ms.
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 155 place invariants in 128 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1145 ms.
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-00(UNSAT) depth K=0 took 29 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-01(UNSAT) depth K=0 took 18 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-02(UNSAT) depth K=0 took 14 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-03(UNSAT) depth K=0 took 52 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-04(UNSAT) depth K=0 took 16 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-05(UNSAT) depth K=0 took 14 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-06(UNSAT) depth K=0 took 14 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 74 transitions. Expanding to a total of 123 deterministic transitions.
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 1 ms.
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-07(UNSAT) depth K=0 took 28 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-08(UNSAT) depth K=0 took 8 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-09(UNSAT) depth K=0 took 7 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-10(UNSAT) depth K=0 took 19 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-11(UNSAT) depth K=0 took 12 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-12(UNSAT) depth K=0 took 11 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-13(UNSAT) depth K=0 took 18 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-14(UNSAT) depth K=0 took 8 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-15(UNSAT) depth K=0 took 15 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 155 place invariants in 39 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-00(UNSAT) depth K=1 took 92 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-01(UNSAT) depth K=1 took 109 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-02(UNSAT) depth K=1 took 45 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-03(UNSAT) depth K=1 took 18 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-04(UNSAT) depth K=1 took 9 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-05(UNSAT) depth K=1 took 36 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-06(UNSAT) depth K=1 took 15 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-07(UNSAT) depth K=1 took 7 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-08(UNSAT) depth K=1 took 8 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-09(UNSAT) depth K=1 took 6 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-10(UNSAT) depth K=1 took 12 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-11(UNSAT) depth K=1 took 28 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-12(UNSAT) depth K=1 took 13 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-13(UNSAT) depth K=1 took 47 ms
Jun 01, 2018 5:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-14(UNSAT) depth K=1 took 19 ms
Jun 01, 2018 5:51:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-15(UNSAT) depth K=1 took 6 ms
Jun 01, 2018 5:51:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-00(UNSAT) depth K=2 took 413 ms
Jun 01, 2018 5:51:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-01(UNSAT) depth K=2 took 926 ms
Jun 01, 2018 5:51:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-02(UNSAT) depth K=2 took 300 ms
Jun 01, 2018 5:51:17 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 270 variables to be positive in 2900 ms
Jun 01, 2018 5:51:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 116 transitions.
Jun 01, 2018 5:51:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/116 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 5:51:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 25 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 5:51:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 116 transitions.
Jun 01, 2018 5:51:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 22 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 5:51:18 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 270 variables to be positive in 2533 ms
Jun 01, 2018 5:51:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-03(UNSAT) depth K=2 took 464 ms
Jun 01, 2018 5:51:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-04(UNSAT) depth K=2 took 845 ms
Jun 01, 2018 5:51:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-05(UNSAT) depth K=2 took 650 ms
Jun 01, 2018 5:51:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-06(UNSAT) depth K=2 took 1059 ms
Jun 01, 2018 5:51:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-00
Jun 01, 2018 5:51:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-00(SAT) depth K=0 took 3068 ms
Jun 01, 2018 5:51:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-07(UNSAT) depth K=2 took 531 ms
Jun 01, 2018 5:51:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-08(UNSAT) depth K=2 took 270 ms
Jun 01, 2018 5:51:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-09(UNSAT) depth K=2 took 530 ms
Jun 01, 2018 5:51:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-01
Jun 01, 2018 5:51:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-01(SAT) depth K=0 took 1121 ms
Jun 01, 2018 5:51:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-10(UNSAT) depth K=2 took 250 ms
Jun 01, 2018 5:51:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-11(UNSAT) depth K=2 took 374 ms
Jun 01, 2018 5:51:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-12(UNSAT) depth K=2 took 720 ms
Jun 01, 2018 5:51:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-02
Jun 01, 2018 5:51:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-02(SAT) depth K=0 took 1423 ms
Jun 01, 2018 5:51:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-13(UNSAT) depth K=2 took 700 ms
Jun 01, 2018 5:51:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-14(UNSAT) depth K=2 took 399 ms
Jun 01, 2018 5:51:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-03
Jun 01, 2018 5:51:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-03(SAT) depth K=0 took 1205 ms
Jun 01, 2018 5:51:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-15(UNSAT) depth K=2 took 521 ms
Jun 01, 2018 5:51:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-04
Jun 01, 2018 5:51:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-04(SAT) depth K=0 took 1028 ms
Jun 01, 2018 5:51:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-05
Jun 01, 2018 5:51:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-05(SAT) depth K=0 took 745 ms
Jun 01, 2018 5:51:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-06
Jun 01, 2018 5:51:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-06(SAT) depth K=0 took 3053 ms
Jun 01, 2018 5:51:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate QuasiCertifProtocol-COL-06-ReachabilityCardinality-07
Jun 01, 2018 5:51:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for QuasiCertifProtocol-COL-06-ReachabilityCardinality-07
Jun 01, 2018 5:51:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-07(FALSE) depth K=0 took 97 ms
Jun 01, 2018 5:51:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-08
Jun 01, 2018 5:51:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-08(SAT) depth K=0 took 817 ms
Jun 01, 2018 5:51:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-09
Jun 01, 2018 5:51:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-09(SAT) depth K=0 took 714 ms
Jun 01, 2018 5:51:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-10
Jun 01, 2018 5:51:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-10(SAT) depth K=0 took 752 ms
Jun 01, 2018 5:51:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant QuasiCertifProtocol-COL-06-ReachabilityCardinality-11
Jun 01, 2018 5:51:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for QuasiCertifProtocol-COL-06-ReachabilityCardinality-11
Jun 01, 2018 5:51:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-11(TRUE) depth K=0 took 157 ms
Jun 01, 2018 5:51:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-12
Jun 01, 2018 5:51:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-12(SAT) depth K=0 took 4594 ms
Jun 01, 2018 5:51:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 116 transitions.
Jun 01, 2018 5:51:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-13
Jun 01, 2018 5:51:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-13(SAT) depth K=0 took 1477 ms
Jun 01, 2018 5:51:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-00(UNSAT) depth K=3 took 13594 ms
Jun 01, 2018 5:51:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/116) took 946 ms. Total solver calls (SAT/UNSAT): 104(104/0)
Jun 01, 2018 5:51:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-14
Jun 01, 2018 5:51:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-14(SAT) depth K=0 took 904 ms
Jun 01, 2018 5:51:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-15
Jun 01, 2018 5:51:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-15(SAT) depth K=0 took 750 ms
Jun 01, 2018 5:51:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/116) took 4557 ms. Total solver calls (SAT/UNSAT): 510(510/0)
Jun 01, 2018 5:51:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/116) took 8359 ms. Total solver calls (SAT/UNSAT): 900(900/0)
Jun 01, 2018 5:51:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/116) took 12095 ms. Total solver calls (SAT/UNSAT): 1274(1274/0)
Jun 01, 2018 5:51:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-00
Jun 01, 2018 5:51:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-00(SAT) depth K=1 took 11422 ms
Jun 01, 2018 5:51:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/116) took 15713 ms. Total solver calls (SAT/UNSAT): 1632(1632/0)
Jun 01, 2018 5:51:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-01
Jun 01, 2018 5:51:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-01(SAT) depth K=1 took 2374 ms
Jun 01, 2018 5:51:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-03
Jun 01, 2018 5:51:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-03(SAT) depth K=1 took 3056 ms
Jun 01, 2018 5:51:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/116) took 19115 ms. Total solver calls (SAT/UNSAT): 1974(1974/0)
Jun 01, 2018 5:51:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-01(UNSAT) depth K=3 took 19089 ms
Jun 01, 2018 5:52:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/116) took 22432 ms. Total solver calls (SAT/UNSAT): 2300(2300/0)
Jun 01, 2018 5:52:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-COL-06-ReachabilityCardinality-10
Jun 01, 2018 5:52:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-10(SAT) depth K=1 took 4830 ms
Jun 01, 2018 5:52:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-COL-06-ReachabilityCardinality-02(UNSAT) depth K=3 took 4636 ms
Jun 01, 2018 5:52:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/116) took 25763 ms. Total solver calls (SAT/UNSAT): 2610(2610/0)
Jun 01, 2018 5:52:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 5:52:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying QuasiCertifProtocol-COL-06-ReachabilityCardinality-03 SMT depth 3
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Jun 01, 2018 5:52:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 3
Jun 01, 2018 5:52:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 3
Jun 01, 2018 5:52:05 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 5:52:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying QuasiCertifProtocol-COL-06-ReachabilityCardinality-13 K-induction depth 1
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
Jun 01, 2018 5:52:05 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 2/ 16 properties. Interrupting other analysis methods.
Jun 01, 2018 5:52:05 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 51680ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-COL-06"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-COL-06.tgz
mv QuasiCertifProtocol-COL-06 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is QuasiCertifProtocol-COL-06, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r141-qhx2-152673582500019"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;