Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..........................................
/home/mcc/execution
total 204K
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.7K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 117 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 355 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 34K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is QuasiCertifProtocol-COL-02, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r141-qhx2-152673582500013
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-COL-02-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527875317458

17:49:01.093 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
17:49:01.098 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Flatten gal took : 231 ms
Constant places removed 11 places and 1 transitions.
Iterating post reduction 0 with 11 rules applied. Total rules applied 11 place count 75 transition count 55
Performed 2 Post agglomeration using F-continuation condition.
Constant places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 13 place count 73 transition count 53
Applied a total of 13 rules in 26 ms. Remains 73 /86 variables (removed 13) and now considering 53/56 (removed 3) transitions.
// Phase 1: matrix 53 rows 73 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
// Phase 1: matrix 53 rows 73 cols
No direction supplied, using forward translation only.
built 14 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,1017,0.097308,6088,471,142,2733,296,180,1383,73,930,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,47,0.181221,8316,139,113,6813,2105,591,6629,308,17040,9925

System contains 47 deadlocks (shown below if less than --print-limit option) !
FORMULA QuasiCertifProtocol-COL-02-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 47 states ] showing 10 first states
[ tsidxtsid8={[ n9_8=1 ]
} tsidxtsid7={[ n9_7=1 ]
} tsidxtsid5={[ n9_5=1 ]
} tsidxtsid6={[ n9_6=1 ]
} tsidxtsid4={[ n9_4=1 ]
} tsidxtsid3={[ n9_3=1 ]
} tsidxtsid2={[ ]
} tsidxtsid1={[ ]
} tsidxtsid0={[ ]
} malicious_reservoir={[ ]
} tsid2={[ n6_2=1 c1_2=1 ]
} tsid1={[ n6_1=1 c1_1=1 ]
} tsid0={[ n6_0=1 c1_0=1 ]
} a5={[ ]
} a3={[ ]
} a1={[ ]
} ]
[ tsidxtsid8={[ n9_8=1 ]
} tsidxtsid7={[ n9_7=1 ]
} tsidxtsid5={[ n9_5=1 ]
} tsidxtsid6={[ n9_6=1 ]
} tsidxtsid4={[ n9_4=1 ]
} tsidxtsid3={[ n9_3=1 ]
} tsidxtsid2={[ ]
} tsidxtsid1={[ ]
} tsidxtsid0={[ ]
} malicious_reservoir={[ ]
} tsid2={[ c1_2=1 ]
} tsid1={[ c1_1=1 ]
} tsid0={[ c1_0=1 ]
} a5={[ ]
} a3={[ ]
} a1={[ ]
} ]
[ tsidxtsid8={[ n9_8=1 ]
} tsidxtsid7={[ n9_7=1 ]
} tsidxtsid5={[ n9_5=1 ]
} tsidxtsid6={[ n9_6=1 ]
} tsidxtsid4={[ n9_4=1 ]
} tsidxtsid3={[ n9_3=1 ]
} tsidxtsid2={[ n8_2=1 ]
} tsidxtsid1={[ n8_1=1 ]
} tsidxtsid0={[ n8_0=1 ]
} malicious_reservoir={[ ]
} tsid2={[ n6_2=1 c1_2=1 ]
} tsid1={[ n6_1=1 c1_1=1 ]
} tsid0={[ n6_0=1 c1_0=1 ]
} a5={[ ]
} a3={[ ]
} a1={[ ]
} ]
[ tsidxtsid8={[ n9_8=1 ]
} tsidxtsid7={[ n9_7=1 ]
} tsidxtsid5={[ n9_5=1 ]
} tsidxtsid6={[ n9_6=1 ]
} tsidxtsid4={[ n9_4=1 ]
} tsidxtsid3={[ n9_3=1 ]
} tsidxtsid2={[ n8_2=1 ]
} tsidxtsid1={[ n8_1=1 ]
} tsidxtsid0={[ n8_0=1 ]
} malicious_reservoir={[ ]
} tsid2={[ c1_2=1 ]
} tsid1={[ c1_1=1 ]
} tsid0={[ c1_0=1 ]
} a5={[ ]
} a3={[ ]
} a1={[ ]
} ]
[ tsidxtsid8={[ n9_8=1 ]
} tsidxtsid7={[ n9_7=1 ]
} tsidxtsid5={[ ]
} tsidxtsid6={[ n9_6=1 ]
} tsidxtsid4={[ ]
} tsidxtsid3={[ ]
} tsidxtsid2={[ n9_2=1 ]
} tsidxtsid1={[ n9_1=1 ]
} tsidxtsid0={[ n9_0=1 ]
} malicious_reservoir={[ ]
} tsid2={[ n6_2=1 c1_2=1 ]
} tsid1={[ n6_1=1 c1_1=1 ]
} tsid0={[ n6_0=1 c1_0=1 ]
} a5={[ ]
} a3={[ ]
} a1={[ ]
} ]
[ tsidxtsid8={[ n9_8=1 ]
} tsidxtsid7={[ n9_7=1 ]
} tsidxtsid5={[ ]
} tsidxtsid6={[ n9_6=1 ]
} tsidxtsid4={[ ]
} tsidxtsid3={[ ]
} tsidxtsid2={[ n9_2=1 ]
} tsidxtsid1={[ n9_1=1 ]
} tsidxtsid0={[ n9_0=1 ]
} malicious_reservoir={[ ]
} tsid2={[ c1_2=1 ]
} tsid1={[ c1_1=1 ]
} tsid0={[ c1_0=1 ]
} a5={[ ]
} a3={[ ]
} a1={[ ]
} ]
[ tsidxtsid8={[ n9_8=1 ]
} tsidxtsid7={[ n9_7=1 ]
} tsidxtsid5={[ n8_5=1 ]
} tsidxtsid6={[ n9_6=1 ]
} tsidxtsid4={[ n8_4=1 ]
} tsidxtsid3={[ n8_3=1 ]
} tsidxtsid2={[ n9_2=1 ]
} tsidxtsid1={[ n9_1=1 ]
} tsidxtsid0={[ n9_0=1 ]
} malicious_reservoir={[ ]
} tsid2={[ n6_2=1 c1_2=1 ]
} tsid1={[ n6_1=1 c1_1=1 ]
} tsid0={[ n6_0=1 c1_0=1 ]
} a5={[ ]
} a3={[ ]
} a1={[ ]
} ]
[ tsidxtsid8={[ n9_8=1 ]
} tsidxtsid7={[ n9_7=1 ]
} tsidxtsid5={[ n8_5=1 ]
} tsidxtsid6={[ n9_6=1 ]
} tsidxtsid4={[ n8_4=1 ]
} tsidxtsid3={[ n8_3=1 ]
} tsidxtsid2={[ n9_2=1 ]
} tsidxtsid1={[ n9_1=1 ]
} tsidxtsid0={[ n9_0=1 ]
} malicious_reservoir={[ ]
} tsid2={[ c1_2=1 ]
} tsid1={[ c1_1=1 ]
} tsid0={[ c1_0=1 ]
} a5={[ ]
} a3={[ ]
} a1={[ ]
} ]
[ tsidxtsid8={[ n9_8=1 ]
} tsidxtsid7={[ ]
} tsidxtsid5={[ n9_5=1 ]
} tsidxtsid6={[ ]
} tsidxtsid4={[ ]
} tsidxtsid3={[ ]
} tsidxtsid2={[ n9_2=1 ]
} tsidxtsid1={[ ]
} tsidxtsid0={[ ]
} malicious_reservoir={[ ]
} tsid2={[ ]
} tsid1={[ ]
} tsid0={[ ]
} a5={[ ]
} a3={[ ]
} a1={[ ]
} ]
[ tsidxtsid8={[ n9_8=1 ]
} tsidxtsid7={[ ]
} tsidxtsid5={[ n9_5=1 ]
} tsidxtsid6={[ ]
} tsidxtsid4={[ ]
} tsidxtsid3={[ ]
} tsidxtsid2={[ n9_2=1 ]
} tsidxtsid1={[ ]
} tsidxtsid0={[ ]
} malicious_reservoir={[ ]
} tsid2={[ n6_2=1 ]
} tsid1={[ n6_1=1 ]
} tsid0={[ n6_0=1 ]
} a5={[ ]
} a3={[ ]
} a1={[ ]
} ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527875344679

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 5:48:40 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 01, 2018 5:48:40 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 5:48:40 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Jun 01, 2018 5:49:01 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 21378 ms
Jun 01, 2018 5:49:01 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 30 places.
Jun 01, 2018 5:49:01 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Jun 01, 2018 5:49:01 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :tsidxtsid->n9,n8,n7,
Dot->malicious_reservoir,CstopAbort,SstopAbort,AstopAbort,a5,a4,a3,a2,a1,Astart,AstopOK,
tsid->n6,n5,n4,n3,n2,n1,c1,Cstart,Sstart,s2,s3,s4,s5,s6,SstopOK,CstopOK,

Jun 01, 2018 5:49:01 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 26 transitions.
Jun 01, 2018 5:49:01 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Jun 01, 2018 5:49:01 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 9 ms
Jun 01, 2018 5:49:02 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 143 ms
Jun 01, 2018 5:49:02 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 4 ms
Jun 01, 2018 5:49:02 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 42 transitions. Expanding to a total of 63 deterministic transitions.
Jun 01, 2018 5:49:02 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 23 ms.
Jun 01, 2018 5:49:02 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 01, 2018 5:49:02 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 46 ms
Jun 01, 2018 5:49:03 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 53 transitions.
Jun 01, 2018 5:49:03 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 85 ms
Jun 01, 2018 5:49:03 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 01, 2018 5:49:03 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 71 ms
Jun 01, 2018 5:49:03 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 01, 2018 5:49:03 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 28 redundant transitions.
Jun 01, 2018 5:49:03 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 4 ms
Jun 01, 2018 5:49:03 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 11 ms
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout :(error "Failed to check-sat")
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 5:49:03 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 532ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-COL-02"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-COL-02.tgz
mv QuasiCertifProtocol-COL-02 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is QuasiCertifProtocol-COL-02, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r141-qhx2-152673582500013"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;