About the Execution of ITS-Tools for ResAllocation-PT-R003C015
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15742.620 | 293035.00 | 306673.00 | 1146.10 | TTFFFFFTTTTTFTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
...............................................................................................
/home/mcc/execution
total 268K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 103K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ResAllocation-PT-R003C015, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r140-qhx2-152673582200354
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-00
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-01
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-02
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-03
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-04
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-05
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-06
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-07
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-08
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-09
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-10
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-11
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-12
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-13
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-14
FORMULA_NAME ResAllocation-PT-R003C015-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1527859895044
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]
its-ctl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.78878e+08,0.670315,21344,2,6564,5,76517,6,0,423,106011,0
Converting to forward existential form...Done !
original formula: E(!((((r_7_1>=1)&&(p_7_2>=1))&&(r_6_1>=1))) U !(EX(((r_12_0>=1)&&(r_11_0>=1)))))
=> equivalent forward existential formula: [(FwdU(Init,!((((r_7_1>=1)&&(p_7_2>=1))&&(r_6_1>=1)))) * !(EX(((r_12_0>=1)&&(r_11_0>=1)))))] != FALSE
Reverse transition relation is NOT exact ! Due to transitions t_0_3, t_1_0, t_2_3, t_3_0, t_4_3, t_5_0, t_6_3, t_7_0, t_8_3, t_9_0, t_10_3, t_11_0, t_12_3, t_13_0, t_14_3, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/45/15/60
Hit Full ! (commute/partial/dont) 53/0/7
(forward)formula 0,1,7.08972,126668,1,0,150,620372,144,65,2917,814164,130
FORMULA ResAllocation-PT-R003C015-CTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: ((((r_7_0>=1)&&(p_7_1>=1))&&(r_6_0>=1)) + EF((EX((p_8_2>=1)) * EF((((r_7_0>=1)&&(p_7_1>=1))&&(r_6_0>=1))))))
=> equivalent forward existential formula: ([(Init * (((r_7_0>=1)&&(p_7_1>=1))&&(r_6_0>=1)))] != FALSE + [(FwdU((FwdU(Init,TRUE) * EX((p_8_2>=1))),TRUE) * (((r_7_0>=1)&&(p_7_1>=1))&&(r_6_0>=1)))] != FALSE)
(forward)formula 1,1,8.30529,143300,1,0,156,660960,147,69,2955,941868,139
FORMULA ResAllocation-PT-R003C015-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: AG((AF(((r_10_0>=1)&&(r_9_0>=1))) * ((!(p_13_0>=1))||(!(((r_4_0>=1)&&(r_3_0>=1))&&(p_5_0>=1))))))
=> equivalent forward existential formula: ([FwdG(FwdU(Init,TRUE),!(((r_10_0>=1)&&(r_9_0>=1))))] = FALSE * [(FwdU(Init,TRUE) * !(((!(p_13_0>=1))||(!(((r_4_0>=1)&&(r_3_0>=1))&&(p_5_0>=1))))))] = FALSE)
Hit Full ! (commute/partial/dont) 54/0/6
(forward)formula 2,0,9.19235,162044,1,0,158,729106,160,72,3102,1.1029e+06,145
FORMULA ResAllocation-PT-R003C015-CTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: E(EF((((r_5_2>=1)&&(r_4_2>=1))&&(((p_14_1>=1)&&(r_14_2>=1))&&(r_13_2>=1)))) U AX((((p_6_0>=1)&&(r_6_1>=1))&&(r_5_1>=1))))
=> equivalent forward existential formula: [(FwdU(Init,E(TRUE U (((r_5_2>=1)&&(r_4_2>=1))&&(((p_14_1>=1)&&(r_14_2>=1))&&(r_13_2>=1))))) * !(EX(!((((p_6_0>=1)&&(r_6_1>=1))&&(r_5_1>=1))))))] != FALSE
(forward)formula 3,0,55.4554,841380,1,0,279,3.84172e+06,172,184,3185,6.57153e+06,329
FORMULA ResAllocation-PT-R003C015-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: AX(!(EF(((((r_9_0>=1)&&(p_9_1>=1))&&(r_8_0>=1))&&((p_0_1>=1)&&(r_0_2>=1))))))
=> equivalent forward existential formula: [(FwdU(EY(Init),TRUE) * ((((r_9_0>=1)&&(p_9_1>=1))&&(r_8_0>=1))&&((p_0_1>=1)&&(r_0_2>=1))))] = FALSE
(forward)formula 4,0,55.5824,843228,1,0,281,3.84955e+06,173,185,3189,6.58057e+06,332
FORMULA ResAllocation-PT-R003C015-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: AG(!(((p_0_2>=1)&&(((p_8_1>=1)&&(r_8_2>=1))&&(r_7_2>=1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * ((p_0_2>=1)&&(((p_8_1>=1)&&(r_8_2>=1))&&(r_7_2>=1))))] = FALSE
(forward)formula 5,0,55.5906,843492,1,0,282,3.84993e+06,174,186,3192,6.58113e+06,333
FORMULA ResAllocation-PT-R003C015-CTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: AG(EF((((((r_13_1>=1)&&(p_13_2>=1))&&(r_12_1>=1))&&((r_10_0>=1)&&(r_9_0>=1)))||((((p_12_0>=1)&&(r_12_1>=1))&&(r_11_1>=1))&&(((p_14_1>=1)&&(r_14_2>=1))&&(r_13_2>=1))))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U (((((r_13_1>=1)&&(p_13_2>=1))&&(r_12_1>=1))&&((r_10_0>=1)&&(r_9_0>=1)))||((((p_12_0>=1)&&(r_12_1>=1))&&(r_11_1>=1))&&(((p_14_1>=1)&&(r_14_2>=1))&&(r_13_2>=1)))))))] = FALSE
(forward)formula 6,0,71.6688,1045200,1,0,298,4.76957e+06,175,196,3200,7.91298e+06,354
FORMULA ResAllocation-PT-R003C015-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: (AX(EG(!((((r_5_0>=1)&&(p_5_1>=1))&&(r_4_0>=1))))) * (E((p_6_2>=1) U ((((p_4_1>=1)&&(r_4_2>=1))&&(r_3_2>=1))&&(p_3_0>=1))) + !(AG((((r_10_0>=1)&&(r_9_0>=1))&&(p_10_2>=1))))))
=> equivalent forward existential formula: ([(EY(Init) * !(EG(!((((r_5_0>=1)&&(p_5_1>=1))&&(r_4_0>=1))))))] = FALSE * [((Init * !(!(!(E(TRUE U !((((r_10_0>=1)&&(r_9_0>=1))&&(p_10_2>=1)))))))) * !(E((p_6_2>=1) U ((((p_4_1>=1)&&(r_4_2>=1))&&(r_3_2>=1))&&(p_3_0>=1)))))] = FALSE)
(forward)formula 7,1,156.98,2157748,1,0,628,1.02885e+07,188,353,3210,1.692e+07,732
FORMULA ResAllocation-PT-R003C015-CTLFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: (E(EG(((r_12_0>=1)&&(r_11_0>=1))) U (p_13_0>=1)) + ((AX((((p_14_0>=1)&&(r_14_1>=1))&&(r_13_1>=1))) * !((((((r_5_1>=1)&&(p_5_2>=1))&&(r_4_1>=1))||(((r_1_1>=1)&&(p_1_2>=1))&&(r_0_1>=1)))&&(!(((r_5_0>=1)&&(p_5_1>=1))&&(r_4_0>=1)))))) + E((((p_12_1>=1)&&(r_12_2>=1))&&(r_11_2>=1)) U ((((p_6_0>=1)&&(r_6_1>=1))&&(r_5_1>=1))&&(p_14_2>=1)))))
=> equivalent forward existential formula: ([(EY(((Init * !(E(EG(((r_12_0>=1)&&(r_11_0>=1))) U (p_13_0>=1)))) * !(E((((p_12_1>=1)&&(r_12_2>=1))&&(r_11_2>=1)) U ((((p_6_0>=1)&&(r_6_1>=1))&&(r_5_1>=1))&&(p_14_2>=1)))))) * !((((p_14_0>=1)&&(r_14_1>=1))&&(r_13_1>=1))))] = FALSE * [(((Init * !(E(EG(((r_12_0>=1)&&(r_11_0>=1))) U (p_13_0>=1)))) * !(E((((p_12_1>=1)&&(r_12_2>=1))&&(r_11_2>=1)) U ((((p_6_0>=1)&&(r_6_1>=1))&&(r_5_1>=1))&&(p_14_2>=1))))) * (((((r_5_1>=1)&&(p_5_2>=1))&&(r_4_1>=1))||(((r_1_1>=1)&&(p_1_2>=1))&&(r_0_1>=1)))&&(!(((r_5_0>=1)&&(p_5_1>=1))&&(r_4_0>=1)))))] = FALSE)
(forward)formula 8,1,226.64,2216620,1,0,655,1.05489e+07,25,365,1464,1.73421e+07,253
FORMULA ResAllocation-PT-R003C015-CTLFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: EF(EG((((r_11_1>=1)&&(p_11_2>=1))&&(r_10_1>=1))))
=> equivalent forward existential formula: [FwdG(FwdU(Init,TRUE),(((r_11_1>=1)&&(p_11_2>=1))&&(r_10_1>=1)))] != FALSE
Hit Full ! (commute/partial/dont) 53/11/7
(forward)formula 9,1,226.901,2216620,1,0,655,1.05489e+07,34,365,1766,1.73421e+07,257
FORMULA ResAllocation-PT-R003C015-CTLFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: !(AX(AF(((r_7_2>=1)&&(r_6_2>=1)))))
=> equivalent forward existential formula: [FwdG(EY(Init),!(((r_7_2>=1)&&(r_6_2>=1))))] != FALSE
Hit Full ! (commute/partial/dont) 54/0/6
(forward)formula 10,1,227.257,2216620,1,0,655,1.05489e+07,42,365,1839,1.73421e+07,262
FORMULA ResAllocation-PT-R003C015-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: EX(EF(((((r_3_2>=1)&&(r_2_2>=1))&&(p_14_2>=1))&&(!((r_7_2>=1)&&(r_6_2>=1))))))
=> equivalent forward existential formula: [(FwdU(EY(Init),TRUE) * ((((r_3_2>=1)&&(r_2_2>=1))&&(p_14_2>=1))&&(!((r_7_2>=1)&&(r_6_2>=1)))))] != FALSE
(forward)formula 11,1,227.565,2216620,1,0,655,1.05489e+07,47,365,1850,1.73421e+07,265
FORMULA ResAllocation-PT-R003C015-CTLFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: AG(!(AX(((r_0_0>=1)&&((r_11_2>=1)&&(r_10_2>=1))))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(EX(!(((r_0_0>=1)&&((r_11_2>=1)&&(r_10_2>=1)))))))] = FALSE
(forward)formula 12,0,229.209,2216620,1,0,655,1.05489e+07,49,365,1856,1.73421e+07,270
FORMULA ResAllocation-PT-R003C015-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: EF(((((r_11_0>=1)&&(p_11_1>=1))&&(r_10_0>=1))&&((p_3_0>=1)&&(r_0_0>=1))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * ((((r_11_0>=1)&&(p_11_1>=1))&&(r_10_0>=1))&&((p_3_0>=1)&&(r_0_0>=1))))] != FALSE
(forward)formula 13,1,229.225,2216620,1,0,655,1.05489e+07,50,365,1860,1.73421e+07,271
FORMULA ResAllocation-PT-R003C015-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: EF(AX(AF((((r_5_1>=1)&&(p_5_2>=1))&&(r_4_1>=1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(EX(!(!(EG(!((((r_5_1>=1)&&(p_5_2>=1))&&(r_4_1>=1)))))))))] != FALSE
(forward)formula 14,1,285.956,2216620,1,0,655,1.05489e+07,56,365,1865,1.73421e+07,649
FORMULA ResAllocation-PT-R003C015-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: EF(EG((((((r_13_1>=1)&&(p_13_2>=1))&&(r_12_1>=1))&&((r_1_2>=1)&&(r_0_2>=1)))||(((r_13_2>=1)&&(r_12_2>=1))&&(p_1_0>=1)))))
=> equivalent forward existential formula: [FwdG(FwdU(Init,TRUE),(((((r_13_1>=1)&&(p_13_2>=1))&&(r_12_1>=1))&&((r_1_2>=1)&&(r_0_2>=1)))||(((r_13_2>=1)&&(r_12_2>=1))&&(p_1_0>=1))))] != FALSE
Hit Full ! (commute/partial/dont) 43/0/17
(forward)formula 15,1,286.497,2216620,1,0,655,1.05489e+07,63,365,1959,1.73421e+07,653
FORMULA ResAllocation-PT-R003C015-CTLFireability-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
BK_STOP 1527860188079
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 1:31:38 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 1:31:38 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 1:31:38 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 82 ms
Jun 01, 2018 1:31:38 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 90 places.
Jun 01, 2018 1:31:38 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 60 transitions.
Jun 01, 2018 1:31:38 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 14 ms
Jun 01, 2018 1:31:38 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 78 ms
Jun 01, 2018 1:31:38 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 4 ms
Jun 01, 2018 1:31:38 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 2 ms
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C015"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C015.tgz
mv ResAllocation-PT-R003C015 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ResAllocation-PT-R003C015, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r140-qhx2-152673582200354"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;