About the Execution of ITS-Tools for ResAllocation-PT-R003C002
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15757.040 | 5392.00 | 10078.00 | 327.20 | TFFFFFFFFTTTTFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
....................................................................................
/home/mcc/execution
total 184K
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 13K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ResAllocation-PT-R003C002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r140-qhx2-152673582200326
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-00
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-01
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-02
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-03
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-04
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-05
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-06
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-07
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-08
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-09
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-10
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-11
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-12
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-13
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-14
FORMULA_NAME ResAllocation-PT-R003C002-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1527858467345
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]
its-ctl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,20,0.024875,4272,2,27,5,153,6,0,59,127,0
Converting to forward existential form...Done !
original formula: !(AF(((p_0_2>=1)||(((r_1_0>=1)&&(p_1_1>=1))&&(r_0_0>=1)))))
=> equivalent forward existential formula: [FwdG(Init,!(((p_0_2>=1)||(((r_1_0>=1)&&(p_1_1>=1))&&(r_0_0>=1)))))] != FALSE
Hit Full ! (commute/partial/dont) 1/7/7
(forward)formula 0,1,0.029713,4964,1,0,9,482,20,3,307,444,8
FORMULA ResAllocation-PT-R003C002-CTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: EX(AF(((p_0_1>=1)&&(r_0_2>=1))))
=> equivalent forward existential formula: [(EY(Init) * !(EG(!(((p_0_1>=1)&&(r_0_2>=1))))))] != FALSE
Reverse transition relation is NOT exact ! Due to transitions t_0_3, t_1_0, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/6/2/8
(forward)formula 1,0,0.035965,5228,1,0,79,1029,48,40,377,1506,99
FORMULA ResAllocation-PT-R003C002-CTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: EX(EG(AF((((r_1_0>=1)&&(p_1_1>=1))&&(r_0_0>=1)))))
=> equivalent forward existential formula: [FwdG(EY(Init),!(EG(!((((r_1_0>=1)&&(p_1_1>=1))&&(r_0_0>=1))))))] != FALSE
(forward)formula 2,0,0.039971,5228,1,0,126,1328,57,68,377,2156,169
FORMULA ResAllocation-PT-R003C002-CTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: EX(AF((p_1_0>=1)))
=> equivalent forward existential formula: [(EY(Init) * !(EG(!((p_1_0>=1)))))] != FALSE
(forward)formula 3,0,0.042815,5492,1,0,158,1486,63,92,378,2538,227
FORMULA ResAllocation-PT-R003C002-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: AF((((p_0_2>=1)&&(r_0_0>=1))||((p_0_2>=1)||(((r_1_0>=1)&&(p_1_1>=1))&&(r_0_0>=1)))))
=> equivalent forward existential formula: [FwdG(Init,!((((p_0_2>=1)&&(r_0_0>=1))||((p_0_2>=1)||(((r_1_0>=1)&&(p_1_1>=1))&&(r_0_0>=1))))))] = FALSE
Hit Full ! (commute/partial/dont) 1/2/7
(forward)formula 4,0,0.044139,5492,1,0,158,1495,71,92,396,2549,230
FORMULA ResAllocation-PT-R003C002-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: EX((EX(((p_0_1>=1)&&(r_0_2>=1))) * (!(((((r_1_0>=1)&&(p_1_1>=1))&&(r_0_0>=1))||(p_0_2>=1))) * AX(((p_0_1>=1)&&(r_0_2>=1))))))
=> equivalent forward existential formula: [(((EY(Init) * EX(((p_0_1>=1)&&(r_0_2>=1)))) * !(((((r_1_0>=1)&&(p_1_1>=1))&&(r_0_0>=1))||(p_0_2>=1)))) * !(EX(!(((p_0_1>=1)&&(r_0_2>=1))))))] != FALSE
(forward)formula 5,0,0.04596,5492,1,0,164,1507,71,99,397,2599,236
FORMULA ResAllocation-PT-R003C002-CTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: (p_0_2>=1)
=> equivalent forward existential formula: [(Init * (p_0_2>=1))] != FALSE
(forward)formula 6,0,0.0462,5492,1,0,165,1507,72,99,397,2599,237
FORMULA ResAllocation-PT-R003C002-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: ((EX(((p_0_0>=1)&&(r_0_1>=1))) + EF(((((p_0_1>=1)&&(r_0_2>=1))&&(r_0_0>=1))||((((r_1_1>=1)&&(p_1_2>=1))&&(r_0_1>=1))||(p_1_0>=1))))) * (!((EG(((r_1_2>=1)&&(r_0_2>=1))) + AF((r_0_0>=1)))) * ((p_0_2>=1) * AF(!((p_1_0>=1))))))
=> equivalent forward existential formula: ([((Init * !(E(TRUE U ((((p_0_1>=1)&&(r_0_2>=1))&&(r_0_0>=1))||((((r_1_1>=1)&&(p_1_2>=1))&&(r_0_1>=1))||(p_1_0>=1)))))) * !(EX(((p_0_0>=1)&&(r_0_1>=1)))))] = FALSE * (([FwdG(Init,((r_1_2>=1)&&(r_0_2>=1)))] = FALSE * [(Init * !(EG(!((r_0_0>=1)))))] = FALSE) * ([(Init * !((p_0_2>=1)))] = FALSE * [FwdG(Init,!(!((p_1_0>=1))))] = FALSE)))
(forward)formula 7,0,0.046665,5492,1,0,165,1507,78,100,399,2604,239
FORMULA ResAllocation-PT-R003C002-CTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: (!(((p_1_0>=1)||((p_0_0>=1)&&(r_0_1>=1)))) * E(AG(((p_0_1>=1)&&(r_0_2>=1))) U ((p_0_0>=1)&&(r_0_1>=1))))
=> equivalent forward existential formula: [(FwdU((Init * !(((p_1_0>=1)||((p_0_0>=1)&&(r_0_1>=1))))),!(E(TRUE U !(((p_0_1>=1)&&(r_0_2>=1)))))) * ((p_0_0>=1)&&(r_0_1>=1)))] != FALSE
(forward)formula 8,0,0.048722,5492,1,0,168,1532,90,103,414,2697,251
FORMULA ResAllocation-PT-R003C002-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: (E(((p_0_1>=1)&&(r_0_2>=1)) U (((r_1_2>=1)&&(r_0_2>=1))||(p_0_2>=1))) + (((r_1_1>=1)&&(p_1_2>=1))&&(r_0_1>=1)))
=> equivalent forward existential formula: ([(FwdU(Init,((p_0_1>=1)&&(r_0_2>=1))) * (((r_1_2>=1)&&(r_0_2>=1))||(p_0_2>=1)))] != FALSE + [(Init * (((r_1_1>=1)&&(p_1_2>=1))&&(r_0_1>=1)))] != FALSE)
Hit Full ! (commute/partial/dont) 3/4/5
(forward)formula 9,1,0.04983,5492,1,0,169,1532,97,104,432,2705,254
FORMULA ResAllocation-PT-R003C002-CTLFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: A(!((p_1_0>=1)) U ((r_0_0>=1)||(p_1_0>=1)))
=> equivalent forward existential formula: [((Init * !(EG(!(((r_0_0>=1)||(p_1_0>=1)))))) * !(E(!(((r_0_0>=1)||(p_1_0>=1))) U (!(!((p_1_0>=1))) * !(((r_0_0>=1)||(p_1_0>=1)))))))] != FALSE
(forward)formula 10,1,0.054386,5492,1,0,195,1649,105,125,436,2982,320
FORMULA ResAllocation-PT-R003C002-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: (A(((!((p_0_0>=1)&&(r_0_1>=1)))&&((p_0_2>=1)&&(((r_1_1>=1)&&(p_1_2>=1))&&(r_0_1>=1)))) U ((!((p_0_0>=1)&&(r_0_1>=1)))&&(((r_1_2>=1)&&(r_0_2>=1))||(r_0_0>=1)))) + ((r_1_2>=1)&&(r_0_2>=1)))
=> equivalent forward existential formula: ([((Init * !(EG(!(((!((p_0_0>=1)&&(r_0_1>=1)))&&(((r_1_2>=1)&&(r_0_2>=1))||(r_0_0>=1))))))) * !(E(!(((!((p_0_0>=1)&&(r_0_1>=1)))&&(((r_1_2>=1)&&(r_0_2>=1))||(r_0_0>=1)))) U (!(((!((p_0_0>=1)&&(r_0_1>=1)))&&((p_0_2>=1)&&(((r_1_1>=1)&&(p_1_2>=1))&&(r_0_1>=1))))) * !(((!((p_0_0>=1)&&(r_0_1>=1)))&&(((r_1_2>=1)&&(r_0_2>=1))||(r_0_0>=1))))))))] != FALSE + [(Init * ((r_1_2>=1)&&(r_0_2>=1)))] != FALSE)
(forward)formula 11,1,0.062761,5492,1,0,204,1727,115,134,451,3126,345
FORMULA ResAllocation-PT-R003C002-CTLFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: !(EX((AX((p_1_0>=1)) * AG((p_0_2>=1)))))
=> equivalent forward existential formula: [((EY(Init) * !(EX(!((p_1_0>=1))))) * !(E(TRUE U !((p_0_2>=1)))))] = FALSE
(forward)formula 12,1,0.064203,5756,1,0,206,1736,115,136,451,3144,351
FORMULA ResAllocation-PT-R003C002-CTLFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
original formula: (p_0_2>=1)
=> equivalent forward existential formula: [(Init * (p_0_2>=1))] != FALSE
(forward)formula 13,0,0.064407,5756,1,0,206,1736,115,136,451,3144,351
FORMULA ResAllocation-PT-R003C002-CTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: (EG(AX(!((p_1_0>=1)))) * (p_1_0>=1))
=> equivalent forward existential formula: [FwdG((Init * (p_1_0>=1)),!(EX(!(!((p_1_0>=1))))))] != FALSE
(forward)formula 14,0,0.065173,5756,1,0,209,1760,118,138,451,3182,356
FORMULA ResAllocation-PT-R003C002-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !
***************************************
original formula: ((r_1_2>=1)&&(r_0_2>=1))
=> equivalent forward existential formula: [(Init * ((r_1_2>=1)&&(r_0_2>=1)))] != FALSE
(forward)formula 15,1,0.06555,5756,1,0,209,1760,119,138,451,3182,357
FORMULA ResAllocation-PT-R003C002-CTLFireability-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
***************************************
BK_STOP 1527858472737
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 1:07:50 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 1:07:50 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 1:07:50 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 43 ms
Jun 01, 2018 1:07:50 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 12 places.
Jun 01, 2018 1:07:51 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 8 transitions.
Jun 01, 2018 1:07:51 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 8 ms
Jun 01, 2018 1:07:51 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 29 ms
Jun 01, 2018 1:07:51 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 1 ms
Jun 01, 2018 1:07:51 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 3 ms
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C002.tgz
mv ResAllocation-PT-R003C002 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ResAllocation-PT-R003C002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r140-qhx2-152673582200326"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;