About the Execution of ITS-Tools for QuasiCertifProtocol-COL-18
| Execution Summary | |||||
| Max Memory Used (MB)  | 
      Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status  | 
   
| 15756.780 | 3600000.00 | 5352443.00 | 7421.30 | [undef] | Time out reached | 
Execution Chart
We display below the execution chart for this examination (boot time has been removed).

Trace from the execution
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................
/home/mcc/execution
total 264K
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users  21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users  20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users  12K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.8K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users  18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users  117 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users  355 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users  15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users    5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users    3 May 15 18:50 instance
-rw-r--r-- 1 mcc users    5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users  93K May 15 18:50 model.pnml
=====================================================================
 Generated by BenchKit 2-3637
    Executing tool itstools
    Input is QuasiCertifProtocol-COL-18, examination is ReachabilityDeadlock
    Time confinement is 3600 seconds
    Memory confinement is 16384 MBytes
    Number of cores is 4
    Run identifier is r140-qhx2-152673581800034
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-COL-18-ReachabilityDeadlock-0
=== Now, execution of the tool begins
BK_START 1527811312718
00:02:18.601 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
00:02:18.613 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Flatten gal took : 1888 ms
Constant places removed 43 places and 1 transitions.
Iterating post reduction 0 with 43 rules applied. Total rules applied 43 place count 1355 transition count 295
Performed 2 Post agglomeration using F-continuation condition.
Constant places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 45 place count 1353 transition count 293
Applied a total of 45 rules in 648 ms. Remains 1353 /1398 variables (removed 45) and now considering 293/296 (removed 3) transitions.
// Phase 1: matrix 293 rows 1353 cols
Using solver Z3 to compute partial order matrices.
Built C files in : 
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
its-ctl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64  --gc-threshold  2000000  --quiet  -i  /home/mcc/execution/ReachabilityDeadlock.pnml.gal  -t  CGAL  -ctl  DEADLOCK  
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 293 rows 1353 cols
terminate called after throwing an instance of 'std::bad_alloc'
  what():  std::bad_alloc
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 13452 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 183 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 12:01:57 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 12:01:57 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 12:01:57 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Jun 01, 2018 12:02:19 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 22624 ms
Jun 01, 2018 12:02:19 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 30 places.
Jun 01, 2018 12:02:19 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Jun 01, 2018 12:02:19 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :tsidxtsid->n9,n8,n7,
Dot->malicious_reservoir,CstopAbort,SstopAbort,AstopAbort,a5,a4,a3,a2,a1,Astart,AstopOK,
tsid->n6,n5,n4,n3,n2,n1,c1,Cstart,Sstart,s2,s3,s4,s5,s6,SstopOK,CstopOK,
Jun 01, 2018 12:02:20 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 26 transitions.
Jun 01, 2018 12:02:20 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Jun 01, 2018 12:02:20 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 58 ms
Jun 01, 2018 12:02:21 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1266 ms
Jun 01, 2018 12:02:22 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 31 ms
Jun 01, 2018 12:02:22 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 170 transitions. Expanding to a total of 303 deterministic transitions.
Jun 01, 2018 12:02:22 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 24 ms.
Jun 01, 2018 12:02:24 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 32 ms
Jun 01, 2018 12:02:24 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 293 transitions.
Jun 01, 2018 12:02:25 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 76 ms
Jun 01, 2018 12:02:33 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved  1353 variables to be positive in 7585 ms
Jun 01, 2018 12:02:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 293 transitions.
Jun 01, 2018 12:02:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/293 took 3 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 12:02:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 79 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 12:02:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 293 transitions.
Jun 01, 2018 12:02:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 33 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 12:02:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 293 transitions.
Jun 01, 2018 12:02:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/293) took 3138 ms. Total solver calls (SAT/UNSAT): 1036(1036/0)
Jun 01, 2018 12:02:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/293) took 6591 ms. Total solver calls (SAT/UNSAT): 2125(2125/0)
Jun 01, 2018 12:02:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/293) took 9736 ms. Total solver calls (SAT/UNSAT): 3025(3025/0)
Jun 01, 2018 12:02:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/293) took 12837 ms. Total solver calls (SAT/UNSAT): 3961(3961/0)
Jun 01, 2018 12:02:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/293) took 15895 ms. Total solver calls (SAT/UNSAT): 4995(4995/0)
Jun 01, 2018 12:02:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/293) took 18901 ms. Total solver calls (SAT/UNSAT): 6496(6496/0)
Jun 01, 2018 12:02:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/293) took 21931 ms. Total solver calls (SAT/UNSAT): 7480(7480/0)
Jun 01, 2018 12:02:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(94/293) took 24937 ms. Total solver calls (SAT/UNSAT): 8170(8170/0)
Jun 01, 2018 12:03:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(109/293) took 27985 ms. Total solver calls (SAT/UNSAT): 8635(8635/0)
Jun 01, 2018 12:03:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/293) took 31011 ms. Total solver calls (SAT/UNSAT): 8916(8916/0)
Jun 01, 2018 12:03:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(202/293) took 34038 ms. Total solver calls (SAT/UNSAT): 8916(8916/0)
Jun 01, 2018 12:03:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(266/293) took 37063 ms. Total solver calls (SAT/UNSAT): 8916(8916/0)
Jun 01, 2018 12:03:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 38495 ms. Total solver calls (SAT/UNSAT): 8918(8918/0)
Jun 01, 2018 12:03:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 293 transitions.
ITS-tools command line returned an error code 134
Jun 01, 2018 1:00:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 3436406 ms. Total solver calls (SAT/UNSAT): 1449(0/1449)
Jun 01, 2018 1:00:28 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 3483579ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-COL-18"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
	rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-COL-18.tgz
mv QuasiCertifProtocol-COL-18 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo "    Executing tool itstools"
echo "    Input is QuasiCertifProtocol-COL-18, examination is ReachabilityDeadlock"
echo "    Time confinement is $BK_TIME_CONFINEMENT seconds"
echo "    Memory confinement is 16384 MBytes"
echo "    Number of cores is 4"
echo "    Run identifier is r140-qhx2-152673581800034"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
	echo "The expected result is a vector of positive values"
	echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ]  ; then 
	echo "The expected result is a vector of booleans"
	echo BOOL_VECTOR
else
	echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
	echo "here is the order used to build the result vector(from text file)"
	for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
		echo "FORMULA_NAME $x"
	done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
	echo echo "here is the order used to build the result vector(from xml file)"
	for x in $(grep '
		echo "FORMULA_NAME $x"
	done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT  bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
	echo
	echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;
