About the Execution of ITS-Tools for ProductionCell-PT-none
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 15756.430 | 22796.00 | 25403.00 | 4491.70 | FTFTFTFFTFFFTFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 212K
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.8K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.4K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 43K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ProductionCell-PT-none, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r140-qhx2-152673581800005
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-00
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-01
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-02
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-03
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-04
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-05
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-06
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-07
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-08
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-09
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-10
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-11
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-12
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-13
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-14
FORMULA_NAME ProductionCell-PT-none-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1527805515233
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : ProductionCell-PT-none-ReachabilityCardinality-00 with value :(((u26.p138==0)||(u26.p137==1))&&((u24.p125==0)||(u17.p67==1)))
Read [invariant] property : ProductionCell-PT-none-ReachabilityCardinality-01 with value :(!(((u18.p79>=3)&&((u18.p89==0)||(u14.p52==1)))&&(!((u33.p167==0)||(u14.p51==1)))))
Read [invariant] property : ProductionCell-PT-none-ReachabilityCardinality-02 with value :((u22.p113==0)||(u12.p43==1))
Read [invariant] property : ProductionCell-PT-none-ReachabilityCardinality-03 with value :(((!((u10.p31==0)||(u18.p85==1)))||(!(u33.p167>=3)))||(((u3.p6==0)||(u16.p63==1))||(u40.p145>=2)))
Read [reachable] property : ProductionCell-PT-none-ReachabilityCardinality-04 with value :(((u26.p144>=2)&&((u1.p2==0)||(u22.p117==1)))&&((!((u12.p43==0)||(u8.p27==1)))||(((u7.p23==0)||(u39.p5==1))||((u7.p20==0)||(u18.p100==1)))))
Read [invariant] property : ProductionCell-PT-none-ReachabilityCardinality-05 with value :(((!(u26.p134>=3))||((u40.p153>=2)&&((u3.p6==0)||(u6.p13==1))))||(!((u31.p162>=1)||(u12.p41>=3))))
Read [reachable] property : ProductionCell-PT-none-ReachabilityCardinality-06 with value :(((u1.p2==0)||(u1.p2==1))&&(!(((u18.p74==0)||(u8.p26==1))||((u7.p23==0)||(u35.p170==1)))))
Read [reachable] property : ProductionCell-PT-none-ReachabilityCardinality-07 with value :(u8.p25>=3)
Read [invariant] property : ProductionCell-PT-none-ReachabilityCardinality-08 with value :((((u6.p12>=3)||((u18.p81==0)||(u10.p35==1)))||(!(u18.p101>=2)))||(((u24.p125==0)||(u18.p92==1))&&((u24.p127>=2)&&((u39.p4==0)||(u35.p171==1)))))
Read [invariant] property : ProductionCell-PT-none-ReachabilityCardinality-09 with value :(!(u18.p97>=1))
Read [reachable] property : ProductionCell-PT-none-ReachabilityCardinality-10 with value :((u18.p89>=3)||((((u18.p87==0)||(u16.p57==1))||((u21.p112==0)||(u26.p138==1)))&&((u30.p160>=3)&&((u23.p119==0)||(u28.p157==1)))))
Read [reachable] property : ProductionCell-PT-none-ReachabilityCardinality-11 with value :(u14.p48>=3)
Read [reachable] property : ProductionCell-PT-none-ReachabilityCardinality-12 with value :(u12.p41>=1)
Read [reachable] property : ProductionCell-PT-none-ReachabilityCardinality-13 with value :((u11.p37>=2)||(((u31.p162>=1)&&(u7.p19>=3))&&(((u26.p135==0)||(u26.p135==1))&&(u18.p98>=3))))
Read [invariant] property : ProductionCell-PT-none-ReachabilityCardinality-14 with value :((((u12.p39==0)||(u18.p70==1))||(u39.p3>=1))&&((!(u18.p72>=3))||((u18.p95>=3)||(u18.p72>=1))))
Read [reachable] property : ProductionCell-PT-none-ReachabilityCardinality-15 with value :(u24.p125>=3)
built 46 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 134 rows 176 cols
invariant :p0 + p37 + p38 = 1
invariant :p50 + p51 + p52 + -1'p60 + -1'p61 + -1'p62 = 0
invariant :p162 + p163 + -1'p174 + -1'p175 = 0
invariant :p78 + p79 + p80 + p96 + p97 + p98 + -1'p121 + -1'p125 + -1'p126 + -1'p127 + p131 + p132 + p133 + p134 + p135 + p136 + p142 + p143 + p144 = 0
invariant :p6 + p7 + -1'p8 + -1'p9 = 0
invariant :p0 + p10 + p11 = 1
invariant :p36 + -1'p43 + -1'p44 + -1'p45 = 0
invariant :p33 + p34 + p35 + -1'p42 = 0
invariant :p0 + p46 + p47 = 1
invariant :p160 + p161 + -1'p174 + -1'p175 = 0
invariant :p0 + p111 + p112 = 1
invariant :p0 + p68 + -1'p90 + -1'p91 + -1'p92 + -1'p93 + -1'p94 + -1'p95 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + -1'p101 + p116 + p117 + p118 + p138 + p139 + p140 + p141 + p142 + p143 + p144 = 1
invariant :p0 + p113 + p114 + p115 + p116 + p117 + p118 = 1
invariant :p172 + p173 + -1'p174 + -1'p175 = 0
invariant :p84 + p85 + p86 + -1'p136 = 0
invariant :p0 + p39 + p40 + p41 + p42 + p43 + p44 + p45 = 1
invariant :p81 + p82 + p83 + p99 + p100 + p101 + -1'p131 + -1'p132 + -1'p133 + -1'p134 + -1'p135 + -1'p142 + -1'p143 + -1'p144 = 0
invariant :p48 + p49 + p53 + p54 + p60 + p61 + p62 + p63 + -1'p107 + -1'p121 + -1'p125 + -1'p126 + -1'p127 = 0
invariant :p166 + p167 + -1'p174 + -1'p175 = 0
invariant :p106 + p110 + -1'p121 + -1'p125 + -1'p126 + -1'p127 = 0
invariant :p24 + p27 + -1'p42 + -1'p43 + -1'p44 + -1'p45 = 0
invariant :p102 + p105 + -1'p116 + -1'p117 + -1'p118 = 0
invariant :p0 + p66 + p67 = 1
invariant :p164 + p165 + -1'p174 + -1'p175 = 0
invariant :p0 + p119 + p120 = 1
invariant :p0 + p130 + p131 + p132 + p133 + p134 + p135 + p136 + p137 + p138 + p139 + p140 + p141 + p142 + p143 + p144 = 1
invariant :p0 + p1 + p2 = 1
invariant :-1'p5 + -1'p7 + p9 + p15 + p16 + p17 + p19 + 2'p20 + 3'p21 + 4'p22 + 5'p23 + -1'p42 + -1'p43 + -1'p44 + -1'p45 + p60 + p61 + p62 + p63 + -1'p116 + -1'p117 + -1'p118 + -1'p121 + -1'p125 + -1'p126 + -1'p127 + -1'p137 + -1'p138 + -1'p139 + -1'p140 + -1'p141 + -1'p142 + -1'p143 + -1'p144 = 0
invariant :p0 + p59 + p107 + p121 + p125 + p126 + p127 = 1
invariant :-1'p0 + p87 + p88 + p89 + p90 + p91 + p92 + p93 + p94 + p95 + p96 + p97 + p98 + p99 + p100 + p101 + -1'p116 + -1'p117 + -1'p118 + -1'p137 + -1'p138 + -1'p139 + -1'p140 + -1'p141 + -1'p142 + -1'p143 + -1'p144 = -1
invariant :p0 + p103 + p104 + p116 + p117 + p118 = 1
invariant :p0 + p25 + p26 + p42 + p43 + p44 + p45 = 1
invariant :p57 + p58 + p60 + p61 + p62 + p63 + p64 + p65 + -1'p107 + -1'p121 + -1'p125 + -1'p126 + -1'p127 = 0
invariant :p0 + p3 + p4 + p5 + p8 + p9 = 1
invariant :p0 + p28 + p29 = 1
invariant :p158 + p159 + -1'p174 + -1'p175 = 0
invariant :p0 + p75 + p76 + p77 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + -1'p101 + p121 + p125 + p126 + p127 + p137 + p138 + p139 + p140 + p141 + p142 + p143 + p144 = 1
invariant :p13 + p14 + -1'p63 = 0
invariant :p0 + p107 + p108 + p109 + p121 + p125 + p126 + p127 = 1
invariant :p170 + p171 + -1'p174 + -1'p175 = 0
invariant :p72 + p73 + p74 + p93 + p94 + p95 + p96 + p97 + p98 + p99 + p100 + p101 + -1'p141 + -1'p142 + -1'p143 + -1'p144 = 0
invariant :p168 + p169 + -1'p174 + -1'p175 = 0
invariant :p0 + p55 + p56 = 1
invariant :p0 + p5 + p7 + -1'p9 + p12 + p18 + -1'p19 + -2'p20 + -3'p21 + -4'p22 + -5'p23 + p42 + p43 + p44 + p45 + -1'p60 + -1'p61 + -1'p62 + p116 + p117 + p118 + p121 + p125 + p126 + p127 + p137 + p138 + p139 + p140 + p141 + p142 + p143 + p144 = 1
invariant :p156 + p157 + -1'p174 + -1'p175 = 0
invariant :p0 + p121 + p122 + p123 + p124 + p125 + p126 + p127 = 1
invariant :p0 + p145 + p146 + p147 + p148 + p149 + p150 + p151 + p152 + p153 + p154 + p155 + p174 + p175 = 1
invariant :p69 + p70 + p71 + p90 + p91 + p92 + -1'p138 + -1'p139 + -1'p140 = 0
invariant :p0 + p30 + p31 + p32 + p42 + p43 + p44 + p45 = 1
invariant :p0 + p128 + p129 = 1
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 134 rows 176 cols
invariant :p0 + p37 + p38 = 1
invariant :p50 + p51 + p52 + -1'p60 + -1'p61 + -1'p62 = 0
invariant :p162 + p163 + -1'p174 + -1'p175 = 0
invariant :p78 + p79 + p80 + p96 + p97 + p98 + -1'p121 + -1'p125 + -1'p126 + -1'p127 + p131 + p132 + p133 + p134 + p135 + p136 + p142 + p143 + p144 = 0
invariant :p6 + p7 + -1'p8 + -1'p9 = 0
invariant :p0 + p10 + p11 = 1
invariant :p36 + -1'p43 + -1'p44 + -1'p45 = 0
invariant :p33 + p34 + p35 + -1'p42 = 0
invariant :p0 + p46 + p47 = 1
invariant :p160 + p161 + -1'p174 + -1'p175 = 0
invariant :p0 + p111 + p112 = 1
invariant :p0 + p68 + -1'p90 + -1'p91 + -1'p92 + -1'p93 + -1'p94 + -1'p95 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + -1'p101 + p116 + p117 + p118 + p138 + p139 + p140 + p141 + p142 + p143 + p144 = 1
invariant :p0 + p113 + p114 + p115 + p116 + p117 + p118 = 1
invariant :p172 + p173 + -1'p174 + -1'p175 = 0
invariant :p84 + p85 + p86 + -1'p136 = 0
invariant :p0 + p39 + p40 + p41 + p42 + p43 + p44 + p45 = 1
invariant :p81 + p82 + p83 + p99 + p100 + p101 + -1'p131 + -1'p132 + -1'p133 + -1'p134 + -1'p135 + -1'p142 + -1'p143 + -1'p144 = 0
invariant :p48 + p49 + p53 + p54 + p60 + p61 + p62 + p63 + -1'p107 + -1'p121 + -1'p125 + -1'p126 + -1'p127 = 0
invariant :p166 + p167 + -1'p174 + -1'p175 = 0
invariant :p106 + p110 + -1'p121 + -1'p125 + -1'p126 + -1'p127 = 0
invariant :p24 + p27 + -1'p42 + -1'p43 + -1'p44 + -1'p45 = 0
invariant :p102 + p105 + -1'p116 + -1'p117 + -1'p118 = 0
invariant :p0 + p66 + p67 = 1
invariant :p164 + p165 + -1'p174 + -1'p175 = 0
invariant :p0 + p119 + p120 = 1
invariant :p0 + p130 + p131 + p132 + p133 + p134 + p135 + p136 + p137 + p138 + p139 + p140 + p141 + p142 + p143 + p144 = 1
invariant :p0 + p1 + p2 = 1
invariant :-1'p5 + -1'p7 + p9 + p15 + p16 + p17 + p19 + 2'p20 + 3'p21 + 4'p22 + 5'p23 + -1'p42 + -1'p43 + -1'p44 + -1'p45 + p60 + p61 + p62 + p63 + -1'p116 + -1'p117 + -1'p118 + -1'p121 + -1'p125 + -1'p126 + -1'p127 + -1'p137 + -1'p138 + -1'p139 + -1'p140 + -1'p141 + -1'p142 + -1'p143 + -1'p144 = 0
invariant :p0 + p59 + p107 + p121 + p125 + p126 + p127 = 1
invariant :-1'p0 + p87 + p88 + p89 + p90 + p91 + p92 + p93 + p94 + p95 + p96 + p97 + p98 + p99 + p100 + p101 + -1'p116 + -1'p117 + -1'p118 + -1'p137 + -1'p138 + -1'p139 + -1'p140 + -1'p141 + -1'p142 + -1'p143 + -1'p144 = -1
invariant :p0 + p103 + p104 + p116 + p117 + p118 = 1
invariant :p0 + p25 + p26 + p42 + p43 + p44 + p45 = 1
invariant :p57 + p58 + p60 + p61 + p62 + p63 + p64 + p65 + -1'p107 + -1'p121 + -1'p125 + -1'p126 + -1'p127 = 0
invariant :p0 + p3 + p4 + p5 + p8 + p9 = 1
invariant :p0 + p28 + p29 = 1
invariant :p158 + p159 + -1'p174 + -1'p175 = 0
invariant :p0 + p75 + p76 + p77 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + -1'p101 + p121 + p125 + p126 + p127 + p137 + p138 + p139 + p140 + p141 + p142 + p143 + p144 = 1
invariant :p13 + p14 + -1'p63 = 0
invariant :p0 + p107 + p108 + p109 + p121 + p125 + p126 + p127 = 1
invariant :p170 + p171 + -1'p174 + -1'p175 = 0
invariant :p72 + p73 + p74 + p93 + p94 + p95 + p96 + p97 + p98 + p99 + p100 + p101 + -1'p141 + -1'p142 + -1'p143 + -1'p144 = 0
invariant :p168 + p169 + -1'p174 + -1'p175 = 0
invariant :p0 + p55 + p56 = 1
invariant :p0 + p5 + p7 + -1'p9 + p12 + p18 + -1'p19 + -2'p20 + -3'p21 + -4'p22 + -5'p23 + p42 + p43 + p44 + p45 + -1'p60 + -1'p61 + -1'p62 + p116 + p117 + p118 + p121 + p125 + p126 + p127 + p137 + p138 + p139 + p140 + p141 + p142 + p143 + p144 = 1
invariant :p156 + p157 + -1'p174 + -1'p175 = 0
invariant :p0 + p121 + p122 + p123 + p124 + p125 + p126 + p127 = 1
invariant :p0 + p145 + p146 + p147 + p148 + p149 + p150 + p151 + p152 + p153 + p154 + p155 + p174 + p175 = 1
invariant :p69 + p70 + p71 + p90 + p91 + p92 + -1'p138 + -1'p139 + -1'p140 = 0
invariant :p0 + p30 + p31 + p32 + p42 + p43 + p44 + p45 = 1
invariant :p0 + p128 + p129 = 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell\_PT\_none\_flat\_flat\_mod,1.13293e+13,1.86737,34396,322,367,72265,2091,392,89826,201,8198,0
Total reachable state count : 11329291100161
Verifying 16 reachability properties.
Invariant property ProductionCell-PT-none-ReachabilityCardinality-00 does not hold.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-00,1.96357e+10,1.87384,34424,242,264,72265,2091,406,89826,211,8198,70
Invariant property ProductionCell-PT-none-ReachabilityCardinality-01 is true.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-01,0,1.87628,34544,1,0,72265,2091,424,89826,218,8198,229
Invariant property ProductionCell-PT-none-ReachabilityCardinality-02 does not hold.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-02,1.68933e+09,1.87882,34544,135,118,72265,2091,429,89826,221,8198,363
Invariant property ProductionCell-PT-none-ReachabilityCardinality-03 is true.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-03,0,1.88261,34544,1,0,72265,2091,450,89826,228,8198,859
Reachability property ProductionCell-PT-none-ReachabilityCardinality-04 does not hold.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : ProductionCell-PT-none-ReachabilityCardinality-04
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-04,0,1.88419,34544,1,0,72265,2091,475,89826,232,8198,859
Invariant property ProductionCell-PT-none-ReachabilityCardinality-05 is true.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-05,0,1.88641,34544,1,0,72265,2091,494,89826,237,8198,1151
Reachability property ProductionCell-PT-none-ReachabilityCardinality-06 does not hold.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : ProductionCell-PT-none-ReachabilityCardinality-06
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-06,0,1.88877,34544,1,0,72265,2091,510,89826,242,8198,1470
Reachability property ProductionCell-PT-none-ReachabilityCardinality-07 does not hold.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : ProductionCell-PT-none-ReachabilityCardinality-07
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-07,0,1.88962,34544,1,0,72265,2091,511,89826,242,8198,1470
Invariant property ProductionCell-PT-none-ReachabilityCardinality-08 is true.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-08,0,1.89502,34544,1,0,72265,2091,542,89826,255,8198,2197
Invariant property ProductionCell-PT-none-ReachabilityCardinality-09 does not hold.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-09,2.73715e+07,1.89603,34544,81,90,72265,2091,546,89826,257,8198,2197
Reachability property ProductionCell-PT-none-ReachabilityCardinality-10 does not hold.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : ProductionCell-PT-none-ReachabilityCardinality-10
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-10,0,1.89823,34544,1,0,72265,2091,569,89826,260,8198,2197
Reachability property ProductionCell-PT-none-ReachabilityCardinality-11 does not hold.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : ProductionCell-PT-none-ReachabilityCardinality-11
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-11,0,1.89945,34544,1,0,72265,2091,570,89826,260,8198,2197
Reachability property ProductionCell-PT-none-ReachabilityCardinality-12 is true.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-12,2.91963e+07,1.90109,34544,56,82,72265,2091,572,89826,260,8198,2197
Reachability property ProductionCell-PT-none-ReachabilityCardinality-13 does not hold.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : ProductionCell-PT-none-ReachabilityCardinality-13
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-13,0,1.90273,34544,1,0,72265,2091,591,89826,264,8198,2205
Invariant property ProductionCell-PT-none-ReachabilityCardinality-14 does not hold.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-14,7.48155e+08,1.90571,34544,99,112,72265,2091,610,89826,268,8198,2384
Reachability property ProductionCell-PT-none-ReachabilityCardinality-15 does not hold.
FORMULA ProductionCell-PT-none-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : ProductionCell-PT-none-ReachabilityCardinality-15
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ProductionCell-PT-none-ReachabilityCardinality-15,0,1.90673,34544,1,0,72265,2091,611,89826,268,8198,2384
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1527805538029
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 31, 2018 10:25:33 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 31, 2018 10:25:33 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2018 10:25:33 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 81 ms
May 31, 2018 10:25:33 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 176 places.
May 31, 2018 10:25:33 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 134 transitions.
May 31, 2018 10:25:33 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 31, 2018 10:25:33 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 17 ms
May 31, 2018 10:25:34 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 122 ms
May 31, 2018 10:25:34 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 31, 2018 10:25:34 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 31, 2018 10:25:34 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 97 ms
May 31, 2018 10:25:34 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 31, 2018 10:25:34 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 120 ms
May 31, 2018 10:25:34 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 60 redundant transitions.
May 31, 2018 10:25:34 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 22 ms
May 31, 2018 10:25:34 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 2 ms
May 31, 2018 10:25:34 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 134 transitions.
May 31, 2018 10:25:34 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 134 transitions.
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 50 place invariants in 130 ms
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1342 ms.
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-00(UNSAT) depth K=0 took 31 ms
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-01(UNSAT) depth K=0 took 14 ms
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-02(UNSAT) depth K=0 took 16 ms
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-03(UNSAT) depth K=0 took 12 ms
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-04(UNSAT) depth K=0 took 18 ms
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-05(UNSAT) depth K=0 took 10 ms
May 31, 2018 10:25:35 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 134 transitions.
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-06(UNSAT) depth K=0 took 12 ms
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-07(UNSAT) depth K=0 took 12 ms
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-08(UNSAT) depth K=0 took 11 ms
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-09(UNSAT) depth K=0 took 15 ms
May 31, 2018 10:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-10(UNSAT) depth K=0 took 11 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-11(UNSAT) depth K=0 took 12 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-12(UNSAT) depth K=0 took 12 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-13(UNSAT) depth K=0 took 10 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-14(UNSAT) depth K=0 took 10 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-15(UNSAT) depth K=0 took 3 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-00(UNSAT) depth K=1 took 15 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-01(UNSAT) depth K=1 took 4 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-02(UNSAT) depth K=1 took 7 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-03(UNSAT) depth K=1 took 7 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-04(UNSAT) depth K=1 took 16 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-05(UNSAT) depth K=1 took 12 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-06(UNSAT) depth K=1 took 15 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-07(UNSAT) depth K=1 took 0 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-08(UNSAT) depth K=1 took 1 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-09(UNSAT) depth K=1 took 4 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-10(UNSAT) depth K=1 took 14 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-11(UNSAT) depth K=1 took 12 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-12(UNSAT) depth K=1 took 42 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-13(UNSAT) depth K=1 took 12 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 50 place invariants in 55 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-14(UNSAT) depth K=1 took 23 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-15(UNSAT) depth K=1 took 24 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-00(UNSAT) depth K=2 took 172 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-01(UNSAT) depth K=2 took 31 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-02(UNSAT) depth K=2 took 10 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-03(UNSAT) depth K=2 took 18 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-04(UNSAT) depth K=2 took 11 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-05(UNSAT) depth K=2 took 16 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-06(UNSAT) depth K=2 took 12 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-07(UNSAT) depth K=2 took 12 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-08(UNSAT) depth K=2 took 12 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-09(UNSAT) depth K=2 took 4 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-10(UNSAT) depth K=2 took 11 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-11(UNSAT) depth K=2 took 11 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-12(UNSAT) depth K=2 took 35 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-13(UNSAT) depth K=2 took 8 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-14(UNSAT) depth K=2 took 16 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ProductionCell-PT-none-ReachabilityCardinality-15(UNSAT) depth K=2 took 11 ms
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying ProductionCell-PT-none-ReachabilityCardinality-00 SMT depth 3
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 3
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 3
Exception in thread "Thread-8" java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.smt.ISMTSolver.init(ISMTSolver.java:17)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:278)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
May 31, 2018 10:25:36 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 0/ 16 properties. Interrupting other analysis methods.
May 31, 2018 10:25:36 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2360ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ProductionCell-PT-none"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/ProductionCell-PT-none.tgz
mv ProductionCell-PT-none execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ProductionCell-PT-none, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r140-qhx2-152673581800005"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;