About the Execution of ITS-Tools.L for PermAdmissibility-PT-05
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 15757.590 | 3600000.00 | 10677259.00 | 1133.10 | ???????T???????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
..............................................................
/home/mcc/execution
total 900K
-rw-r--r-- 1 mcc users 4.2K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 26K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 101K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 8.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 33K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 24K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 87K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.5K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 481K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is PermAdmissibility-PT-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r117-csrt-152666477000488
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-00
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-01
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-02
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-03
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-04
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-05
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-06
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-07
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-08
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-09
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-10
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-11
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-12
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-13
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-14
FORMULA_NAME PermAdmissibility-PT-05-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1527258931252
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : PermAdmissibility-PT-05-ReachabilityCardinality-00 with value :((((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)>=3)
Read [invariant] property : PermAdmissibility-PT-05-ReachabilityCardinality-01 with value :((((((((out7_1+out7_0)+out7_3)+out7_2)+out7_5)+out7_4)+out7_7)+out7_6)<=c17)
Read [reachable] property : PermAdmissibility-PT-05-ReachabilityCardinality-02 with value :((((((((aux10_0+aux10_2)+aux10_1)+aux10_4)+aux10_3)+aux10_5)+aux10_6)+aux10_7)>=3)
Read [reachable] property : PermAdmissibility-PT-05-ReachabilityCardinality-03 with value :(((!((((((((aux10_0+aux10_2)+aux10_1)+aux10_4)+aux10_3)+aux10_5)+aux10_6)+aux10_7)<=(in1_1+in1_0)))&&((((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)>=3))&&(!(c9>=1)))
Read [reachable] property : PermAdmissibility-PT-05-ReachabilityCardinality-04 with value :((((c12<=c16)||((((aux8_7+aux8_3)+aux8_6)+aux8_2)>=3))&&((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_6)+aux14_5)+aux14_7)>=1))&&(c13<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)))
Read [reachable] property : PermAdmissibility-PT-05-ReachabilityCardinality-05 with value :((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_6)+aux14_5)+aux14_7)>=2)
Read [reachable] property : PermAdmissibility-PT-05-ReachabilityCardinality-06 with value :((((((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)>=2)||(c9<=(((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)))&&((((((((((aux12_6+aux12_5)+aux12_4)+aux12_3)+aux12_2)+aux12_1)+aux12_0)+aux12_7)>=3)||(c14>=2))||(((((((((out8_1+out8_0)+out8_3)+out8_2)+out8_6)+out8_7)+out8_4)+out8_5)>=2)||(c12>=3))))
Read [invariant] property : PermAdmissibility-PT-05-ReachabilityCardinality-07 with value :((((c16>=1)||((((((((out3_0+out3_1)+out3_6)+out3_7)+out3_2)+out3_3)+out3_4)+out3_5)<=(((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)))||(((((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)>=3)&&(c17<=c16)))||((((aux8_7+aux8_3)+aux8_6)+aux8_2)>=2))
Read [invariant] property : PermAdmissibility-PT-05-ReachabilityCardinality-08 with value :(!(out1_3>=2))
Read [reachable] property : PermAdmissibility-PT-05-ReachabilityCardinality-09 with value :(aux14_7>=2)
Read [invariant] property : PermAdmissibility-PT-05-ReachabilityCardinality-10 with value :((aux13_1<=aux16_0)||((!(out6_1<=aux11_0))&&(aux16_2<=aux12_1)))
Read [reachable] property : PermAdmissibility-PT-05-ReachabilityCardinality-11 with value :(!(out7_3<=aux16_4))
Read [reachable] property : PermAdmissibility-PT-05-ReachabilityCardinality-12 with value :(out7_4>=1)
Read [reachable] property : PermAdmissibility-PT-05-ReachabilityCardinality-13 with value :((aux11_2>=2)&&(((out7_7>=1)||(aux14_2>=2))||((c6>=3)||(c16>=3))))
Read [invariant] property : PermAdmissibility-PT-05-ReachabilityCardinality-14 with value :(out7_1<=aux13_6)
Read [reachable] property : PermAdmissibility-PT-05-ReachabilityCardinality-15 with value :((((aux13_0>=2)&&(aux9_0>=1))&&(!(aux8_7>=3)))&&(!(out7_7<=out8_1)))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 592 rows 168 cols
invariant :out1_0 + out1_6 + out1_5 + -1'out2_0 + out1_7 + out1_2 + out1_1 + out1_4 + out1_3 + -1'out2_7 + -1'out2_5 + -1'out2_6 + -1'out2_3 + -1'out2_4 + -1'out2_1 + -1'out2_2 = 0
invariant :aux7_7 + aux7_6 + -1'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + aux7_3 + aux7_2 + 2'c7 + -4'c5 + 2'in1_1 + 2'in1_0 = 0
invariant :aux6_0 + -1'aux8_7 + -1'aux8_3 + -1'aux8_6 + aux6_5 + -1'aux8_2 + aux6_1 + aux6_4 + -2'c7 + -2'c8 = 0
invariant :-1'aux16_3 + -1'aux16_6 + aux14_2 + aux14_7 + -1'out7_3 + -1'out7_6 + out8_2 + out8_7 + -1'out5_6 + -1'out5_3 + out6_2 + out6_7 + -1'aux15_6 + -1'aux15_3 + aux13_2 + aux13_7 + -1'out3_6 + -1'out3_3 + out4_7 + out4_2 + -1'out1_6 + -1'out1_3 + out2_7 + out2_2 + -1'aux8_3 + -1'aux8_6 + -1'aux12_6 + -1'aux12_3 + aux11_2 + c11 + -1'aux7_6 + -1'aux10_3 + aux11_7 + aux5_1 + aux5_0 + aux5_5 + aux5_4 + -1'aux7_3 + aux9_7 + in4_7 + -1'in2_3 + -1'aux10_6 + aux9_2 + -2'c7 + -1'c8 + 4'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :c18 + out4_0 + out4_1 + out4_7 + out4_6 + out4_3 + out4_2 + out4_5 + out4_4 + -1'out2_0 + -1'out2_7 + -1'out2_5 + -1'out2_6 + -1'out2_3 + -1'out2_4 + -1'out2_1 + -1'out2_2 = 0
invariant :aux16_3 + aux14_3 + out7_3 + out8_3 + out5_3 + out6_3 + aux15_3 + aux13_3 + out3_3 + out4_3 + out1_3 + out2_3 + aux8_3 + aux12_3 + aux11_3 + aux10_3 + aux7_3 + in2_3 + aux9_3 = 5
invariant :in4_6 + in4_7 + -2'c7 + -1'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :2'c5 + c6 + -1'in1_1 + -1'in1_0 = 0
invariant :-1'aux8_7 + c12 + -1'aux8_3 + -1'aux8_6 + -1'aux8_2 + 2'c11 + 2'aux5_1 + 2'aux5_0 + 2'aux5_5 + 2'aux5_4 + -2'c9 + -4'c7 + -4'c8 + 8'c5 + -4'in1_1 + -4'in1_0 = 0
invariant :in2_2 + in2_3 + -2'c7 + -1'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :out7_1 + out7_0 + out7_3 + out7_2 + out7_5 + out7_4 + out7_7 + out7_6 + -1'out8_1 + -1'out8_0 + -1'out8_3 + -1'out8_2 + -1'out8_6 + -1'out8_7 + -1'out8_4 + -1'out8_5 = 0
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + 2'c17 + out4_5 + out4_4 + out1_6 + 3'out2_0 + -1'out1_1 + 2'out2_7 + 3'out2_5 + 3'out2_6 + 2'out2_3 + 3'out2_4 + 2'out2_1 + 2'out2_2 + 4'aux8_7 + 4'aux8_3 + 5'aux8_6 + 4'aux8_2 + -1'aux6_1 + 3'aux12_6 + 2'aux12_5 + 2'aux12_4 + 2'aux12_3 + 2'aux12_2 + aux12_1 + 2'aux12_0 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -5'c11 + 2'aux12_7 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -6'aux5_1 + -5'aux5_0 + -5'aux5_5 + -5'aux5_4 + -1'aux9_7 + -1'in4_7 + aux10_6 + 4'c9 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c15 + -2'c14 + 14'c7 + 13'c8 + -24'c5 + 13'in1_1 + 14'in1_0 = 10
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + out4_5 + out4_4 + out1_6 + out2_0 + -1'out1_1 + out2_5 + out2_6 + out2_4 + 2'aux8_7 + 2'aux8_3 + 3'aux8_6 + 2'aux8_2 + -1'aux6_1 + aux12_6 + -1'aux12_1 + 2'c13 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -3'c11 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -4'aux5_1 + -3'aux5_0 + -3'aux5_5 + -3'aux5_4 + -1'aux9_7 + -1'in4_7 + aux10_6 + 2'c9 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + 8'c7 + 7'c8 + -14'c5 + 7'in1_1 + 8'in1_0 = 0
invariant :c19 + out6_1 + out6_2 + out6_0 + out6_6 + out6_5 + out6_4 + out6_3 + out6_7 + -1'out4_0 + -1'out4_1 + -1'out4_7 + -1'out4_6 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 = 0
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + out4_5 + out4_4 + out1_6 + out2_0 + -1'out1_1 + out2_5 + out2_6 + out2_4 + aux8_6 + -1'aux6_1 + aux12_6 + -1'aux12_1 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -1'c11 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -2'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + aux9_4 + aux9_5 + aux9_6 + -1'in4_7 + aux10_6 + 2'c9 + aux9_0 + -1'c14 + 4'c7 + 3'c8 + -6'c5 + 3'in1_1 + 4'in1_0 = 0
invariant :c20 + out8_1 + out8_0 + out8_3 + out8_2 + out8_6 + out8_7 + out8_4 + out8_5 + -1'out6_1 + -1'out6_2 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -1'out6_3 + -1'out6_7 = 0
invariant :-1'aux16_0 + aux16_1 + -1'aux16_6 + 2'aux14_1 + 2'aux14_2 + 2'aux14_3 + aux14_4 + aux14_6 + aux14_5 + 2'aux14_7 + out7_1 + -1'out7_0 + -1'out7_6 + 2'out8_1 + 2'out8_3 + 2'out8_2 + out8_6 + 2'out8_7 + out8_4 + out8_5 + -1'out5_2 + -2'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 3'out6_1 + 3'out6_2 + -1'out5_7 + out6_0 + 2'out6_6 + 2'out6_5 + 2'out6_4 + 3'out6_3 + aux15_1 + -1'aux15_0 + 3'out6_7 + -1'aux15_6 + -2'aux13_0 + 2'out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + out3_7 + -3'out4_0 + -1'out4_1 + out3_2 + out3_3 + out3_4 + out3_5 + -1'out4_7 + -2'out4_6 + -1'out1_0 + -1'out4_3 + -1'out4_2 + -2'out4_5 + -2'out4_4 + -1'out1_6 + -2'out2_0 + out1_1 + -1'out2_5 + -1'out2_6 + -1'out2_4 + -1'aux8_7 + -1'aux8_3 + -2'aux8_6 + aux6_5 + -1'aux8_2 + 2'aux6_1 + aux6_4 + -1'aux12_6 + aux12_1 + -1'aux12_0 + aux11_3 + aux11_2 + aux11_1 + -1'aux11_0 + c11 + -1'aux7_6 + -1'aux10_0 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + -1'aux9_0 + aux9_1 + aux9_2 + aux9_3 + 2'c14 + -4'c7 + -3'c8 + 4'c5 + -1'in1_1 + -3'in1_0 = 5
invariant :-2'aux16_1 + aux16_6 + -2'aux14_1 + -2'aux14_2 + -2'aux14_3 + -1'aux14_6 + -2'aux14_7 + -2'out7_1 + out7_6 + -2'out8_1 + -2'out8_3 + -2'out8_2 + -1'out8_6 + -2'out8_7 + 2'out5_2 + 2'out5_0 + 2'out5_5 + 3'out5_6 + 2'out5_3 + 2'out5_4 + -4'out6_1 + -4'out6_2 + 2'out5_7 + -2'out6_0 + -3'out6_6 + -2'out6_5 + -2'out6_4 + -4'out6_3 + -2'aux15_1 + -4'out6_7 + aux15_6 + 2'aux13_0 + -2'out3_1 + 2'aux13_4 + 2'aux13_5 + aux13_6 + out3_6 + 2'out4_0 + out4_6 + 2'out4_5 + 2'out4_4 + out1_6 + 2'out2_0 + -2'out1_1 + 2'out2_5 + out2_6 + 2'out2_4 + aux8_6 + -2'aux6_1 + aux12_6 + -2'aux12_1 + aux11_5 + aux11_4 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + aux11_0 + aux7_6 + -2'aux10_1 + -1'aux11_7 + -2'aux5_1 + aux9_4 + aux9_5 + -1'aux9_7 + -1'in4_7 + aux10_6 + aux9_0 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c14 + 2'c7 + c8 + -2'c5 + 2'in1_0 = -5
invariant :aux16_1 + -1'aux16_6 + aux14_1 + aux14_2 + aux14_3 + aux14_7 + out7_1 + -1'out7_6 + out8_1 + out8_3 + out8_2 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_1 + 2'out6_7 + -1'aux15_6 + -1'aux13_0 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + -1'out4_0 + -1'out4_6 + 2'c17 + -1'out4_5 + -1'out4_4 + -1'out1_6 + out2_0 + out1_1 + 2'out2_7 + out2_5 + out2_6 + 2'out2_3 + out2_4 + 2'out2_1 + 2'out2_2 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -1'aux7_6 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + aux9_1 + aux9_2 + aux9_3 + 2'c16 + 2'c15 + 2'c14 + -2'c7 + -1'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 10
invariant :-1'aux16_1 + aux16_6 + aux16_7 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'out7_1 + out7_7 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + 2'out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_2 + -2'aux15_1 + -1'aux15_0 + -1'out6_7 + -1'aux15_5 + -1'aux15_4 + -1'aux15_3 + aux13_0 + aux13_7 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out3_7 + -1'out4_1 + -1'out4_3 + -1'out4_2 + out1_6 + out1_7 + -1'out1_1 + -1'out2_3 + -1'out2_1 + -1'out2_2 + aux8_7 + aux8_6 + -1'aux6_1 + aux12_6 + -1'aux12_1 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -1'c11 + aux12_7 + -1'aux10_1 + -1'aux5_1 + -1'aux7_3 + -1'aux7_2 + aux10_6 + aux10_7 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c15 + -2'c14 + c8 + -1'in1_1 = -5
invariant :aux16_0 + aux16_1 + aux16_4 + -1'aux14_5 + out7_1 + out7_0 + out7_4 + -1'out8_5 + -1'out5_2 + -1'out5_5 + -1'out5_6 + -1'out5_3 + out6_1 + out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_4 + out6_3 + aux15_1 + aux15_0 + out6_7 + aux15_4 + -1'aux13_5 + -1'out3_6 + -1'out3_7 + out4_0 + out4_1 + -1'out3_2 + -1'out3_3 + -1'out3_5 + out4_7 + out4_6 + out1_0 + out4_3 + out4_2 + out4_4 + out1_1 + out1_4 + -1'out2_5 + aux8_7 + aux8_3 + aux8_6 + -1'aux6_5 + aux8_2 + aux12_4 + aux12_1 + aux12_0 + -1'aux11_5 + -1'c11 + aux10_0 + aux10_1 + aux10_4 + -1'aux5_5 + -1'aux9_5 + in3_4 + 2'c7 + 2'c8 + -2'c5 + in1_1 + in1_0 = 5
invariant :aux16_1 + -1'aux16_6 + -2'aux16_7 + aux14_1 + aux14_2 + aux14_3 + -1'aux14_7 + out7_1 + -2'out7_7 + -1'out7_6 + out8_1 + out8_3 + out8_2 + -1'out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -3'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + 2'aux15_2 + 3'aux15_1 + 2'aux15_0 + aux15_6 + 2'aux15_5 + 2'aux15_4 + 2'aux15_3 + -1'aux13_0 + -2'aux13_7 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + -2'out3_7 + out4_0 + 2'out4_1 + out4_6 + 2'c17 + 2'out4_3 + 2'out4_2 + out4_5 + out4_4 + -1'out1_6 + 3'out2_0 + -2'out1_7 + out1_1 + 2'out2_7 + 3'out2_5 + 3'out2_6 + 4'out2_3 + 3'out2_4 + 4'out2_1 + 4'out2_2 + -2'aux8_7 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -2'aux12_7 + aux7_6 + 2'aux10_0 + 2'aux10_2 + 3'aux10_1 + 2'aux10_4 + 2'aux10_3 + -1'aux11_7 + 4'aux5_1 + 3'aux5_0 + 3'aux5_5 + 3'aux5_4 + 2'aux7_3 + 2'aux7_2 + -1'aux9_7 + -1'in4_7 + 2'aux10_5 + aux10_6 + -4'c9 + aux9_1 + aux9_2 + aux9_3 + 2'c15 + 2'c14 + -2'c7 + -5'c8 + 8'c5 + -1'in1_1 + -2'in1_0 = 20
invariant :out5_1 + out5_2 + out5_0 + out5_5 + out5_6 + out5_3 + out5_4 + -1'out6_1 + -1'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -1'out6_3 + -1'out6_7 = 0
invariant :aux16_1 + aux14_1 + out7_1 + out8_1 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -1'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + out6_3 + aux15_1 + out6_7 + aux13_1 + out3_1 + out4_1 + out1_1 + out2_1 + aux6_1 + aux12_1 + aux11_1 + aux10_1 + aux5_1 + aux9_1 + in1_1 = 5
invariant :aux16_0 + aux14_0 + out7_0 + out8_0 + out5_0 + out6_0 + aux15_0 + aux13_0 + -1'out3_1 + -1'out3_6 + -1'out3_7 + 2'out4_0 + out4_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + out4_7 + out4_6 + out1_0 + out4_3 + out4_2 + out4_5 + out4_4 + out2_0 + aux8_7 + aux8_3 + aux8_6 + -1'aux6_5 + aux8_2 + -1'aux6_1 + -1'aux6_4 + aux12_0 + aux11_0 + aux10_0 + aux5_0 + aux9_0 + 2'c7 + 2'c8 + in1_0 = 5
invariant :c110 + -1'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + 2'c9 + 2'c7 + 2'c8 + -4'c5 + 2'in1_1 + 2'in1_0 = 0
invariant :out3_0 + out3_1 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + out3_2 + out3_3 + out3_4 + out3_5 + -1'out4_7 + -1'out4_6 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 = 0
invariant :aux16_1 + aux14_1 + aux14_2 + aux14_3 + aux14_6 + aux14_7 + out7_1 + out8_1 + out8_3 + out8_2 + out8_6 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -1'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + 2'out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_1 + 2'out6_7 + -1'aux13_0 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'out4_0 + -1'out4_5 + -1'out4_4 + -1'out2_0 + out1_1 + -1'out2_5 + -1'out2_4 + aux6_1 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + aux10_1 + aux11_7 + aux11_6 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + -1'aux9_4 + -1'aux9_5 + -2'c9 + -1'aux9_0 + c14 + -2'c7 + -2'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 5
invariant :aux16_2 + aux16_3 + aux16_6 + aux16_7 + out7_3 + out7_2 + out7_7 + out7_6 + out5_2 + out5_6 + out5_3 + out5_7 + -1'aux15_1 + -1'aux15_0 + -1'aux15_5 + -1'aux15_4 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + out3_2 + out3_3 + -1'out4_7 + -1'out4_6 + -2'c17 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 + out1_6 + -3'out2_0 + out1_7 + out1_2 + out1_3 + -3'out2_7 + -3'out2_5 + -3'out2_6 + -3'out2_3 + -3'out2_4 + -3'out2_1 + -3'out2_2 + -1'aux8_7 + -1'aux8_3 + -1'aux8_6 + -1'aux8_2 + -1'aux12_5 + -1'aux12_4 + -1'aux12_1 + -1'aux12_0 + c11 + -1'aux10_0 + -1'aux10_1 + -1'aux10_4 + -1'aux10_5 + -2'c7 + -2'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = -10
invariant :aux16_1 + -1'aux16_6 + aux14_1 + aux14_2 + aux14_3 + aux14_7 + out7_1 + -1'out7_6 + out8_1 + out8_3 + out8_2 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_2 + 2'aux15_1 + aux15_0 + 2'out6_7 + aux15_5 + aux15_4 + aux15_3 + -1'aux13_0 + aux15_7 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + out4_1 + out4_7 + out4_3 + out4_2 + -1'out1_6 + out1_1 + out2_7 + out2_3 + out2_1 + out2_2 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -1'aux7_6 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + aux9_1 + aux9_2 + aux9_3 + 2'c15 + 2'c14 + -2'c7 + -1'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 10
invariant :in3_5 + in3_4 + -1'in1_1 + -1'in1_0 = 0
invariant :aux16_5 + aux14_5 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_4 + -1'out7_7 + -1'out7_6 + out8_1 + out8_0 + out8_3 + out8_2 + out8_6 + out8_7 + out8_4 + 2'out8_5 + out5_5 + out6_5 + aux15_5 + aux13_5 + out3_5 + -1'out1_0 + out4_5 + -1'out1_6 + out2_0 + -1'out1_7 + -1'out1_2 + -1'out1_1 + -1'out1_4 + -1'out1_3 + out2_7 + 2'out2_5 + out2_6 + out2_3 + out2_4 + out2_1 + out2_2 + aux6_5 + aux12_5 + aux11_5 + aux5_5 + aux9_5 + aux10_5 + -1'in3_4 + in1_1 + in1_0 = 5
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 592 rows 168 cols
invariant :out1_0 + out1_6 + out1_5 + -1'out2_0 + out1_7 + out1_2 + out1_1 + out1_4 + out1_3 + -1'out2_7 + -1'out2_5 + -1'out2_6 + -1'out2_3 + -1'out2_4 + -1'out2_1 + -1'out2_2 = 0
invariant :aux7_7 + aux7_6 + -1'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + aux7_3 + aux7_2 + 2'c7 + -4'c5 + 2'in1_1 + 2'in1_0 = 0
invariant :aux6_0 + -1'aux8_7 + -1'aux8_3 + -1'aux8_6 + aux6_5 + -1'aux8_2 + aux6_1 + aux6_4 + -2'c7 + -2'c8 = 0
invariant :-1'aux16_3 + -1'aux16_6 + aux14_2 + aux14_7 + -1'out7_3 + -1'out7_6 + out8_2 + out8_7 + -1'out5_6 + -1'out5_3 + out6_2 + out6_7 + -1'aux15_6 + -1'aux15_3 + aux13_2 + aux13_7 + -1'out3_6 + -1'out3_3 + out4_7 + out4_2 + -1'out1_6 + -1'out1_3 + out2_7 + out2_2 + -1'aux8_3 + -1'aux8_6 + -1'aux12_6 + -1'aux12_3 + aux11_2 + c11 + -1'aux7_6 + -1'aux10_3 + aux11_7 + aux5_1 + aux5_0 + aux5_5 + aux5_4 + -1'aux7_3 + aux9_7 + in4_7 + -1'in2_3 + -1'aux10_6 + aux9_2 + -2'c7 + -1'c8 + 4'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :c18 + out4_0 + out4_1 + out4_7 + out4_6 + out4_3 + out4_2 + out4_5 + out4_4 + -1'out2_0 + -1'out2_7 + -1'out2_5 + -1'out2_6 + -1'out2_3 + -1'out2_4 + -1'out2_1 + -1'out2_2 = 0
invariant :aux16_3 + aux14_3 + out7_3 + out8_3 + out5_3 + out6_3 + aux15_3 + aux13_3 + out3_3 + out4_3 + out1_3 + out2_3 + aux8_3 + aux12_3 + aux11_3 + aux10_3 + aux7_3 + in2_3 + aux9_3 = 5
invariant :in4_6 + in4_7 + -2'c7 + -1'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :2'c5 + c6 + -1'in1_1 + -1'in1_0 = 0
invariant :-1'aux8_7 + c12 + -1'aux8_3 + -1'aux8_6 + -1'aux8_2 + 2'c11 + 2'aux5_1 + 2'aux5_0 + 2'aux5_5 + 2'aux5_4 + -2'c9 + -4'c7 + -4'c8 + 8'c5 + -4'in1_1 + -4'in1_0 = 0
invariant :in2_2 + in2_3 + -2'c7 + -1'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :out7_1 + out7_0 + out7_3 + out7_2 + out7_5 + out7_4 + out7_7 + out7_6 + -1'out8_1 + -1'out8_0 + -1'out8_3 + -1'out8_2 + -1'out8_6 + -1'out8_7 + -1'out8_4 + -1'out8_5 = 0
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + 2'c17 + out4_5 + out4_4 + out1_6 + 3'out2_0 + -1'out1_1 + 2'out2_7 + 3'out2_5 + 3'out2_6 + 2'out2_3 + 3'out2_4 + 2'out2_1 + 2'out2_2 + 4'aux8_7 + 4'aux8_3 + 5'aux8_6 + 4'aux8_2 + -1'aux6_1 + 3'aux12_6 + 2'aux12_5 + 2'aux12_4 + 2'aux12_3 + 2'aux12_2 + aux12_1 + 2'aux12_0 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -5'c11 + 2'aux12_7 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -6'aux5_1 + -5'aux5_0 + -5'aux5_5 + -5'aux5_4 + -1'aux9_7 + -1'in4_7 + aux10_6 + 4'c9 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c15 + -2'c14 + 14'c7 + 13'c8 + -24'c5 + 13'in1_1 + 14'in1_0 = 10
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + out4_5 + out4_4 + out1_6 + out2_0 + -1'out1_1 + out2_5 + out2_6 + out2_4 + 2'aux8_7 + 2'aux8_3 + 3'aux8_6 + 2'aux8_2 + -1'aux6_1 + aux12_6 + -1'aux12_1 + 2'c13 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -3'c11 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -4'aux5_1 + -3'aux5_0 + -3'aux5_5 + -3'aux5_4 + -1'aux9_7 + -1'in4_7 + aux10_6 + 2'c9 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + 8'c7 + 7'c8 + -14'c5 + 7'in1_1 + 8'in1_0 = 0
invariant :c19 + out6_1 + out6_2 + out6_0 + out6_6 + out6_5 + out6_4 + out6_3 + out6_7 + -1'out4_0 + -1'out4_1 + -1'out4_7 + -1'out4_6 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 = 0
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + out4_5 + out4_4 + out1_6 + out2_0 + -1'out1_1 + out2_5 + out2_6 + out2_4 + aux8_6 + -1'aux6_1 + aux12_6 + -1'aux12_1 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -1'c11 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -2'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + aux9_4 + aux9_5 + aux9_6 + -1'in4_7 + aux10_6 + 2'c9 + aux9_0 + -1'c14 + 4'c7 + 3'c8 + -6'c5 + 3'in1_1 + 4'in1_0 = 0
invariant :c20 + out8_1 + out8_0 + out8_3 + out8_2 + out8_6 + out8_7 + out8_4 + out8_5 + -1'out6_1 + -1'out6_2 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -1'out6_3 + -1'out6_7 = 0
invariant :-1'aux16_0 + aux16_1 + -1'aux16_6 + 2'aux14_1 + 2'aux14_2 + 2'aux14_3 + aux14_4 + aux14_6 + aux14_5 + 2'aux14_7 + out7_1 + -1'out7_0 + -1'out7_6 + 2'out8_1 + 2'out8_3 + 2'out8_2 + out8_6 + 2'out8_7 + out8_4 + out8_5 + -1'out5_2 + -2'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 3'out6_1 + 3'out6_2 + -1'out5_7 + out6_0 + 2'out6_6 + 2'out6_5 + 2'out6_4 + 3'out6_3 + aux15_1 + -1'aux15_0 + 3'out6_7 + -1'aux15_6 + -2'aux13_0 + 2'out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + out3_7 + -3'out4_0 + -1'out4_1 + out3_2 + out3_3 + out3_4 + out3_5 + -1'out4_7 + -2'out4_6 + -1'out1_0 + -1'out4_3 + -1'out4_2 + -2'out4_5 + -2'out4_4 + -1'out1_6 + -2'out2_0 + out1_1 + -1'out2_5 + -1'out2_6 + -1'out2_4 + -1'aux8_7 + -1'aux8_3 + -2'aux8_6 + aux6_5 + -1'aux8_2 + 2'aux6_1 + aux6_4 + -1'aux12_6 + aux12_1 + -1'aux12_0 + aux11_3 + aux11_2 + aux11_1 + -1'aux11_0 + c11 + -1'aux7_6 + -1'aux10_0 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + -1'aux9_0 + aux9_1 + aux9_2 + aux9_3 + 2'c14 + -4'c7 + -3'c8 + 4'c5 + -1'in1_1 + -3'in1_0 = 5
invariant :-2'aux16_1 + aux16_6 + -2'aux14_1 + -2'aux14_2 + -2'aux14_3 + -1'aux14_6 + -2'aux14_7 + -2'out7_1 + out7_6 + -2'out8_1 + -2'out8_3 + -2'out8_2 + -1'out8_6 + -2'out8_7 + 2'out5_2 + 2'out5_0 + 2'out5_5 + 3'out5_6 + 2'out5_3 + 2'out5_4 + -4'out6_1 + -4'out6_2 + 2'out5_7 + -2'out6_0 + -3'out6_6 + -2'out6_5 + -2'out6_4 + -4'out6_3 + -2'aux15_1 + -4'out6_7 + aux15_6 + 2'aux13_0 + -2'out3_1 + 2'aux13_4 + 2'aux13_5 + aux13_6 + out3_6 + 2'out4_0 + out4_6 + 2'out4_5 + 2'out4_4 + out1_6 + 2'out2_0 + -2'out1_1 + 2'out2_5 + out2_6 + 2'out2_4 + aux8_6 + -2'aux6_1 + aux12_6 + -2'aux12_1 + aux11_5 + aux11_4 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + aux11_0 + aux7_6 + -2'aux10_1 + -1'aux11_7 + -2'aux5_1 + aux9_4 + aux9_5 + -1'aux9_7 + -1'in4_7 + aux10_6 + aux9_0 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c14 + 2'c7 + c8 + -2'c5 + 2'in1_0 = -5
invariant :aux16_1 + -1'aux16_6 + aux14_1 + aux14_2 + aux14_3 + aux14_7 + out7_1 + -1'out7_6 + out8_1 + out8_3 + out8_2 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_1 + 2'out6_7 + -1'aux15_6 + -1'aux13_0 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + -1'out4_0 + -1'out4_6 + 2'c17 + -1'out4_5 + -1'out4_4 + -1'out1_6 + out2_0 + out1_1 + 2'out2_7 + out2_5 + out2_6 + 2'out2_3 + out2_4 + 2'out2_1 + 2'out2_2 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -1'aux7_6 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + aux9_1 + aux9_2 + aux9_3 + 2'c16 + 2'c15 + 2'c14 + -2'c7 + -1'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 10
invariant :-1'aux16_1 + aux16_6 + aux16_7 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'out7_1 + out7_7 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + 2'out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_2 + -2'aux15_1 + -1'aux15_0 + -1'out6_7 + -1'aux15_5 + -1'aux15_4 + -1'aux15_3 + aux13_0 + aux13_7 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out3_7 + -1'out4_1 + -1'out4_3 + -1'out4_2 + out1_6 + out1_7 + -1'out1_1 + -1'out2_3 + -1'out2_1 + -1'out2_2 + aux8_7 + aux8_6 + -1'aux6_1 + aux12_6 + -1'aux12_1 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -1'c11 + aux12_7 + -1'aux10_1 + -1'aux5_1 + -1'aux7_3 + -1'aux7_2 + aux10_6 + aux10_7 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c15 + -2'c14 + c8 + -1'in1_1 = -5
invariant :aux16_0 + aux16_1 + aux16_4 + -1'aux14_5 + out7_1 + out7_0 + out7_4 + -1'out8_5 + -1'out5_2 + -1'out5_5 + -1'out5_6 + -1'out5_3 + out6_1 + out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_4 + out6_3 + aux15_1 + aux15_0 + out6_7 + aux15_4 + -1'aux13_5 + -1'out3_6 + -1'out3_7 + out4_0 + out4_1 + -1'out3_2 + -1'out3_3 + -1'out3_5 + out4_7 + out4_6 + out1_0 + out4_3 + out4_2 + out4_4 + out1_1 + out1_4 + -1'out2_5 + aux8_7 + aux8_3 + aux8_6 + -1'aux6_5 + aux8_2 + aux12_4 + aux12_1 + aux12_0 + -1'aux11_5 + -1'c11 + aux10_0 + aux10_1 + aux10_4 + -1'aux5_5 + -1'aux9_5 + in3_4 + 2'c7 + 2'c8 + -2'c5 + in1_1 + in1_0 = 5
invariant :aux16_1 + -1'aux16_6 + -2'aux16_7 + aux14_1 + aux14_2 + aux14_3 + -1'aux14_7 + out7_1 + -2'out7_7 + -1'out7_6 + out8_1 + out8_3 + out8_2 + -1'out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -3'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + 2'aux15_2 + 3'aux15_1 + 2'aux15_0 + aux15_6 + 2'aux15_5 + 2'aux15_4 + 2'aux15_3 + -1'aux13_0 + -2'aux13_7 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + -2'out3_7 + out4_0 + 2'out4_1 + out4_6 + 2'c17 + 2'out4_3 + 2'out4_2 + out4_5 + out4_4 + -1'out1_6 + 3'out2_0 + -2'out1_7 + out1_1 + 2'out2_7 + 3'out2_5 + 3'out2_6 + 4'out2_3 + 3'out2_4 + 4'out2_1 + 4'out2_2 + -2'aux8_7 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -2'aux12_7 + aux7_6 + 2'aux10_0 + 2'aux10_2 + 3'aux10_1 + 2'aux10_4 + 2'aux10_3 + -1'aux11_7 + 4'aux5_1 + 3'aux5_0 + 3'aux5_5 + 3'aux5_4 + 2'aux7_3 + 2'aux7_2 + -1'aux9_7 + -1'in4_7 + 2'aux10_5 + aux10_6 + -4'c9 + aux9_1 + aux9_2 + aux9_3 + 2'c15 + 2'c14 + -2'c7 + -5'c8 + 8'c5 + -1'in1_1 + -2'in1_0 = 20
invariant :out5_1 + out5_2 + out5_0 + out5_5 + out5_6 + out5_3 + out5_4 + -1'out6_1 + -1'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -1'out6_3 + -1'out6_7 = 0
invariant :aux16_1 + aux14_1 + out7_1 + out8_1 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -1'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + out6_3 + aux15_1 + out6_7 + aux13_1 + out3_1 + out4_1 + out1_1 + out2_1 + aux6_1 + aux12_1 + aux11_1 + aux10_1 + aux5_1 + aux9_1 + in1_1 = 5
invariant :aux16_0 + aux14_0 + out7_0 + out8_0 + out5_0 + out6_0 + aux15_0 + aux13_0 + -1'out3_1 + -1'out3_6 + -1'out3_7 + 2'out4_0 + out4_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + out4_7 + out4_6 + out1_0 + out4_3 + out4_2 + out4_5 + out4_4 + out2_0 + aux8_7 + aux8_3 + aux8_6 + -1'aux6_5 + aux8_2 + -1'aux6_1 + -1'aux6_4 + aux12_0 + aux11_0 + aux10_0 + aux5_0 + aux9_0 + 2'c7 + 2'c8 + in1_0 = 5
invariant :c110 + -1'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + 2'c9 + 2'c7 + 2'c8 + -4'c5 + 2'in1_1 + 2'in1_0 = 0
invariant :out3_0 + out3_1 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + out3_2 + out3_3 + out3_4 + out3_5 + -1'out4_7 + -1'out4_6 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 = 0
invariant :aux16_1 + aux14_1 + aux14_2 + aux14_3 + aux14_6 + aux14_7 + out7_1 + out8_1 + out8_3 + out8_2 + out8_6 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -1'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + 2'out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_1 + 2'out6_7 + -1'aux13_0 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'out4_0 + -1'out4_5 + -1'out4_4 + -1'out2_0 + out1_1 + -1'out2_5 + -1'out2_4 + aux6_1 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + aux10_1 + aux11_7 + aux11_6 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + -1'aux9_4 + -1'aux9_5 + -2'c9 + -1'aux9_0 + c14 + -2'c7 + -2'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 5
invariant :aux16_2 + aux16_3 + aux16_6 + aux16_7 + out7_3 + out7_2 + out7_7 + out7_6 + out5_2 + out5_6 + out5_3 + out5_7 + -1'aux15_1 + -1'aux15_0 + -1'aux15_5 + -1'aux15_4 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + out3_2 + out3_3 + -1'out4_7 + -1'out4_6 + -2'c17 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 + out1_6 + -3'out2_0 + out1_7 + out1_2 + out1_3 + -3'out2_7 + -3'out2_5 + -3'out2_6 + -3'out2_3 + -3'out2_4 + -3'out2_1 + -3'out2_2 + -1'aux8_7 + -1'aux8_3 + -1'aux8_6 + -1'aux8_2 + -1'aux12_5 + -1'aux12_4 + -1'aux12_1 + -1'aux12_0 + c11 + -1'aux10_0 + -1'aux10_1 + -1'aux10_4 + -1'aux10_5 + -2'c7 + -2'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = -10
invariant :aux16_1 + -1'aux16_6 + aux14_1 + aux14_2 + aux14_3 + aux14_7 + out7_1 + -1'out7_6 + out8_1 + out8_3 + out8_2 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_2 + 2'aux15_1 + aux15_0 + 2'out6_7 + aux15_5 + aux15_4 + aux15_3 + -1'aux13_0 + aux15_7 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + out4_1 + out4_7 + out4_3 + out4_2 + -1'out1_6 + out1_1 + out2_7 + out2_3 + out2_1 + out2_2 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -1'aux7_6 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + aux9_1 + aux9_2 + aux9_3 + 2'c15 + 2'c14 + -2'c7 + -1'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 10
invariant :in3_5 + in3_4 + -1'in1_1 + -1'in1_0 = 0
invariant :aux16_5 + aux14_5 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_4 + -1'out7_7 + -1'out7_6 + out8_1 + out8_0 + out8_3 + out8_2 + out8_6 + out8_7 + out8_4 + 2'out8_5 + out5_5 + out6_5 + aux15_5 + aux13_5 + out3_5 + -1'out1_0 + out4_5 + -1'out1_6 + out2_0 + -1'out1_7 + -1'out1_2 + -1'out1_1 + -1'out1_4 + -1'out1_3 + out2_7 + 2'out2_5 + out2_6 + out2_3 + out2_4 + out2_1 + out2_2 + aux6_5 + aux12_5 + aux11_5 + aux5_5 + aux9_5 + aux10_5 + -1'in3_4 + in1_1 + in1_0 = 5
FORMULA PermAdmissibility-PT-05-ReachabilityCardinality-07 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 20122 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 98 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
255
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 2:35:33 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 2:35:33 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 2:35:33 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 108 ms
May 25, 2018 2:35:33 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 168 places.
May 25, 2018 2:35:33 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 592 transitions.
May 25, 2018 2:35:33 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 38 ms
May 25, 2018 2:35:34 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 268 ms
May 25, 2018 2:35:34 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 335 ms
May 25, 2018 2:35:34 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 284 ms
May 25, 2018 2:35:34 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 10 ms
May 25, 2018 2:35:34 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 25, 2018 2:35:35 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 592 transitions.
May 25, 2018 2:35:35 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 592 transitions.
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 32 place invariants in 166 ms
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1943 ms.
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-00(UNSAT) depth K=0 took 18 ms
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-01(UNSAT) depth K=0 took 7 ms
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-02(UNSAT) depth K=0 took 4 ms
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-03(UNSAT) depth K=0 took 9 ms
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-04(UNSAT) depth K=0 took 10 ms
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-05(UNSAT) depth K=0 took 12 ms
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-06(UNSAT) depth K=0 took 26 ms
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-07(UNSAT) depth K=0 took 68 ms
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-08(UNSAT) depth K=0 took 32 ms
May 25, 2018 2:35:36 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 592 transitions.
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-09(UNSAT) depth K=0 took 126 ms
May 25, 2018 2:35:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-10(UNSAT) depth K=0 took 125 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 32 place invariants in 81 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-11(UNSAT) depth K=0 took 76 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-12(UNSAT) depth K=0 took 17 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-13(UNSAT) depth K=0 took 33 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-14(UNSAT) depth K=0 took 93 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-15(UNSAT) depth K=0 took 36 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-00(UNSAT) depth K=1 took 28 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-01(UNSAT) depth K=1 took 15 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-02(UNSAT) depth K=1 took 15 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-03(UNSAT) depth K=1 took 16 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-04(UNSAT) depth K=1 took 32 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-05(UNSAT) depth K=1 took 2 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-06(UNSAT) depth K=1 took 18 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-07(UNSAT) depth K=1 took 21 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-08(UNSAT) depth K=1 took 8 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-09(UNSAT) depth K=1 took 25 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-10(UNSAT) depth K=1 took 29 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-11(UNSAT) depth K=1 took 5 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-12(UNSAT) depth K=1 took 1 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-13(UNSAT) depth K=1 took 23 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-14(UNSAT) depth K=1 took 2 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-15(UNSAT) depth K=1 took 17 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-00(UNSAT) depth K=2 took 101 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-01(UNSAT) depth K=2 took 183 ms
May 25, 2018 2:35:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-02(UNSAT) depth K=2 took 109 ms
May 25, 2018 2:35:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-03(UNSAT) depth K=2 took 175 ms
May 25, 2018 2:35:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-04(UNSAT) depth K=2 took 312 ms
May 25, 2018 2:35:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-05(UNSAT) depth K=2 took 270 ms
May 25, 2018 2:35:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-06(UNSAT) depth K=2 took 213 ms
May 25, 2018 2:35:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-07(UNSAT) depth K=2 took 371 ms
May 25, 2018 2:35:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-08(UNSAT) depth K=2 took 156 ms
May 25, 2018 2:35:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-09(UNSAT) depth K=2 took 126 ms
May 25, 2018 2:35:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-10(UNSAT) depth K=2 took 116 ms
May 25, 2018 2:35:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-11(UNSAT) depth K=2 took 257 ms
May 25, 2018 2:35:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-12(UNSAT) depth K=2 took 182 ms
May 25, 2018 2:35:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-13(UNSAT) depth K=2 took 191 ms
May 25, 2018 2:35:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-14(UNSAT) depth K=2 took 274 ms
May 25, 2018 2:35:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-15(UNSAT) depth K=2 took 213 ms
May 25, 2018 2:35:42 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 168 variables to be positive in 5172 ms
May 25, 2018 2:35:42 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 168 variables to be positive in 6052 ms
May 25, 2018 2:35:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 592 transitions.
May 25, 2018 2:35:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/592 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 2:35:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 195 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 2:35:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 592 transitions.
May 25, 2018 2:35:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 35 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 2:35:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-00(UNSAT) depth K=3 took 12540 ms
May 25, 2018 2:35:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-01(UNSAT) depth K=3 took 993 ms
May 25, 2018 2:36:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-02(UNSAT) depth K=3 took 7613 ms
May 25, 2018 2:36:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-03(UNSAT) depth K=3 took 814 ms
May 25, 2018 2:36:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-00
May 25, 2018 2:36:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-00(SAT) depth K=0 took 27045 ms
May 25, 2018 2:36:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-01
May 25, 2018 2:36:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-01(SAT) depth K=0 took 3964 ms
May 25, 2018 2:36:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-02
May 25, 2018 2:36:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-02(SAT) depth K=0 took 5502 ms
May 25, 2018 2:36:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-03
May 25, 2018 2:36:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-03(SAT) depth K=0 took 9361 ms
May 25, 2018 2:36:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-04(UNSAT) depth K=3 took 27373 ms
May 25, 2018 2:36:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-04
May 25, 2018 2:36:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-04(SAT) depth K=0 took 3231 ms
May 25, 2018 2:36:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-05(UNSAT) depth K=3 took 2261 ms
May 25, 2018 2:36:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-05
May 25, 2018 2:36:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-05(SAT) depth K=0 took 2312 ms
May 25, 2018 2:36:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-06(UNSAT) depth K=3 took 12247 ms
May 25, 2018 2:36:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-06
May 25, 2018 2:36:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-06(SAT) depth K=0 took 13012 ms
May 25, 2018 2:36:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant PermAdmissibility-PT-05-ReachabilityCardinality-07
May 25, 2018 2:36:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for PermAdmissibility-PT-05-ReachabilityCardinality-07
May 25, 2018 2:36:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-07(TRUE) depth K=0 took 4315 ms
May 25, 2018 2:36:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-07(UNSAT) depth K=3 took 12883 ms
May 25, 2018 2:37:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-08(UNSAT) depth K=3 took 9202 ms
May 25, 2018 2:37:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-09(UNSAT) depth K=3 took 849 ms
May 25, 2018 2:37:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-08
May 25, 2018 2:37:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-08(SAT) depth K=0 took 20680 ms
May 25, 2018 2:37:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-10(UNSAT) depth K=3 took 4396 ms
May 25, 2018 2:37:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-11(UNSAT) depth K=3 took 1204 ms
May 25, 2018 2:37:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-12(UNSAT) depth K=3 took 1353 ms
May 25, 2018 2:37:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-13(UNSAT) depth K=3 took 366 ms
May 25, 2018 2:37:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-14(UNSAT) depth K=3 took 278 ms
May 25, 2018 2:37:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-15(UNSAT) depth K=3 took 4716 ms
May 25, 2018 2:37:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-09
May 25, 2018 2:37:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-09(SAT) depth K=0 took 12810 ms
May 25, 2018 2:37:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-10
May 25, 2018 2:37:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-10(SAT) depth K=0 took 2601 ms
May 25, 2018 2:37:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-11
May 25, 2018 2:37:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-11(SAT) depth K=0 took 2197 ms
May 25, 2018 2:37:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 592 transitions.
May 25, 2018 2:37:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-12
May 25, 2018 2:37:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-12(SAT) depth K=0 took 5738 ms
May 25, 2018 2:37:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-13
May 25, 2018 2:37:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-13(SAT) depth K=0 took 1853 ms
May 25, 2018 2:37:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/592) took 12079 ms. Total solver calls (SAT/UNSAT): 523(523/0)
May 25, 2018 2:37:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1/592) took 19521 ms. Total solver calls (SAT/UNSAT): 885(885/0)
May 25, 2018 2:38:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-14
May 25, 2018 2:38:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-14(SAT) depth K=0 took 24454 ms
May 25, 2018 2:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-15
May 25, 2018 2:38:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-15(SAT) depth K=0 took 2685 ms
May 25, 2018 2:38:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/592) took 31498 ms. Total solver calls (SAT/UNSAT): 1414(1414/0)
May 25, 2018 2:38:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/592) took 38652 ms. Total solver calls (SAT/UNSAT): 1799(1799/0)
May 25, 2018 2:38:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-00(UNSAT) depth K=4 took 55821 ms
May 25, 2018 2:38:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-00
May 25, 2018 2:38:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-00(SAT) depth K=1 took 12223 ms
SMT solver raised 'unknown', retrying with same input.
May 25, 2018 2:38:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-01
May 25, 2018 2:38:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-01(SAT) depth K=1 took 2543 ms
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
May 25, 2018 2:38:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/592) took 78394 ms. Total solver calls (SAT/UNSAT): 2306(2306/0)
May 25, 2018 2:38:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 78573 ms. Total solver calls (SAT/UNSAT): 2306(2306/0)
May 25, 2018 2:38:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 592 transitions.
May 25, 2018 2:38:54 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:38:56 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:38:57 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:38:57 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:38:58 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:38:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-02
May 25, 2018 2:38:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-02(SAT) depth K=1 took 39589 ms
May 25, 2018 2:38:58 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:38:58 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:38:59 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:38:59 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:38:59 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:39:01 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:39:02 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:39:02 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:39:03 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:39:04 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:39:05 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:39:05 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:39:06 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:39:06 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 2:39:08 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:628)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 2:39:08 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 214377ms conformant to PINS in folder :/home/mcc/execution
May 25, 2018 2:39:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-03
May 25, 2018 2:39:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-03(SAT) depth K=1 took 12571 ms
May 25, 2018 2:39:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-01(UNSAT) depth K=4 took 99534 ms
May 25, 2018 2:40:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-04
May 25, 2018 2:40:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-04(SAT) depth K=1 took 65663 ms
May 25, 2018 2:40:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-05
May 25, 2018 2:40:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-05(SAT) depth K=1 took 14726 ms
May 25, 2018 2:40:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-06
May 25, 2018 2:40:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-06(SAT) depth K=1 took 15957 ms
May 25, 2018 2:41:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-02(UNSAT) depth K=4 took 65412 ms
May 25, 2018 2:42:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-03(UNSAT) depth K=4 took 90917 ms
May 25, 2018 2:42:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-04(UNSAT) depth K=4 took 25059 ms
May 25, 2018 2:43:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-05(UNSAT) depth K=4 took 34354 ms
May 25, 2018 2:44:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-06(UNSAT) depth K=4 took 36912 ms
May 25, 2018 2:46:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-08(UNSAT) depth K=4 took 131527 ms
May 25, 2018 2:47:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-09(UNSAT) depth K=4 took 44899 ms
May 25, 2018 2:47:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-10(UNSAT) depth K=4 took 32049 ms
May 25, 2018 2:48:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-11(UNSAT) depth K=4 took 32781 ms
May 25, 2018 2:49:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-12(UNSAT) depth K=4 took 53065 ms
May 25, 2018 2:49:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-13(UNSAT) depth K=4 took 14447 ms
May 25, 2018 2:50:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-14(UNSAT) depth K=4 took 69667 ms
May 25, 2018 2:51:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-15(UNSAT) depth K=4 took 37855 ms
May 25, 2018 2:54:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-00(UNSAT) depth K=5 took 219390 ms
May 25, 2018 2:57:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-01(UNSAT) depth K=5 took 144806 ms
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityPT05ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 3:02:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-02(UNSAT) depth K=5 took 293874 ms
May 25, 2018 3:05:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-03(UNSAT) depth K=5 took 205312 ms
ITS-tools command line returned an error code 137
May 25, 2018 3:07:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-04(UNSAT) depth K=5 took 115852 ms
May 25, 2018 3:08:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-05(UNSAT) depth K=5 took 87788 ms
May 25, 2018 3:10:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-06(UNSAT) depth K=5 took 97776 ms
May 25, 2018 3:11:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-08(UNSAT) depth K=5 took 54101 ms
May 25, 2018 3:12:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-09(UNSAT) depth K=5 took 48888 ms
May 25, 2018 3:13:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-10(UNSAT) depth K=5 took 87218 ms
May 25, 2018 3:14:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-11(UNSAT) depth K=5 took 64797 ms
May 25, 2018 3:15:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-12(UNSAT) depth K=5 took 32829 ms
May 25, 2018 3:15:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-08
May 25, 2018 3:15:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-08(SAT) depth K=1 took 2107439 ms
May 25, 2018 3:15:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-13(UNSAT) depth K=5 took 39764 ms
May 25, 2018 3:17:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-14(UNSAT) depth K=5 took 89076 ms
May 25, 2018 3:18:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-15(UNSAT) depth K=5 took 76522 ms
May 25, 2018 3:19:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-09
May 25, 2018 3:19:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-09(SAT) depth K=1 took 211469 ms
May 25, 2018 3:20:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-10
May 25, 2018 3:20:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-10(SAT) depth K=1 took 37581 ms
May 25, 2018 3:20:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-11
May 25, 2018 3:20:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-11(SAT) depth K=1 took 2596 ms
May 25, 2018 3:20:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-12
May 25, 2018 3:20:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-12(SAT) depth K=1 took 1720 ms
May 25, 2018 3:20:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-13
May 25, 2018 3:20:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-13(SAT) depth K=1 took 28312 ms
May 25, 2018 3:20:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-14
May 25, 2018 3:20:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-14(SAT) depth K=1 took 4766 ms
May 25, 2018 3:20:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-15
May 25, 2018 3:20:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-15(SAT) depth K=1 took 18609 ms
May 25, 2018 3:22:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-00(UNSAT) depth K=6 took 256032 ms
May 25, 2018 3:26:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-00
May 25, 2018 3:26:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-00(SAT) depth K=2 took 334917 ms
May 25, 2018 3:26:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-01
May 25, 2018 3:26:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-01(SAT) depth K=2 took 6870 ms
May 25, 2018 3:26:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-01(UNSAT) depth K=6 took 223199 ms
May 25, 2018 3:28:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-02
May 25, 2018 3:28:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-02(SAT) depth K=2 took 133839 ms
May 25, 2018 3:30:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-02(UNSAT) depth K=6 took 200514 ms
May 25, 2018 3:31:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-05-ReachabilityCardinality-03
May 25, 2018 3:31:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-05-ReachabilityCardinality-03(SAT) depth K=2 took 155140 ms
May 25, 2018 3:33:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-05-ReachabilityCardinality-03(UNSAT) depth K=6 took 210311 ms
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-05.tgz
mv PermAdmissibility-PT-05 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is PermAdmissibility-PT-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r117-csrt-152666477000488"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;