Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..........................................................................................................................................
/home/mcc/execution
total 224K
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.8K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 54K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is PermAdmissibility-COL-05, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r117-csrt-152666477000447
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527256020539

13:47:02.946 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
13:47:02.948 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Flatten gal took : 749 ms
Constant places removed 88 places and 240 transitions.
Iterating post reduction 0 with 88 rules applied. Total rules applied 88 place count 120 transition count 784
Constant places removed 16 places and 192 transitions.
Iterating post reduction 1 with 16 rules applied. Total rules applied 104 place count 104 transition count 592
Symmetric choice reduction at 2 with 28 rule applications. Total rules 132 place count 104 transition count 592
Constant places removed 28 places and 252 transitions.
Iterating post reduction 2 with 28 rules applied. Total rules applied 160 place count 76 transition count 340
Applied a total of 160 rules in 41 ms. Remains 76 /208 variables (removed 132) and now considering 340/1024 (removed 684) transitions.
// Phase 1: matrix 340 rows 76 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 340 rows 76 cols
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 200 ordering constraints for composite.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 7807 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 190 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
255
sparsehash FATAL ERROR: failed to allocate 45 groups

BK_STOP 1527257071280

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 1:47:02 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 1:47:02 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 1:47:02 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 25, 2018 1:47:03 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 908 ms
May 25, 2018 1:47:03 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 40 places.
May 25, 2018 1:47:03 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 25, 2018 1:47:03 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :input->aux9,aux10,aux11,aux12,in1,in3,in2,in4,aux8,aux6,aux7,aux5,aux16,aux13,aux15,aux14,out1,out5,out4,out3,out2,out8,out7,out6,
Dot->c16,c15,c14,c13,c6,c5,c8,c7,c9,c12,c110,c11,c17,c20,c18,c19,

May 25, 2018 1:47:03 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 16 transitions.
May 25, 2018 1:47:03 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 25, 2018 1:47:03 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
May 25, 2018 1:47:03 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 256 ms
May 25, 2018 1:47:04 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 22 ms
May 25, 2018 1:47:04 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
May 25, 2018 1:47:04 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 14 ms.
May 25, 2018 1:47:04 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 25, 2018 1:47:04 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 70 ms
May 25, 2018 1:47:04 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 87 ms
May 25, 2018 1:47:04 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 25, 2018 1:47:05 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 340 transitions.
May 25, 2018 1:47:05 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 167 ms
May 25, 2018 1:47:05 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 25, 2018 1:47:05 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 5 ms
May 25, 2018 1:47:05 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1376 redundant transitions.
May 25, 2018 1:47:05 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 21 ms
May 25, 2018 1:47:06 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 76 variables to be positive in 1687 ms
May 25, 2018 1:47:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 340 transitions.
May 25, 2018 1:47:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/340 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 1:47:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 64 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 1:47:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 340 transitions.
May 25, 2018 1:47:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 46 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 1:47:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 340 transitions.
May 25, 2018 1:47:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/340) took 4042 ms. Total solver calls (SAT/UNSAT): 231(231/0)
May 25, 2018 1:47:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/340) took 8697 ms. Total solver calls (SAT/UNSAT): 596(596/0)
May 25, 2018 1:47:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/340) took 11873 ms. Total solver calls (SAT/UNSAT): 870(870/0)
May 25, 2018 1:47:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/340) took 16699 ms. Total solver calls (SAT/UNSAT): 1128(1128/0)
May 25, 2018 1:47:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/340) took 19737 ms. Total solver calls (SAT/UNSAT): 1251(1251/0)
May 25, 2018 1:47:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/340) took 23610 ms. Total solver calls (SAT/UNSAT): 1428(1428/0)
May 25, 2018 1:47:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/340) took 27502 ms. Total solver calls (SAT/UNSAT): 1856(1856/0)
May 25, 2018 1:47:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/340) took 30748 ms. Total solver calls (SAT/UNSAT): 2135(2135/0)
May 25, 2018 1:47:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/340) took 34542 ms. Total solver calls (SAT/UNSAT): 2378(2378/0)
May 25, 2018 1:47:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/340) took 37567 ms. Total solver calls (SAT/UNSAT): 2585(2585/0)
May 25, 2018 1:47:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/340) took 40807 ms. Total solver calls (SAT/UNSAT): 2928(2928/0)
May 25, 2018 1:47:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/340) took 44309 ms. Total solver calls (SAT/UNSAT): 3339(3339/0)
May 25, 2018 1:47:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/340) took 48414 ms. Total solver calls (SAT/UNSAT): 3452(3452/0)
May 25, 2018 1:47:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/340) took 52670 ms. Total solver calls (SAT/UNSAT): 3767(3767/0)
May 25, 2018 1:48:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/340) took 56302 ms. Total solver calls (SAT/UNSAT): 4002(4002/0)
May 25, 2018 1:48:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/340) took 59306 ms. Total solver calls (SAT/UNSAT): 4397(4397/0)
May 25, 2018 1:48:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/340) took 62706 ms. Total solver calls (SAT/UNSAT): 4667(4667/0)
May 25, 2018 1:48:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(107/340) took 65818 ms. Total solver calls (SAT/UNSAT): 4802(4802/0)
May 25, 2018 1:48:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/340) took 68982 ms. Total solver calls (SAT/UNSAT): 4964(4964/0)
May 25, 2018 1:48:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/340) took 72043 ms. Total solver calls (SAT/UNSAT): 5372(5372/0)
May 25, 2018 1:48:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(140/340) took 76396 ms. Total solver calls (SAT/UNSAT): 5928(5928/0)
May 25, 2018 1:48:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(142/340) took 79838 ms. Total solver calls (SAT/UNSAT): 6057(6057/0)
May 25, 2018 1:48:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(146/340) took 84239 ms. Total solver calls (SAT/UNSAT): 6303(6303/0)
May 25, 2018 1:48:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(148/340) took 88119 ms. Total solver calls (SAT/UNSAT): 6420(6420/0)
May 25, 2018 1:48:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(151/340) took 91634 ms. Total solver calls (SAT/UNSAT): 6588(6588/0)
May 25, 2018 1:48:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(154/340) took 95222 ms. Total solver calls (SAT/UNSAT): 6747(6747/0)
May 25, 2018 1:48:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(157/340) took 98378 ms. Total solver calls (SAT/UNSAT): 6897(6897/0)
May 25, 2018 1:48:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(159/340) took 101801 ms. Total solver calls (SAT/UNSAT): 6992(6992/0)
May 25, 2018 1:48:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(167/340) took 104863 ms. Total solver calls (SAT/UNSAT): 7332(7332/0)
May 25, 2018 1:48:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(175/340) took 108140 ms. Total solver calls (SAT/UNSAT): 7608(7608/0)
May 25, 2018 1:48:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(182/340) took 111905 ms. Total solver calls (SAT/UNSAT): 7797(7797/0)
May 25, 2018 1:49:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(193/340) took 115428 ms. Total solver calls (SAT/UNSAT): 8093(8093/0)
May 25, 2018 1:49:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(200/340) took 119378 ms. Total solver calls (SAT/UNSAT): 8499(8499/0)
May 25, 2018 1:49:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(202/340) took 122813 ms. Total solver calls (SAT/UNSAT): 8606(8606/0)
May 25, 2018 1:49:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(204/340) took 126168 ms. Total solver calls (SAT/UNSAT): 8709(8709/0)
May 25, 2018 1:49:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(209/340) took 129440 ms. Total solver calls (SAT/UNSAT): 8949(8949/0)
May 25, 2018 1:49:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(212/340) took 133020 ms. Total solver calls (SAT/UNSAT): 9081(9081/0)
May 25, 2018 1:49:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(215/340) took 136098 ms. Total solver calls (SAT/UNSAT): 9204(9204/0)
May 25, 2018 1:49:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(219/340) took 139431 ms. Total solver calls (SAT/UNSAT): 9354(9354/0)
May 25, 2018 1:49:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(228/340) took 142796 ms. Total solver calls (SAT/UNSAT): 9633(9633/0)
May 25, 2018 1:49:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(234/340) took 146152 ms. Total solver calls (SAT/UNSAT): 9774(9774/0)
May 25, 2018 1:49:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(251/340) took 149258 ms. Total solver calls (SAT/UNSAT): 9978(9978/0)
May 25, 2018 1:49:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(274/340) took 152338 ms. Total solver calls (SAT/UNSAT): 10095(10095/0)
May 25, 2018 1:49:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(291/340) took 156014 ms. Total solver calls (SAT/UNSAT): 10346(10346/0)
May 25, 2018 1:49:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(323/340) took 159131 ms. Total solver calls (SAT/UNSAT): 10670(10670/0)
May 25, 2018 1:49:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 160961 ms. Total solver calls (SAT/UNSAT): 10738(10738/0)
May 25, 2018 1:49:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 340 transitions.
May 25, 2018 2:01:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 679425 ms. Total solver calls (SAT/UNSAT): 14905(0/14905)
May 25, 2018 2:01:07 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 842687ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-05"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-05.tgz
mv PermAdmissibility-COL-05 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is PermAdmissibility-COL-05, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r117-csrt-152666477000447"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;