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Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r117-csrt-152666477000446
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for PermAdmissibility-COL-05

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15742.010 3600000.00 11858622.00 1415.90 ???????T???F?FF? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 224K
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.8K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 54K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is PermAdmissibility-COL-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r117-csrt-152666477000446
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-00
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-01
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-02
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-03
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-04
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-05
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-06
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-07
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-08
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-09
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-10
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-11
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-12
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-13
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-14
FORMULA_NAME PermAdmissibility-COL-05-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527255997053

13:46:39.382 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
13:46:39.385 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : PermAdmissibility-COL-05-ReachabilityCardinality-00 with value :((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)>=3)
Read [invariant] property : PermAdmissibility-COL-05-ReachabilityCardinality-01 with value :((((((((out7_0+out7_1)+out7_2)+out7_3)+out7_4)+out7_5)+out7_6)+out7_7)<=c17_0)
Read [reachable] property : PermAdmissibility-COL-05-ReachabilityCardinality-02 with value :((((((((aux10_0+aux10_1)+aux10_2)+aux10_3)+aux10_4)+aux10_5)+aux10_6)+aux10_7)>=3)
Read [reachable] property : PermAdmissibility-COL-05-ReachabilityCardinality-03 with value :(((!((((((((aux10_0+aux10_1)+aux10_2)+aux10_3)+aux10_4)+aux10_5)+aux10_6)+aux10_7)<=(((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7)))&&((((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)>=3))&&(!(c9_0>=1)))
Read [reachable] property : PermAdmissibility-COL-05-ReachabilityCardinality-04 with value :((((c12_0<=c16_0)||((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)>=3))&&((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)>=1))&&(c13_0<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)))
Read [reachable] property : PermAdmissibility-COL-05-ReachabilityCardinality-05 with value :((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)>=2)
Read [reachable] property : PermAdmissibility-COL-05-ReachabilityCardinality-06 with value :((((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)>=2)||(c9_0<=(((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)))&&((((((((((aux12_0+aux12_1)+aux12_2)+aux12_3)+aux12_4)+aux12_5)+aux12_6)+aux12_7)>=3)||(c14_0>=2))||(((((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)>=2)||(c12_0>=3))))
Read [invariant] property : PermAdmissibility-COL-05-ReachabilityCardinality-07 with value :((((c16_0>=1)||((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)<=(((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)))||(((((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)>=3)&&(c17_0<=c16_0)))||((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)>=2))
Read [reachable] property : PermAdmissibility-COL-05-ReachabilityCardinality-08 with value :(c20_0>=1)
Read [reachable] property : PermAdmissibility-COL-05-ReachabilityCardinality-09 with value :((!(((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)<=(((((((aux6_0+aux6_1)+aux6_2)+aux6_3)+aux6_4)+aux6_5)+aux6_6)+aux6_7))||(c13_0>=3)))&&((((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)>=2)||((((((((out5_0+out5_1)+out5_2)+out5_3)+out5_4)+out5_5)+out5_6)+out5_7)<=c8_0))&&((c20_0<=c14_0)||((((((((out7_0+out7_1)+out7_2)+out7_3)+out7_4)+out7_5)+out7_6)+out7_7)<=c18_0))))
Read [reachable] property : PermAdmissibility-COL-05-ReachabilityCardinality-10 with value :((((c14_0<=(((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7))||((((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7)>=1))||(!(c110_0<=c19_0)))&&(!(((((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7)<=(((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7))||(c9_0>=1))))
Read [invariant] property : PermAdmissibility-COL-05-ReachabilityCardinality-11 with value :((c6_0>=2)||((((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7)<=(((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)))
Read [reachable] property : PermAdmissibility-COL-05-ReachabilityCardinality-12 with value :((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)>=3)
Read [invariant] property : PermAdmissibility-COL-05-ReachabilityCardinality-13 with value :(!(((c17_0>=2)&&(c20_0>=1))||(!(c11_0<=(((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)))))
Read [invariant] property : PermAdmissibility-COL-05-ReachabilityCardinality-14 with value :((c14_0>=1)||((!(c16_0<=(((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)))||(((((((((aux10_0+aux10_1)+aux10_2)+aux10_3)+aux10_4)+aux10_5)+aux10_6)+aux10_7)>=3)||(c13_0<=c9_0))))
Read [reachable] property : PermAdmissibility-COL-05-ReachabilityCardinality-15 with value :((!((c16_0>=2)&&((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)<=c19_0)))&&(!(((((((((out5_0+out5_1)+out5_2)+out5_3)+out5_4)+out5_5)+out5_6)+out5_7)>=2)||(c18_0<=c8_0))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1024 rows 208 cols
invariant :c20_0 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :out5_0 + out5_1 + out5_2 + out5_3 + out5_4 + out5_5 + out5_6 + out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + -1'in4_2 + -1'aux8_2 + -1'aux6_2 + -1'aux7_2 + -1'aux5_2 + 2'c110_0 + 2'c11_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -5
invariant :c18_0 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + -1'in4_2 + aux8_0 + aux8_1 + aux8_3 + aux8_4 + aux8_5 + aux8_6 + aux8_7 + -1'aux6_2 + -1'aux7_2 + -2'c9_0 + -1'aux5_2 + -1'c12_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -5
invariant :aux9_1 + aux10_1 + aux11_1 + aux12_1 + in1_1 + in3_1 + in2_1 + in4_1 + aux8_1 + aux6_1 + aux7_1 + aux5_1 + aux16_1 + aux13_1 + aux15_1 + aux14_1 + -1'out1_0 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + out5_1 + out4_1 + out3_1 + out2_0 + 2'out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out8_1 + out7_1 + out6_1 = 5
invariant :4'c16_0 + 4'c13_0 + 2'aux9_2 + 2'aux10_2 + -2'aux11_0 + -2'aux11_1 + -2'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_2 + 2'in1_2 + 2'in3_2 + 2'in2_2 + 2'in4_2 + 2'aux8_2 + 2'aux6_2 + 2'aux7_2 + 2'aux5_2 + 4'c12_0 + 2'aux16_2 + aux13_0 + aux13_1 + 3'aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + 4'c17_0 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out1_2 + 2'out5_2 + -2'out4_0 + -2'out4_1 + -2'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -2'out4_7 + out3_0 + out3_1 + 3'out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + 3'out2_0 + 3'out2_1 + 5'out2_2 + 3'out2_3 + 3'out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + 2'out8_2 + -1'out7_0 + -1'out7_1 + out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 10
invariant :-10'c16_0 + aux9_0 + aux9_1 + -2'aux9_2 + 3'aux9_3 + 3'aux9_4 + aux9_5 + aux9_6 + 3'aux9_7 + -2'aux10_0 + -2'aux10_1 + -5'aux10_2 + -2'aux10_5 + -2'aux10_6 + 3'aux11_0 + 3'aux11_1 + 5'aux11_3 + 5'aux11_4 + 3'aux11_5 + 3'aux11_6 + 5'aux11_7 + -2'aux12_0 + -2'aux12_1 + -5'aux12_2 + -2'aux12_5 + -2'aux12_6 + -3'in1_2 + 2'in1_3 + 2'in1_4 + 2'in1_7 + -4'c7_0 + -4'in3_0 + -4'in3_1 + -7'in3_2 + -2'in3_3 + -2'in3_4 + -4'in3_5 + -4'in3_6 + -2'in3_7 + -3'in2_2 + 2'in2_3 + 2'in2_4 + 2'in2_7 + 4'in4_0 + 4'in4_1 + in4_2 + 6'in4_3 + 6'in4_4 + 4'in4_5 + 4'in4_6 + 6'in4_7 + -3'aux8_2 + 2'aux8_3 + 2'aux8_4 + 2'aux8_7 + -3'aux6_2 + 2'aux6_3 + 2'aux6_4 + 2'aux6_7 + -3'aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_7 + 4'c9_0 + -2'aux5_0 + -2'aux5_1 + -5'aux5_2 + -2'aux5_5 + -2'aux5_6 + -4'c12_0 + 2'c11_0 + -3'aux16_2 + 2'aux16_3 + 2'aux16_4 + 2'aux16_7 + 2'aux13_0 + 2'aux13_1 + -1'aux13_2 + 4'aux13_3 + 4'aux13_4 + 2'aux13_5 + 2'aux13_6 + 4'aux13_7 + -14'c17_0 + 3'aux15_0 + 3'aux15_1 + 5'aux15_3 + 5'aux15_4 + 3'aux15_5 + 3'aux15_6 + 5'aux15_7 + 2'aux14_0 + 2'aux14_1 + -1'aux14_2 + 4'aux14_3 + 4'aux14_4 + 2'aux14_5 + 2'aux14_6 + 4'aux14_7 + -3'out1_2 + 2'out1_3 + 2'out1_4 + 2'out1_7 + -2'out5_0 + -2'out5_1 + -5'out5_2 + -2'out5_5 + -2'out5_6 + 3'out4_0 + 3'out4_1 + 5'out4_3 + 5'out4_4 + 3'out4_5 + 3'out4_6 + 5'out4_7 + 2'out3_0 + 2'out3_1 + -1'out3_2 + 4'out3_3 + 4'out3_4 + 2'out3_5 + 2'out3_6 + 4'out3_7 + -9'out2_0 + -9'out2_1 + -12'out2_2 + -7'out2_3 + -7'out2_4 + -9'out2_5 + -9'out2_6 + -7'out2_7 + -2'out8_0 + -2'out8_1 + -5'out8_2 + -2'out8_5 + -2'out8_6 + 4'out7_0 + 4'out7_1 + out7_2 + 6'out7_3 + 6'out7_4 + 4'out7_5 + 4'out7_6 + 6'out7_7 + 4'out6_0 + 4'out6_1 + out6_2 + 6'out6_3 + 6'out6_4 + 4'out6_5 + 4'out6_6 + 6'out6_7 = 15
invariant :2'c16_0 + 2'aux9_0 + aux9_1 + 2'aux9_2 + aux9_3 + aux9_4 + aux9_5 + aux9_6 + aux9_7 + aux10_0 + aux10_2 + -1'aux11_1 + -1'aux11_3 + -1'aux11_4 + -1'aux11_5 + -1'aux11_6 + -1'aux11_7 + aux12_0 + aux12_2 + in1_0 + in1_2 + in3_0 + in3_2 + in2_0 + in2_2 + in4_0 + in4_2 + -1'aux8_1 + -1'aux8_3 + -1'aux8_4 + -1'aux8_5 + -1'aux8_6 + -1'aux8_7 + aux6_0 + aux6_2 + aux7_0 + aux7_2 + 2'c9_0 + aux5_0 + aux5_2 + c12_0 + -1'aux16_1 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 + aux13_0 + aux13_2 + 4'c17_0 + -1'aux15_1 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_0 + aux14_2 + out1_0 + out1_2 + out5_0 + out5_2 + -1'out4_1 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_0 + out3_2 + 4'out2_0 + 3'out2_1 + 4'out2_2 + 3'out2_3 + 3'out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + out8_0 + out8_2 + -1'out7_1 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_1 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 10
invariant :-2'aux9_0 + -2'aux9_1 + -2'aux9_2 + -2'aux9_3 + -2'aux9_4 + -2'aux9_5 + -2'aux9_6 + -2'aux9_7 + 2'c6_0 + 4'c7_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -4'in4_0 + -4'in4_1 + -4'in4_2 + -4'in4_3 + -4'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -4'c9_0 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = -20
invariant :-2'c16_0 + -2'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_0 + -1'aux10_2 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_0 + -1'aux12_2 + -1'in1_0 + -1'in1_2 + -1'in3_0 + -1'in3_2 + in2_1 + in2_3 + in2_4 + in2_5 + in2_6 + in2_7 + -2'in4_0 + -1'in4_1 + -2'in4_2 + -1'in4_3 + -1'in4_4 + -1'in4_5 + -1'in4_6 + -1'in4_7 + aux8_1 + aux8_3 + aux8_4 + aux8_5 + aux8_6 + aux8_7 + -1'aux6_0 + -1'aux6_2 + -1'aux7_0 + -1'aux7_2 + -2'c9_0 + -1'aux5_0 + -1'aux5_2 + -1'c12_0 + aux16_1 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -1'aux13_0 + -1'aux13_2 + -4'c17_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_0 + -1'aux14_2 + -1'out1_0 + -1'out1_2 + -1'out5_0 + -1'out5_2 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_0 + -1'out3_2 + -4'out2_0 + -3'out2_1 + -4'out2_2 + -3'out2_3 + -3'out2_4 + -3'out2_5 + -3'out2_6 + -3'out2_7 + -1'out8_0 + -1'out8_2 + out7_1 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_1 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = -10
invariant :-2'c16_0 + 3'aux9_0 + 3'aux9_1 + 2'aux9_2 + 3'aux9_3 + 3'aux9_4 + 3'aux9_5 + 3'aux9_6 + 3'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + 4'in4_0 + 4'in4_1 + 3'in4_2 + 4'in4_3 + 4'in4_4 + 4'in4_5 + 4'in4_6 + 4'in4_7 + -1'aux8_2 + -1'aux6_2 + 2'aux7_0 + 2'aux7_1 + aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_5 + 2'aux7_6 + 2'aux7_7 + 4'c9_0 + -1'aux5_2 + 2'c11_0 + -1'aux16_2 + 2'aux13_0 + 2'aux13_1 + aux13_2 + 2'aux13_3 + 2'aux13_4 + 2'aux13_5 + 2'aux13_6 + 2'aux13_7 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + 2'aux14_0 + 2'aux14_1 + aux14_2 + 2'aux14_3 + 2'aux14_4 + 2'aux14_5 + 2'aux14_6 + 2'aux14_7 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + 2'out3_0 + 2'out3_1 + out3_2 + 2'out3_3 + 2'out3_4 + 2'out3_5 + 2'out3_6 + 2'out3_7 + out2_0 + out2_1 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out8_2 + 2'out7_0 + 2'out7_1 + out7_2 + 2'out7_3 + 2'out7_4 + 2'out7_5 + 2'out7_6 + 2'out7_7 + 2'out6_0 + 2'out6_1 + out6_2 + 2'out6_3 + 2'out6_4 + 2'out6_5 + 2'out6_6 + 2'out6_7 = 35
invariant :aux9_3 + aux10_3 + aux11_3 + aux12_3 + in1_3 + in3_3 + in2_3 + in4_3 + aux8_3 + aux6_3 + aux7_3 + aux5_3 + aux16_3 + aux13_3 + aux15_3 + aux14_3 + out1_3 + out5_3 + out4_3 + out3_3 + out2_3 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 + out7_0 + out7_1 + out7_2 + 2'out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_3 = 5
invariant :6'c16_0 + aux9_0 + -1'aux9_1 + 2'aux9_2 + -1'aux9_3 + -1'aux9_4 + aux9_5 + aux9_6 + -1'aux9_7 + 2'aux10_0 + 3'aux10_2 + 2'aux10_5 + 2'aux10_6 + -1'aux11_0 + -3'aux11_1 + -3'aux11_3 + -3'aux11_4 + -1'aux11_5 + -1'aux11_6 + -3'aux11_7 + 2'aux12_0 + 3'aux12_2 + 2'aux12_5 + 2'aux12_6 + -2'in1_1 + in1_2 + -2'in1_3 + -2'in1_4 + -2'in1_7 + 4'in3_0 + 2'in3_1 + 5'in3_2 + 2'in3_3 + 2'in3_4 + 4'in3_5 + 4'in3_6 + 2'in3_7 + -2'in2_1 + in2_2 + -2'in2_3 + -2'in2_4 + -2'in2_7 + -2'in4_1 + in4_2 + -2'in4_3 + -2'in4_4 + -2'in4_7 + -2'aux8_1 + aux8_2 + -2'aux8_3 + -2'aux8_4 + -2'aux8_7 + 2'aux6_0 + 3'aux6_2 + 2'aux6_5 + 2'aux6_6 + -2'aux7_1 + aux7_2 + -2'aux7_3 + -2'aux7_4 + -2'aux7_7 + 2'aux5_0 + 3'aux5_2 + 2'aux5_5 + 2'aux5_6 + 2'c12_0 + -2'c11_0 + -2'aux16_1 + aux16_2 + -2'aux16_3 + -2'aux16_4 + -2'aux16_7 + -2'aux13_1 + aux13_2 + -2'aux13_3 + -2'aux13_4 + -2'aux13_7 + 10'c17_0 + -1'aux15_0 + -3'aux15_1 + -3'aux15_3 + -3'aux15_4 + -1'aux15_5 + -1'aux15_6 + -3'aux15_7 + -2'aux14_1 + aux14_2 + -2'aux14_3 + -2'aux14_4 + -2'aux14_7 + 2'out1_0 + 3'out1_2 + 2'out1_5 + 2'out1_6 + 2'out5_0 + 3'out5_2 + 2'out5_5 + 2'out5_6 + -1'out4_0 + -3'out4_1 + -3'out4_3 + -3'out4_4 + -1'out4_5 + -1'out4_6 + -3'out4_7 + -2'out3_1 + out3_2 + -2'out3_3 + -2'out3_4 + -2'out3_7 + 7'out2_0 + 5'out2_1 + 8'out2_2 + 5'out2_3 + 5'out2_4 + 7'out2_5 + 7'out2_6 + 5'out2_7 + 2'out8_0 + 3'out8_2 + 2'out8_5 + 2'out8_6 + -2'out7_0 + -4'out7_1 + -1'out7_2 + -4'out7_3 + -4'out7_4 + -2'out7_5 + -2'out7_6 + -4'out7_7 + -2'out6_0 + -4'out6_1 + -1'out6_2 + -4'out6_3 + -4'out6_4 + -2'out6_5 + -2'out6_6 + -4'out6_7 = 5
invariant :aux9_7 + aux10_7 + aux11_7 + aux12_7 + in1_7 + in3_7 + in2_7 + in4_7 + aux8_7 + aux6_7 + aux7_7 + aux5_7 + aux16_7 + aux13_7 + aux15_7 + aux14_7 + out1_7 + out5_7 + out4_7 + out3_7 + out2_7 + out8_7 + out7_7 + out6_7 = 5
invariant :2'c16_0 + 2'c15_0 + 2'c17_0 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out2_0 + 2'out2_1 + 2'out2_2 + 2'out2_3 + 2'out2_4 + 2'out2_5 + 2'out2_6 + 2'out2_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + 4'c7_0 + 4'in3_0 + 4'in3_1 + 3'in3_2 + 4'in3_3 + 4'in3_4 + 4'in3_5 + 4'in3_6 + 4'in3_7 + -1'in2_2 + -4'in4_0 + -4'in4_1 + -5'in4_2 + -4'in4_3 + -4'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -1'aux8_2 + -1'aux6_2 + -1'aux7_2 + -4'c9_0 + 2'aux5_0 + 2'aux5_1 + aux5_2 + 2'aux5_3 + 2'aux5_4 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + 2'c11_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -5
invariant :6'c16_0 + 2'aux9_2 + -2'aux9_3 + -2'aux9_7 + 2'aux10_0 + 2'aux10_1 + 4'aux10_2 + 2'aux10_4 + 2'aux10_5 + 2'aux10_6 + -2'aux11_0 + -2'aux11_1 + -4'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -4'aux11_7 + 2'aux12_2 + -2'aux12_3 + -2'aux12_7 + 2'in1_2 + -2'in1_3 + -2'in1_7 + 2'in3_2 + -2'in3_3 + -2'in3_7 + 2'in2_2 + -2'in2_3 + -2'in2_7 + 2'in4_2 + -2'in4_3 + -2'in4_7 + 2'aux8_2 + -2'aux8_3 + -2'aux8_7 + 2'aux6_2 + -2'aux6_3 + -2'aux6_7 + 2'aux7_2 + -2'aux7_3 + -2'aux7_7 + 2'aux5_2 + -2'aux5_3 + -2'aux5_7 + -4'c11_0 + 2'aux16_2 + -2'aux16_3 + -2'aux16_7 + -1'aux13_0 + -1'aux13_1 + aux13_2 + -3'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -3'aux13_7 + 8'c17_0 + -2'aux15_0 + -2'aux15_1 + -4'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -4'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -3'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + 2'out1_2 + -2'out1_3 + -2'out1_7 + 2'out5_2 + -2'out5_3 + -2'out5_7 + -2'out4_0 + -2'out4_1 + -4'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -4'out4_7 + -1'out3_0 + -1'out3_1 + out3_2 + -3'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -3'out3_7 + 5'out2_0 + 5'out2_1 + 7'out2_2 + 3'out2_3 + 5'out2_4 + 5'out2_5 + 5'out2_6 + 3'out2_7 + 2'out8_0 + 2'out8_1 + 4'out8_2 + 2'out8_4 + 2'out8_5 + 2'out8_6 + -3'out7_0 + -3'out7_1 + -1'out7_2 + -5'out7_3 + -3'out7_4 + -3'out7_5 + -3'out7_6 + -5'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -3'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -3'out6_7 = -10
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_5 + 2'aux9_6 + 2'aux9_7 + 4'c5_0 + -4'c7_0 + -4'in3_0 + -4'in3_1 + -4'in3_2 + -4'in3_3 + -4'in3_4 + -4'in3_5 + -4'in3_6 + -4'in3_7 + 4'in4_0 + 4'in4_1 + 4'in4_2 + 4'in4_3 + 4'in4_4 + 4'in4_5 + 4'in4_6 + 4'in4_7 + 4'c9_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 20
invariant :aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -2'c17_0 + -2'out2_0 + -2'out2_1 + -2'out2_2 + -2'out2_3 + -2'out2_4 + -2'out2_5 + -2'out2_6 + -2'out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :out1_0 + out1_1 + out1_2 + out1_3 + out1_4 + out1_5 + out1_6 + out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :-2'c16_0 + -2'c17_0 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_5 + 2'aux9_6 + 2'aux9_7 + 2'c8_0 + 2'in4_0 + 2'in4_1 + 2'in4_2 + 2'in4_3 + 2'in4_4 + 2'in4_5 + 2'in4_6 + 2'in4_7 + 4'c9_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 20
invariant :aux9_5 + aux10_5 + aux11_5 + aux12_5 + in1_5 + in3_5 + in2_5 + in4_5 + aux8_5 + aux6_5 + aux7_5 + aux5_5 + aux16_5 + aux13_5 + aux15_5 + aux14_5 + out1_5 + out5_5 + out4_5 + out3_5 + out2_5 + out8_5 + out7_5 + out6_5 = 5
invariant :c19_0 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c14_0 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c16_0 + aux9_2 + aux10_2 + aux11_2 + aux12_2 + in1_2 + in3_2 + in2_2 + in4_2 + aux8_2 + aux6_2 + aux7_2 + aux5_2 + aux16_2 + aux13_2 + 2'c17_0 + -1'aux15_0 + -1'aux15_1 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_2 + out1_2 + out5_2 + -1'out4_0 + -1'out4_1 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_2 + out2_0 + out2_1 + 2'out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out8_2 + out7_2 + out6_2 = 5
invariant :6'c16_0 + 2'aux9_2 + 2'aux10_2 + -2'aux11_0 + -2'aux11_1 + -2'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_0 + 2'aux12_1 + 4'aux12_2 + 2'aux12_3 + 2'aux12_4 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + 2'in1_2 + 2'in3_2 + 2'in2_2 + 2'in4_2 + 2'aux8_2 + 2'aux6_2 + 2'aux7_2 + 2'aux5_2 + 4'c12_0 + 2'aux16_2 + -1'aux13_0 + -1'aux13_1 + aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 8'c17_0 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out1_2 + 2'out5_2 + -2'out4_0 + -2'out4_1 + -2'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -2'out4_7 + -1'out3_0 + -1'out3_1 + out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + 5'out2_0 + 5'out2_1 + 7'out2_2 + 5'out2_3 + 5'out2_4 + 5'out2_5 + 5'out2_6 + 5'out2_7 + 2'out8_2 + -1'out7_0 + -1'out7_1 + out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 10
invariant :-1'aux9_5 + -1'aux10_5 + -1'aux11_5 + -1'aux12_5 + in1_0 + in1_1 + in1_2 + in1_3 + in1_4 + in1_6 + in1_7 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -2'in3_5 + -1'in3_6 + -1'in3_7 + -1'in2_5 + -1'in4_5 + -1'aux8_5 + -1'aux6_5 + -1'aux7_5 + -1'aux5_5 + -1'aux16_5 + -1'aux13_5 + -1'aux15_5 + -1'aux14_5 + -1'out1_5 + -1'out5_5 + -1'out4_5 + -1'out3_5 + -1'out2_5 + -1'out8_5 + -1'out7_5 + -1'out6_5 = -5
invariant :out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 = 0
invariant :out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1024 rows 208 cols
invariant :c20_0 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :out5_0 + out5_1 + out5_2 + out5_3 + out5_4 + out5_5 + out5_6 + out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + -1'in4_2 + -1'aux8_2 + -1'aux6_2 + -1'aux7_2 + -1'aux5_2 + 2'c110_0 + 2'c11_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -5
invariant :c18_0 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + -1'in4_2 + aux8_0 + aux8_1 + aux8_3 + aux8_4 + aux8_5 + aux8_6 + aux8_7 + -1'aux6_2 + -1'aux7_2 + -2'c9_0 + -1'aux5_2 + -1'c12_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -5
invariant :aux9_1 + aux10_1 + aux11_1 + aux12_1 + in1_1 + in3_1 + in2_1 + in4_1 + aux8_1 + aux6_1 + aux7_1 + aux5_1 + aux16_1 + aux13_1 + aux15_1 + aux14_1 + -1'out1_0 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + out5_1 + out4_1 + out3_1 + out2_0 + 2'out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out8_1 + out7_1 + out6_1 = 5
invariant :4'c16_0 + 4'c13_0 + 2'aux9_2 + 2'aux10_2 + -2'aux11_0 + -2'aux11_1 + -2'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_2 + 2'in1_2 + 2'in3_2 + 2'in2_2 + 2'in4_2 + 2'aux8_2 + 2'aux6_2 + 2'aux7_2 + 2'aux5_2 + 4'c12_0 + 2'aux16_2 + aux13_0 + aux13_1 + 3'aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + 4'c17_0 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out1_2 + 2'out5_2 + -2'out4_0 + -2'out4_1 + -2'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -2'out4_7 + out3_0 + out3_1 + 3'out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + 3'out2_0 + 3'out2_1 + 5'out2_2 + 3'out2_3 + 3'out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + 2'out8_2 + -1'out7_0 + -1'out7_1 + out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 10
invariant :-10'c16_0 + aux9_0 + aux9_1 + -2'aux9_2 + 3'aux9_3 + 3'aux9_4 + aux9_5 + aux9_6 + 3'aux9_7 + -2'aux10_0 + -2'aux10_1 + -5'aux10_2 + -2'aux10_5 + -2'aux10_6 + 3'aux11_0 + 3'aux11_1 + 5'aux11_3 + 5'aux11_4 + 3'aux11_5 + 3'aux11_6 + 5'aux11_7 + -2'aux12_0 + -2'aux12_1 + -5'aux12_2 + -2'aux12_5 + -2'aux12_6 + -3'in1_2 + 2'in1_3 + 2'in1_4 + 2'in1_7 + -4'c7_0 + -4'in3_0 + -4'in3_1 + -7'in3_2 + -2'in3_3 + -2'in3_4 + -4'in3_5 + -4'in3_6 + -2'in3_7 + -3'in2_2 + 2'in2_3 + 2'in2_4 + 2'in2_7 + 4'in4_0 + 4'in4_1 + in4_2 + 6'in4_3 + 6'in4_4 + 4'in4_5 + 4'in4_6 + 6'in4_7 + -3'aux8_2 + 2'aux8_3 + 2'aux8_4 + 2'aux8_7 + -3'aux6_2 + 2'aux6_3 + 2'aux6_4 + 2'aux6_7 + -3'aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_7 + 4'c9_0 + -2'aux5_0 + -2'aux5_1 + -5'aux5_2 + -2'aux5_5 + -2'aux5_6 + -4'c12_0 + 2'c11_0 + -3'aux16_2 + 2'aux16_3 + 2'aux16_4 + 2'aux16_7 + 2'aux13_0 + 2'aux13_1 + -1'aux13_2 + 4'aux13_3 + 4'aux13_4 + 2'aux13_5 + 2'aux13_6 + 4'aux13_7 + -14'c17_0 + 3'aux15_0 + 3'aux15_1 + 5'aux15_3 + 5'aux15_4 + 3'aux15_5 + 3'aux15_6 + 5'aux15_7 + 2'aux14_0 + 2'aux14_1 + -1'aux14_2 + 4'aux14_3 + 4'aux14_4 + 2'aux14_5 + 2'aux14_6 + 4'aux14_7 + -3'out1_2 + 2'out1_3 + 2'out1_4 + 2'out1_7 + -2'out5_0 + -2'out5_1 + -5'out5_2 + -2'out5_5 + -2'out5_6 + 3'out4_0 + 3'out4_1 + 5'out4_3 + 5'out4_4 + 3'out4_5 + 3'out4_6 + 5'out4_7 + 2'out3_0 + 2'out3_1 + -1'out3_2 + 4'out3_3 + 4'out3_4 + 2'out3_5 + 2'out3_6 + 4'out3_7 + -9'out2_0 + -9'out2_1 + -12'out2_2 + -7'out2_3 + -7'out2_4 + -9'out2_5 + -9'out2_6 + -7'out2_7 + -2'out8_0 + -2'out8_1 + -5'out8_2 + -2'out8_5 + -2'out8_6 + 4'out7_0 + 4'out7_1 + out7_2 + 6'out7_3 + 6'out7_4 + 4'out7_5 + 4'out7_6 + 6'out7_7 + 4'out6_0 + 4'out6_1 + out6_2 + 6'out6_3 + 6'out6_4 + 4'out6_5 + 4'out6_6 + 6'out6_7 = 15
invariant :2'c16_0 + 2'aux9_0 + aux9_1 + 2'aux9_2 + aux9_3 + aux9_4 + aux9_5 + aux9_6 + aux9_7 + aux10_0 + aux10_2 + -1'aux11_1 + -1'aux11_3 + -1'aux11_4 + -1'aux11_5 + -1'aux11_6 + -1'aux11_7 + aux12_0 + aux12_2 + in1_0 + in1_2 + in3_0 + in3_2 + in2_0 + in2_2 + in4_0 + in4_2 + -1'aux8_1 + -1'aux8_3 + -1'aux8_4 + -1'aux8_5 + -1'aux8_6 + -1'aux8_7 + aux6_0 + aux6_2 + aux7_0 + aux7_2 + 2'c9_0 + aux5_0 + aux5_2 + c12_0 + -1'aux16_1 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 + aux13_0 + aux13_2 + 4'c17_0 + -1'aux15_1 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_0 + aux14_2 + out1_0 + out1_2 + out5_0 + out5_2 + -1'out4_1 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_0 + out3_2 + 4'out2_0 + 3'out2_1 + 4'out2_2 + 3'out2_3 + 3'out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + out8_0 + out8_2 + -1'out7_1 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_1 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 10
invariant :-2'aux9_0 + -2'aux9_1 + -2'aux9_2 + -2'aux9_3 + -2'aux9_4 + -2'aux9_5 + -2'aux9_6 + -2'aux9_7 + 2'c6_0 + 4'c7_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -4'in4_0 + -4'in4_1 + -4'in4_2 + -4'in4_3 + -4'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -4'c9_0 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = -20
invariant :-2'c16_0 + -2'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_0 + -1'aux10_2 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_0 + -1'aux12_2 + -1'in1_0 + -1'in1_2 + -1'in3_0 + -1'in3_2 + in2_1 + in2_3 + in2_4 + in2_5 + in2_6 + in2_7 + -2'in4_0 + -1'in4_1 + -2'in4_2 + -1'in4_3 + -1'in4_4 + -1'in4_5 + -1'in4_6 + -1'in4_7 + aux8_1 + aux8_3 + aux8_4 + aux8_5 + aux8_6 + aux8_7 + -1'aux6_0 + -1'aux6_2 + -1'aux7_0 + -1'aux7_2 + -2'c9_0 + -1'aux5_0 + -1'aux5_2 + -1'c12_0 + aux16_1 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -1'aux13_0 + -1'aux13_2 + -4'c17_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_0 + -1'aux14_2 + -1'out1_0 + -1'out1_2 + -1'out5_0 + -1'out5_2 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_0 + -1'out3_2 + -4'out2_0 + -3'out2_1 + -4'out2_2 + -3'out2_3 + -3'out2_4 + -3'out2_5 + -3'out2_6 + -3'out2_7 + -1'out8_0 + -1'out8_2 + out7_1 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_1 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = -10
invariant :-2'c16_0 + 3'aux9_0 + 3'aux9_1 + 2'aux9_2 + 3'aux9_3 + 3'aux9_4 + 3'aux9_5 + 3'aux9_6 + 3'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + -1'in3_2 + -1'in2_2 + 4'in4_0 + 4'in4_1 + 3'in4_2 + 4'in4_3 + 4'in4_4 + 4'in4_5 + 4'in4_6 + 4'in4_7 + -1'aux8_2 + -1'aux6_2 + 2'aux7_0 + 2'aux7_1 + aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_5 + 2'aux7_6 + 2'aux7_7 + 4'c9_0 + -1'aux5_2 + 2'c11_0 + -1'aux16_2 + 2'aux13_0 + 2'aux13_1 + aux13_2 + 2'aux13_3 + 2'aux13_4 + 2'aux13_5 + 2'aux13_6 + 2'aux13_7 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + 2'aux14_0 + 2'aux14_1 + aux14_2 + 2'aux14_3 + 2'aux14_4 + 2'aux14_5 + 2'aux14_6 + 2'aux14_7 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + 2'out3_0 + 2'out3_1 + out3_2 + 2'out3_3 + 2'out3_4 + 2'out3_5 + 2'out3_6 + 2'out3_7 + out2_0 + out2_1 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out8_2 + 2'out7_0 + 2'out7_1 + out7_2 + 2'out7_3 + 2'out7_4 + 2'out7_5 + 2'out7_6 + 2'out7_7 + 2'out6_0 + 2'out6_1 + out6_2 + 2'out6_3 + 2'out6_4 + 2'out6_5 + 2'out6_6 + 2'out6_7 = 35
invariant :aux9_3 + aux10_3 + aux11_3 + aux12_3 + in1_3 + in3_3 + in2_3 + in4_3 + aux8_3 + aux6_3 + aux7_3 + aux5_3 + aux16_3 + aux13_3 + aux15_3 + aux14_3 + out1_3 + out5_3 + out4_3 + out3_3 + out2_3 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 + out7_0 + out7_1 + out7_2 + 2'out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_3 = 5
invariant :6'c16_0 + aux9_0 + -1'aux9_1 + 2'aux9_2 + -1'aux9_3 + -1'aux9_4 + aux9_5 + aux9_6 + -1'aux9_7 + 2'aux10_0 + 3'aux10_2 + 2'aux10_5 + 2'aux10_6 + -1'aux11_0 + -3'aux11_1 + -3'aux11_3 + -3'aux11_4 + -1'aux11_5 + -1'aux11_6 + -3'aux11_7 + 2'aux12_0 + 3'aux12_2 + 2'aux12_5 + 2'aux12_6 + -2'in1_1 + in1_2 + -2'in1_3 + -2'in1_4 + -2'in1_7 + 4'in3_0 + 2'in3_1 + 5'in3_2 + 2'in3_3 + 2'in3_4 + 4'in3_5 + 4'in3_6 + 2'in3_7 + -2'in2_1 + in2_2 + -2'in2_3 + -2'in2_4 + -2'in2_7 + -2'in4_1 + in4_2 + -2'in4_3 + -2'in4_4 + -2'in4_7 + -2'aux8_1 + aux8_2 + -2'aux8_3 + -2'aux8_4 + -2'aux8_7 + 2'aux6_0 + 3'aux6_2 + 2'aux6_5 + 2'aux6_6 + -2'aux7_1 + aux7_2 + -2'aux7_3 + -2'aux7_4 + -2'aux7_7 + 2'aux5_0 + 3'aux5_2 + 2'aux5_5 + 2'aux5_6 + 2'c12_0 + -2'c11_0 + -2'aux16_1 + aux16_2 + -2'aux16_3 + -2'aux16_4 + -2'aux16_7 + -2'aux13_1 + aux13_2 + -2'aux13_3 + -2'aux13_4 + -2'aux13_7 + 10'c17_0 + -1'aux15_0 + -3'aux15_1 + -3'aux15_3 + -3'aux15_4 + -1'aux15_5 + -1'aux15_6 + -3'aux15_7 + -2'aux14_1 + aux14_2 + -2'aux14_3 + -2'aux14_4 + -2'aux14_7 + 2'out1_0 + 3'out1_2 + 2'out1_5 + 2'out1_6 + 2'out5_0 + 3'out5_2 + 2'out5_5 + 2'out5_6 + -1'out4_0 + -3'out4_1 + -3'out4_3 + -3'out4_4 + -1'out4_5 + -1'out4_6 + -3'out4_7 + -2'out3_1 + out3_2 + -2'out3_3 + -2'out3_4 + -2'out3_7 + 7'out2_0 + 5'out2_1 + 8'out2_2 + 5'out2_3 + 5'out2_4 + 7'out2_5 + 7'out2_6 + 5'out2_7 + 2'out8_0 + 3'out8_2 + 2'out8_5 + 2'out8_6 + -2'out7_0 + -4'out7_1 + -1'out7_2 + -4'out7_3 + -4'out7_4 + -2'out7_5 + -2'out7_6 + -4'out7_7 + -2'out6_0 + -4'out6_1 + -1'out6_2 + -4'out6_3 + -4'out6_4 + -2'out6_5 + -2'out6_6 + -4'out6_7 = 5
invariant :aux9_7 + aux10_7 + aux11_7 + aux12_7 + in1_7 + in3_7 + in2_7 + in4_7 + aux8_7 + aux6_7 + aux7_7 + aux5_7 + aux16_7 + aux13_7 + aux15_7 + aux14_7 + out1_7 + out5_7 + out4_7 + out3_7 + out2_7 + out8_7 + out7_7 + out6_7 = 5
invariant :2'c16_0 + 2'c15_0 + 2'c17_0 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out2_0 + 2'out2_1 + 2'out2_2 + 2'out2_3 + 2'out2_4 + 2'out2_5 + 2'out2_6 + 2'out2_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :-2'c16_0 + -1'aux9_0 + -1'aux9_1 + -2'aux9_2 + -1'aux9_3 + -1'aux9_4 + -1'aux9_5 + -1'aux9_6 + -1'aux9_7 + -1'aux10_2 + aux11_0 + aux11_1 + aux11_3 + aux11_4 + aux11_5 + aux11_6 + aux11_7 + -1'aux12_2 + -1'in1_2 + 4'c7_0 + 4'in3_0 + 4'in3_1 + 3'in3_2 + 4'in3_3 + 4'in3_4 + 4'in3_5 + 4'in3_6 + 4'in3_7 + -1'in2_2 + -4'in4_0 + -4'in4_1 + -5'in4_2 + -4'in4_3 + -4'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -1'aux8_2 + -1'aux6_2 + -1'aux7_2 + -4'c9_0 + 2'aux5_0 + 2'aux5_1 + aux5_2 + 2'aux5_3 + 2'aux5_4 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + 2'c11_0 + -1'aux16_2 + -1'aux13_2 + -2'c17_0 + aux15_0 + aux15_1 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_2 + -1'out1_2 + -1'out5_2 + out4_0 + out4_1 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_2 + -1'out2_0 + -1'out2_1 + -2'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out8_2 + -1'out7_2 + -1'out6_2 = -5
invariant :6'c16_0 + 2'aux9_2 + -2'aux9_3 + -2'aux9_7 + 2'aux10_0 + 2'aux10_1 + 4'aux10_2 + 2'aux10_4 + 2'aux10_5 + 2'aux10_6 + -2'aux11_0 + -2'aux11_1 + -4'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -4'aux11_7 + 2'aux12_2 + -2'aux12_3 + -2'aux12_7 + 2'in1_2 + -2'in1_3 + -2'in1_7 + 2'in3_2 + -2'in3_3 + -2'in3_7 + 2'in2_2 + -2'in2_3 + -2'in2_7 + 2'in4_2 + -2'in4_3 + -2'in4_7 + 2'aux8_2 + -2'aux8_3 + -2'aux8_7 + 2'aux6_2 + -2'aux6_3 + -2'aux6_7 + 2'aux7_2 + -2'aux7_3 + -2'aux7_7 + 2'aux5_2 + -2'aux5_3 + -2'aux5_7 + -4'c11_0 + 2'aux16_2 + -2'aux16_3 + -2'aux16_7 + -1'aux13_0 + -1'aux13_1 + aux13_2 + -3'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -3'aux13_7 + 8'c17_0 + -2'aux15_0 + -2'aux15_1 + -4'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -4'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -3'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + 2'out1_2 + -2'out1_3 + -2'out1_7 + 2'out5_2 + -2'out5_3 + -2'out5_7 + -2'out4_0 + -2'out4_1 + -4'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -4'out4_7 + -1'out3_0 + -1'out3_1 + out3_2 + -3'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -3'out3_7 + 5'out2_0 + 5'out2_1 + 7'out2_2 + 3'out2_3 + 5'out2_4 + 5'out2_5 + 5'out2_6 + 3'out2_7 + 2'out8_0 + 2'out8_1 + 4'out8_2 + 2'out8_4 + 2'out8_5 + 2'out8_6 + -3'out7_0 + -3'out7_1 + -1'out7_2 + -5'out7_3 + -3'out7_4 + -3'out7_5 + -3'out7_6 + -5'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -3'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -3'out6_7 = -10
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_5 + 2'aux9_6 + 2'aux9_7 + 4'c5_0 + -4'c7_0 + -4'in3_0 + -4'in3_1 + -4'in3_2 + -4'in3_3 + -4'in3_4 + -4'in3_5 + -4'in3_6 + -4'in3_7 + 4'in4_0 + 4'in4_1 + 4'in4_2 + 4'in4_3 + 4'in4_4 + 4'in4_5 + 4'in4_6 + 4'in4_7 + 4'c9_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 20
invariant :aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -2'c17_0 + -2'out2_0 + -2'out2_1 + -2'out2_2 + -2'out2_3 + -2'out2_4 + -2'out2_5 + -2'out2_6 + -2'out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :out1_0 + out1_1 + out1_2 + out1_3 + out1_4 + out1_5 + out1_6 + out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :-2'c16_0 + -2'c17_0 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_5 + 2'aux9_6 + 2'aux9_7 + 2'c8_0 + 2'in4_0 + 2'in4_1 + 2'in4_2 + 2'in4_3 + 2'in4_4 + 2'in4_5 + 2'in4_6 + 2'in4_7 + 4'c9_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 20
invariant :aux9_5 + aux10_5 + aux11_5 + aux12_5 + in1_5 + in3_5 + in2_5 + in4_5 + aux8_5 + aux6_5 + aux7_5 + aux5_5 + aux16_5 + aux13_5 + aux15_5 + aux14_5 + out1_5 + out5_5 + out4_5 + out3_5 + out2_5 + out8_5 + out7_5 + out6_5 = 5
invariant :c19_0 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c14_0 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c16_0 + aux9_2 + aux10_2 + aux11_2 + aux12_2 + in1_2 + in3_2 + in2_2 + in4_2 + aux8_2 + aux6_2 + aux7_2 + aux5_2 + aux16_2 + aux13_2 + 2'c17_0 + -1'aux15_0 + -1'aux15_1 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_2 + out1_2 + out5_2 + -1'out4_0 + -1'out4_1 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_2 + out2_0 + out2_1 + 2'out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out8_2 + out7_2 + out6_2 = 5
invariant :6'c16_0 + 2'aux9_2 + 2'aux10_2 + -2'aux11_0 + -2'aux11_1 + -2'aux11_3 + -2'aux11_4 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_0 + 2'aux12_1 + 4'aux12_2 + 2'aux12_3 + 2'aux12_4 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + 2'in1_2 + 2'in3_2 + 2'in2_2 + 2'in4_2 + 2'aux8_2 + 2'aux6_2 + 2'aux7_2 + 2'aux5_2 + 4'c12_0 + 2'aux16_2 + -1'aux13_0 + -1'aux13_1 + aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 8'c17_0 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_4 + -2'aux15_5 + -2'aux15_6 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'out1_2 + 2'out5_2 + -2'out4_0 + -2'out4_1 + -2'out4_3 + -2'out4_4 + -2'out4_5 + -2'out4_6 + -2'out4_7 + -1'out3_0 + -1'out3_1 + out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 + 5'out2_0 + 5'out2_1 + 7'out2_2 + 5'out2_3 + 5'out2_4 + 5'out2_5 + 5'out2_6 + 5'out2_7 + 2'out8_2 + -1'out7_0 + -1'out7_1 + out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 + -1'out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 10
invariant :-1'aux9_5 + -1'aux10_5 + -1'aux11_5 + -1'aux12_5 + in1_0 + in1_1 + in1_2 + in1_3 + in1_4 + in1_6 + in1_7 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -2'in3_5 + -1'in3_6 + -1'in3_7 + -1'in2_5 + -1'in4_5 + -1'aux8_5 + -1'aux6_5 + -1'aux7_5 + -1'aux5_5 + -1'aux16_5 + -1'aux13_5 + -1'aux15_5 + -1'aux14_5 + -1'out1_5 + -1'out5_5 + -1'out4_5 + -1'out3_5 + -1'out2_5 + -1'out8_5 + -1'out7_5 + -1'out6_5 = -5
invariant :out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out3_0 + -1'out3_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + -1'out3_6 + -1'out3_7 = 0
invariant :out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 + -1'out7_0 + -1'out7_1 + -1'out7_2 + -1'out7_3 + -1'out7_4 + -1'out7_5 + -1'out7_6 + -1'out7_7 = 0
FORMULA PermAdmissibility-COL-05-ReachabilityCardinality-07 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 22293 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 146 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
LTSmin run took 26417 ms.
Found Violation
FORMULA PermAdmissibility-COL-05-ReachabilityCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
LTSmin run took 8438 ms.
Found Violation
FORMULA PermAdmissibility-COL-05-ReachabilityCardinality-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
LTSmin run took 107279 ms.
Found Violation
FORMULA PermAdmissibility-COL-05-ReachabilityCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL05ReachabilityCardinality00==true], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 1:46:39 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 1:46:39 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 1:46:39 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 25, 2018 1:46:39 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 713 ms
May 25, 2018 1:46:39 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 40 places.
May 25, 2018 1:46:39 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 25, 2018 1:46:39 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :input->aux9,aux10,aux11,aux12,in1,in3,in2,in4,aux8,aux6,aux7,aux5,aux16,aux13,aux15,aux14,out1,out5,out4,out3,out2,out8,out7,out6,
Dot->c16,c15,c14,c13,c6,c5,c8,c7,c9,c12,c110,c11,c17,c20,c18,c19,

May 25, 2018 1:46:39 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 16 transitions.
May 25, 2018 1:46:39 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 25, 2018 1:46:39 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
May 25, 2018 1:46:40 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 188 ms
May 25, 2018 1:46:42 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 104 ms
May 25, 2018 1:46:42 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 36 ms
May 25, 2018 1:46:42 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 25, 2018 1:46:42 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 119 ms
May 25, 2018 1:46:42 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
May 25, 2018 1:46:42 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 11 ms.
May 25, 2018 1:46:42 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
May 25, 2018 1:46:42 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 3 ms.
May 25, 2018 1:46:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1537 ms.
May 25, 2018 1:46:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-00(UNSAT) depth K=0 took 14 ms
May 25, 2018 1:46:43 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 31 place invariants in 301 ms
May 25, 2018 1:46:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-01(UNSAT) depth K=0 took 14 ms
May 25, 2018 1:46:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-02(UNSAT) depth K=0 took 16 ms
May 25, 2018 1:46:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-03(UNSAT) depth K=0 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-04(UNSAT) depth K=0 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-05(UNSAT) depth K=0 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-06(UNSAT) depth K=0 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
May 25, 2018 1:46:44 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 8 ms.
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-07(UNSAT) depth K=0 took 17 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-08(UNSAT) depth K=0 took 2 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-09(UNSAT) depth K=0 took 17 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-10(UNSAT) depth K=0 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-11(UNSAT) depth K=0 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-12(UNSAT) depth K=0 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-13(UNSAT) depth K=0 took 17 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-14(UNSAT) depth K=0 took 15 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-15(UNSAT) depth K=0 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-00(UNSAT) depth K=1 took 27 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-01(UNSAT) depth K=1 took 15 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-02(UNSAT) depth K=1 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-03(UNSAT) depth K=1 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-04(UNSAT) depth K=1 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-05(UNSAT) depth K=1 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-06(UNSAT) depth K=1 took 20 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-07(UNSAT) depth K=1 took 23 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-08(UNSAT) depth K=1 took 15 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-09(UNSAT) depth K=1 took 20 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-10(UNSAT) depth K=1 took 15 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-11(UNSAT) depth K=1 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-12(UNSAT) depth K=1 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-13(UNSAT) depth K=1 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-14(UNSAT) depth K=1 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-15(UNSAT) depth K=1 took 16 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-00(UNSAT) depth K=2 took 198 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 31 place invariants in 258 ms
May 25, 2018 1:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-01(UNSAT) depth K=2 took 194 ms
May 25, 2018 1:46:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-02(UNSAT) depth K=2 took 147 ms
May 25, 2018 1:46:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-03(UNSAT) depth K=2 took 147 ms
May 25, 2018 1:46:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-04(UNSAT) depth K=2 took 152 ms
May 25, 2018 1:46:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-05(UNSAT) depth K=2 took 135 ms
May 25, 2018 1:46:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-06(UNSAT) depth K=2 took 103 ms
May 25, 2018 1:46:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-07(UNSAT) depth K=2 took 233 ms
May 25, 2018 1:46:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-08(UNSAT) depth K=2 took 85 ms
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-09(UNSAT) depth K=2 took 215 ms
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-10(UNSAT) depth K=2 took 155 ms
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-11(UNSAT) depth K=2 took 147 ms
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-12(UNSAT) depth K=2 took 66 ms
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-13(UNSAT) depth K=2 took 116 ms
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 208 variables to be positive in 3027 ms
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1024 transitions.
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1024 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-14(UNSAT) depth K=2 took 111 ms
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 91 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1024 transitions.
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 51 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-15(UNSAT) depth K=2 took 158 ms
May 25, 2018 1:46:46 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 208 variables to be positive in 2511 ms
May 25, 2018 1:46:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-00(UNSAT) depth K=3 took 1008 ms
May 25, 2018 1:46:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-01(UNSAT) depth K=3 took 1067 ms
May 25, 2018 1:46:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-00
May 25, 2018 1:46:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-00(SAT) depth K=0 took 2894 ms
May 25, 2018 1:46:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-02(UNSAT) depth K=3 took 2496 ms
May 25, 2018 1:46:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-01
May 25, 2018 1:46:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-01(SAT) depth K=0 took 3584 ms
May 25, 2018 1:46:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-03(UNSAT) depth K=3 took 2369 ms
May 25, 2018 1:46:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-04(UNSAT) depth K=3 took 1314 ms
May 25, 2018 1:46:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-02
May 25, 2018 1:46:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-02(SAT) depth K=0 took 3040 ms
May 25, 2018 1:46:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-05(UNSAT) depth K=3 took 2238 ms
May 25, 2018 1:47:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-03
May 25, 2018 1:47:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-03(SAT) depth K=0 took 4066 ms
May 25, 2018 1:47:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-04
May 25, 2018 1:47:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-04(SAT) depth K=0 took 4925 ms
May 25, 2018 1:47:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-05
May 25, 2018 1:47:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-05(SAT) depth K=0 took 2171 ms
May 25, 2018 1:47:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-06
May 25, 2018 1:47:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-06(SAT) depth K=0 took 4040 ms
May 25, 2018 1:47:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-06(UNSAT) depth K=3 took 21298 ms
May 25, 2018 1:47:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-07(UNSAT) depth K=3 took 21154 ms
May 25, 2018 1:47:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-08(UNSAT) depth K=3 took 4898 ms
May 25, 2018 1:47:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-09(UNSAT) depth K=3 took 2284 ms
May 25, 2018 1:47:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant PermAdmissibility-COL-05-ReachabilityCardinality-07
May 25, 2018 1:47:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for PermAdmissibility-COL-05-ReachabilityCardinality-07
May 25, 2018 1:47:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-07(TRUE) depth K=0 took 40238 ms
May 25, 2018 1:47:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-08
May 25, 2018 1:47:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-08(SAT) depth K=0 took 2425 ms
May 25, 2018 1:47:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-09
May 25, 2018 1:47:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-09(SAT) depth K=0 took 3545 ms
May 25, 2018 1:47:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-10(UNSAT) depth K=3 took 11210 ms
May 25, 2018 1:48:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-11(UNSAT) depth K=3 took 2884 ms
May 25, 2018 1:48:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-10
May 25, 2018 1:48:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-10(SAT) depth K=0 took 4956 ms
May 25, 2018 1:48:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-12(UNSAT) depth K=3 took 8607 ms
May 25, 2018 1:48:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-11
May 25, 2018 1:48:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-11(SAT) depth K=0 took 7981 ms
May 25, 2018 1:48:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-13(UNSAT) depth K=3 took 3219 ms
May 25, 2018 1:48:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-12
May 25, 2018 1:48:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-12(SAT) depth K=0 took 4858 ms
May 25, 2018 1:48:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-13
May 25, 2018 1:48:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-13(SAT) depth K=0 took 5357 ms
May 25, 2018 1:48:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-14
May 25, 2018 1:48:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-14(SAT) depth K=0 took 14145 ms
May 25, 2018 1:48:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-15
May 25, 2018 1:48:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-15(SAT) depth K=0 took 4822 ms
May 25, 2018 1:48:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-14(UNSAT) depth K=3 took 37767 ms
May 25, 2018 1:48:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-15(UNSAT) depth K=3 took 2503 ms
May 25, 2018 1:49:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1024 transitions.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
May 25, 2018 1:49:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/1024) took 599 ms. Total solver calls (SAT/UNSAT): 12(12/0)
May 25, 2018 1:49:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 679 ms. Total solver calls (SAT/UNSAT): 12(12/0)
May 25, 2018 1:49:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 1024 transitions.
May 25, 2018 1:49:12 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 1:49:13 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 1:49:13 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 1:49:13 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 25, 2018 1:49:14 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:628)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 1:49:14 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 152080ms conformant to PINS in folder :/home/mcc/execution
May 25, 2018 1:50:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-00
May 25, 2018 1:50:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-00(SAT) depth K=1 took 125691 ms
May 25, 2018 1:50:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-01
May 25, 2018 1:50:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-01(SAT) depth K=1 took 4626 ms
May 25, 2018 1:52:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-00(UNSAT) depth K=4 took 214855 ms
May 25, 2018 1:52:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-02
May 25, 2018 1:52:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-02(SAT) depth K=1 took 98471 ms
May 25, 2018 1:54:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-03
May 25, 2018 1:54:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-03(SAT) depth K=1 took 145819 ms
May 25, 2018 1:55:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-01(UNSAT) depth K=4 took 187768 ms
May 25, 2018 1:57:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-02(UNSAT) depth K=4 took 113595 ms
May 25, 2018 1:57:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-04
May 25, 2018 1:57:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-04(SAT) depth K=1 took 162827 ms
May 25, 2018 1:58:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-05
May 25, 2018 1:58:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-05(SAT) depth K=1 took 39857 ms
May 25, 2018 1:58:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-03(UNSAT) depth K=4 took 76509 ms
May 25, 2018 1:59:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-04(UNSAT) depth K=4 took 28342 ms
May 25, 2018 1:59:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-05(UNSAT) depth K=4 took 18695 ms
May 25, 2018 2:01:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-05-ReachabilityCardinality-06
May 25, 2018 2:01:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-05-ReachabilityCardinality-06(SAT) depth K=1 took 179198 ms
May 25, 2018 2:02:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-06(UNSAT) depth K=4 took 158622 ms
May 25, 2018 2:03:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-08(UNSAT) depth K=4 took 61688 ms
LTSmin failed to check property PermAdmissibility-COL-05-ReachabilityCardinality-03 due to out of memory issue (code 137).
ITS-tools command line returned an error code 137
May 25, 2018 2:04:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-09(UNSAT) depth K=4 took 72125 ms
May 25, 2018 2:05:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-10(UNSAT) depth K=4 took 59060 ms
May 25, 2018 2:06:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-11(UNSAT) depth K=4 took 51810 ms
May 25, 2018 2:07:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-12(UNSAT) depth K=4 took 78270 ms
May 25, 2018 2:09:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-13(UNSAT) depth K=4 took 89507 ms
May 25, 2018 2:09:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-14(UNSAT) depth K=4 took 28988 ms
May 25, 2018 2:11:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-15(UNSAT) depth K=4 took 101336 ms
May 25, 2018 2:14:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-00(UNSAT) depth K=5 took 204063 ms
May 25, 2018 2:21:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-01(UNSAT) depth K=5 took 418511 ms
May 25, 2018 2:24:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-02(UNSAT) depth K=5 took 196630 ms
May 25, 2018 2:30:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-03(UNSAT) depth K=5 took 319410 ms
May 25, 2018 2:33:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-04(UNSAT) depth K=5 took 210818 ms
May 25, 2018 2:36:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-05(UNSAT) depth K=5 took 162351 ms
May 25, 2018 2:40:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-06(UNSAT) depth K=5 took 269786 ms
May 25, 2018 2:42:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-05-ReachabilityCardinality-08(UNSAT) depth K=5 took 108298 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-05.tgz
mv PermAdmissibility-COL-05 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is PermAdmissibility-COL-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r117-csrt-152666477000446"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;