About the Execution of ITS-Tools.L for PermAdmissibility-COL-01
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15755.770 | 10995.00 | 18263.00 | 117.10 | 2 2 1 1 1 2 2 2 1 1 1 2 1 2 2 2 | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.................
/home/mcc/execution
total 216K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 10K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 54K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is PermAdmissibility-COL-01, examination is UpperBounds
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r117-csrt-152666477000429
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of positive values
NUM_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-00
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-01
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-02
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-03
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-04
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-05
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-06
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-07
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-08
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-09
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-10
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-11
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-12
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-13
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-14
FORMULA_NAME PermAdmissibility-COL-01-UpperBounds-15
=== Now, execution of the tool begins
BK_START 1527254816849
13:26:59.437 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
13:26:59.440 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/UpperBounds.pnml.gal, -t, CGAL, -reachable-file, UpperBounds.prop, --nowitness], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/UpperBounds.pnml.gal -t CGAL -reachable-file UpperBounds.prop --nowitness
Loading property file UpperBounds.prop.
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-00 with value :aux13_0+aux13_1+aux13_2+aux13_3+aux13_4+aux13_5+aux13_6+aux13_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-01 with value :in2_0+in2_1+in2_2+in2_3+in2_4+in2_5+in2_6+in2_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-02 with value :out8_0+out8_1+out8_2+out8_3+out8_4+out8_5+out8_6+out8_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-03 with value :out5_0+out5_1+out5_2+out5_3+out5_4+out5_5+out5_6+out5_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-04 with value :out8_0+out8_1+out8_2+out8_3+out8_4+out8_5+out8_6+out8_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-05 with value :aux6_0+aux6_1+aux6_2+aux6_3+aux6_4+aux6_5+aux6_6+aux6_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-06 with value :aux15_0+aux15_1+aux15_2+aux15_3+aux15_4+aux15_5+aux15_6+aux15_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-07 with value :aux10_0+aux10_1+aux10_2+aux10_3+aux10_4+aux10_5+aux10_6+aux10_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-08 with value :out5_0+out5_1+out5_2+out5_3+out5_4+out5_5+out5_6+out5_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-09 with value :out2_0+out2_1+out2_2+out2_3+out2_4+out2_5+out2_6+out2_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-10 with value :c19_0
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-11 with value :in2_0+in2_1+in2_2+in2_3+in2_4+in2_5+in2_6+in2_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-12 with value :out6_0+out6_1+out6_2+out6_3+out6_4+out6_5+out6_6+out6_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-13 with value :aux11_0+aux11_1+aux11_2+aux11_3+aux11_4+aux11_5+aux11_6+aux11_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-14 with value :aux12_0+aux12_1+aux12_2+aux12_3+aux12_4+aux12_5+aux12_6+aux12_7
Read [bounds] property : PermAdmissibility-COL-01-UpperBounds-15 with value :aux14_0+aux14_1+aux14_2+aux14_3+aux14_4+aux14_5+aux14_6+aux14_7
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility\_COL\_01\_flat,52537,3.45107,89616,2,113230,5,326986,6,0,1766,120121,0
Total reachable state count : 52537
Verifying 16 reachability properties.
Min sum of variable value : 0
Maximum sum along a path : 2
Bounds property PermAdmissibility-COL-01-UpperBounds-00 :0 <= aux13_0+aux13_1+aux13_2+aux13_3+aux13_4+aux13_5+aux13_6+aux13_7 <= 2
FORMULA PermAdmissibility-COL-01-UpperBounds-00 2 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-00,0,3.46749,89732,1,0,7,326986,9,1,2070,120121,4
Min sum of variable value : 0
Maximum sum along a path : 2
Bounds property PermAdmissibility-COL-01-UpperBounds-01 :0 <= in2_0+in2_1+in2_2+in2_3+in2_4+in2_5+in2_6+in2_7 <= 2
FORMULA PermAdmissibility-COL-01-UpperBounds-01 2 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-01,0,3.49233,89804,1,0,8,326986,10,1,2220,120121,5
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property PermAdmissibility-COL-01-UpperBounds-02 :0 <= out8_0+out8_1+out8_2+out8_3+out8_4+out8_5+out8_6+out8_7 <= 1
FORMULA PermAdmissibility-COL-01-UpperBounds-02 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-02,0,3.69792,89804,1,0,9,326986,11,1,2604,120121,6
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property PermAdmissibility-COL-01-UpperBounds-03 :0 <= out5_0+out5_1+out5_2+out5_3+out5_4+out5_5+out5_6+out5_7 <= 1
FORMULA PermAdmissibility-COL-01-UpperBounds-03 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-03,0,3.85462,89840,1,0,10,326986,12,1,2926,120121,7
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property PermAdmissibility-COL-01-UpperBounds-04 :0 <= out8_0+out8_1+out8_2+out8_3+out8_4+out8_5+out8_6+out8_7 <= 1
FORMULA PermAdmissibility-COL-01-UpperBounds-04 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-04,0,3.85515,89840,1,0,10,326986,12,1,2926,120121,7
Min sum of variable value : 0
Maximum sum along a path : 2
Bounds property PermAdmissibility-COL-01-UpperBounds-05 :0 <= aux6_0+aux6_1+aux6_2+aux6_3+aux6_4+aux6_5+aux6_6+aux6_7 <= 2
FORMULA PermAdmissibility-COL-01-UpperBounds-05 2 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-05,0,3.85611,89840,1,0,11,326986,13,1,2968,120121,8
Min sum of variable value : 0
Maximum sum along a path : 2
Bounds property PermAdmissibility-COL-01-UpperBounds-06 :0 <= aux15_0+aux15_1+aux15_2+aux15_3+aux15_4+aux15_5+aux15_6+aux15_7 <= 2
FORMULA PermAdmissibility-COL-01-UpperBounds-06 2 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-06,0,4.05316,89840,1,0,12,326986,14,1,3254,120121,9
Min sum of variable value : 0
Maximum sum along a path : 2
Bounds property PermAdmissibility-COL-01-UpperBounds-07 :0 <= aux10_0+aux10_1+aux10_2+aux10_3+aux10_4+aux10_5+aux10_6+aux10_7 <= 2
FORMULA PermAdmissibility-COL-01-UpperBounds-07 2 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-07,0,4.09428,89840,1,0,13,326986,15,1,3440,120121,10
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property PermAdmissibility-COL-01-UpperBounds-08 :0 <= out5_0+out5_1+out5_2+out5_3+out5_4+out5_5+out5_6+out5_7 <= 1
FORMULA PermAdmissibility-COL-01-UpperBounds-08 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-08,0,4.09484,89840,1,0,13,326986,15,1,3440,120121,10
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property PermAdmissibility-COL-01-UpperBounds-09 :0 <= out2_0+out2_1+out2_2+out2_3+out2_4+out2_5+out2_6+out2_7 <= 1
FORMULA PermAdmissibility-COL-01-UpperBounds-09 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-09,0,4.09789,89840,1,0,14,326986,16,1,3538,120121,11
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property PermAdmissibility-COL-01-UpperBounds-10 :0 <= c19_0 <= 1
FORMULA PermAdmissibility-COL-01-UpperBounds-10 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-10,0,4.24792,89840,1,0,15,326986,17,1,3939,120121,12
Min sum of variable value : 0
Maximum sum along a path : 2
Bounds property PermAdmissibility-COL-01-UpperBounds-11 :0 <= in2_0+in2_1+in2_2+in2_3+in2_4+in2_5+in2_6+in2_7 <= 2
FORMULA PermAdmissibility-COL-01-UpperBounds-11 2 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-11,0,4.24854,89840,1,0,15,326986,17,1,3939,120121,12
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property PermAdmissibility-COL-01-UpperBounds-12 :0 <= out6_0+out6_1+out6_2+out6_3+out6_4+out6_5+out6_6+out6_7 <= 1
FORMULA PermAdmissibility-COL-01-UpperBounds-12 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-12,0,4.5142,89840,1,0,16,326986,18,1,4325,169842,13
Min sum of variable value : 0
Maximum sum along a path : 2
Bounds property PermAdmissibility-COL-01-UpperBounds-13 :0 <= aux11_0+aux11_1+aux11_2+aux11_3+aux11_4+aux11_5+aux11_6+aux11_7 <= 2
FORMULA PermAdmissibility-COL-01-UpperBounds-13 2 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-13,0,4.72954,89840,1,0,17,326986,19,1,4645,195163,14
Min sum of variable value : 0
Maximum sum along a path : 2
Bounds property PermAdmissibility-COL-01-UpperBounds-14 :0 <= aux12_0+aux12_1+aux12_2+aux12_3+aux12_4+aux12_5+aux12_6+aux12_7 <= 2
FORMULA PermAdmissibility-COL-01-UpperBounds-14 2 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-14,0,4.96756,89840,1,0,18,326986,20,1,4903,237197,15
Min sum of variable value : 0
Maximum sum along a path : 2
Bounds property PermAdmissibility-COL-01-UpperBounds-15 :0 <= aux14_0+aux14_1+aux14_2+aux14_3+aux14_4+aux14_5+aux14_6+aux14_7 <= 2
FORMULA PermAdmissibility-COL-01-UpperBounds-15 2 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-COL-01-UpperBounds-15,0,5.42536,89840,1,0,19,326986,21,1,5261,370538,16
BK_STOP 1527254827844
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution UpperBounds -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination UpperBounds -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 1:26:59 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, UpperBounds, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 1:26:59 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 1:26:59 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 25, 2018 1:26:59 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 821 ms
May 25, 2018 1:26:59 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 40 places.
May 25, 2018 1:26:59 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 25, 2018 1:26:59 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :input->aux9,aux10,aux11,aux12,in1,in3,in2,in4,aux8,aux6,aux7,aux5,aux16,aux13,aux15,aux14,out1,out5,out4,out3,out2,out8,out7,out6,
Dot->c16,c15,c14,c13,c6,c5,c8,c7,c9,c12,c110,c11,c17,c20,c18,c19,
May 25, 2018 1:26:59 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 16 transitions.
May 25, 2018 1:26:59 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 25, 2018 1:26:59 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
May 25, 2018 1:27:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 229 ms
May 25, 2018 1:27:02 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/UpperBounds.pnml.gal : 20 ms
May 25, 2018 1:27:02 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/UpperBounds.prop : 1 ms
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-01"
export BK_EXAMINATION="UpperBounds"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-01.tgz
mv PermAdmissibility-COL-01 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is PermAdmissibility-COL-01, examination is UpperBounds"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r117-csrt-152666477000429"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "UpperBounds" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "UpperBounds" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "UpperBounds.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property UpperBounds.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "UpperBounds.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;