Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...........................................................................
/home/mcc/execution
total 372K
-rw-r--r-- 1 mcc users 8.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 33K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 35K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 12K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 42K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 98K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Peterson-PT-2, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r116-csrt-152666475500558
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-00
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-01
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-02
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-03
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-04
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-05
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-06
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-07
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-08
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-09
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-10
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-11
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-12
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-13
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-14
FORMULA_NAME Peterson-PT-2-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527186597504

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : Peterson-PT-2-ReachabilityCardinality-00 with value :((((((EndTurn_0_0+EndTurn_2_0)+EndTurn_1_0)+EndTurn_1_1)+EndTurn_0_1)+EndTurn_2_1)>=3)
Read [invariant] property : Peterson-PT-2-ReachabilityCardinality-01 with value :((((((((((((((((((((BeginLoop_0_0_0+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_2_1_0)+BeginLoop_0_0_1)+BeginLoop_2_1_1)+BeginLoop_0_0_2)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_0_1_2)+BeginLoop_1_1_2)+BeginLoop_1_0_2)+BeginLoop_2_0_2)+BeginLoop_2_1_2)<=(((((WantSection_1_T+WantSection_2_T)+WantSection_0_T)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F))||(((((((((((((TestAlone_1_0_0+TestAlone_0_0_1)+TestAlone_2_1_0)+TestAlone_1_1_0)+TestAlone_2_0_0)+TestAlone_0_0_2)+TestAlone_2_1_1)+TestAlone_0_1_1)+TestAlone_2_0_1)+TestAlone_1_1_2)+TestAlone_0_1_2)+TestAlone_1_0_2)>=3)||(((CS_0+CS_1)+CS_2)<=(((((((((((((((((TestIdentity_0_0_0+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_0_1_1)+TestIdentity_1_1_1)+TestIdentity_0_1_0)+TestIdentity_1_1_0)+TestIdentity_2_1_0)+TestIdentity_0_0_1)+TestIdentity_1_1_2)+TestIdentity_0_1_2)+TestIdentity_2_1_2)+TestIdentity_0_0_2)+TestIdentity_2_1_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2))))&&(((((Idle_0+Idle_2)+Idle_1)<=(((((AskForSection_1_1+AskForSection_2_1)+AskForSection_2_0)+AskForSection_0_1)+AskForSection_0_0)+AskForSection_1_0))&&((((((((((((TestAlone_1_0_0+TestAlone_0_0_1)+TestAlone_2_1_0)+TestAlone_1_1_0)+TestAlone_2_0_0)+TestAlone_0_0_2)+TestAlone_2_1_1)+TestAlone_0_1_1)+TestAlone_2_0_1)+TestAlone_1_1_2)+TestAlone_0_1_2)+TestAlone_1_0_2)<=((CS_0+CS_1)+CS_2)))||((((CS_0+CS_1)+CS_2)<=(((((TestTurn_0_0+TestTurn_2_1)+TestTurn_1_0)+TestTurn_2_0)+TestTurn_0_1)+TestTurn_1_1))||(((CS_0+CS_1)+CS_2)<=(((((((((((TestAlone_1_0_0+TestAlone_0_0_1)+TestAlone_2_1_0)+TestAlone_1_1_0)+TestAlone_2_0_0)+TestAlone_0_0_2)+TestAlone_2_1_1)+TestAlone_0_1_1)+TestAlone_2_0_1)+TestAlone_1_1_2)+TestAlone_0_1_2)+TestAlone_1_0_2)))))
Read [invariant] property : Peterson-PT-2-ReachabilityCardinality-02 with value :((!(((((((AskForSection_1_1+AskForSection_2_1)+AskForSection_2_0)+AskForSection_0_1)+AskForSection_0_0)+AskForSection_1_0)>=2)&&((((((Turn_0_0+Turn_1_2)+Turn_0_1)+Turn_1_0)+Turn_0_2)+Turn_1_1)>=3)))||((((((((((((((((((BeginLoop_0_0_0+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_2_1_0)+BeginLoop_0_0_1)+BeginLoop_2_1_1)+BeginLoop_0_0_2)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_0_1_2)+BeginLoop_1_1_2)+BeginLoop_1_0_2)+BeginLoop_2_0_2)+BeginLoop_2_1_2)>=1))
Read [invariant] property : Peterson-PT-2-ReachabilityCardinality-03 with value :(((((((TestTurn_0_0+TestTurn_2_1)+TestTurn_1_0)+TestTurn_2_0)+TestTurn_0_1)+TestTurn_1_1)<=(((((WantSection_1_T+WantSection_2_T)+WantSection_0_T)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F))||((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_0_0_1)+IsEndLoop_1_0_1)+IsEndLoop_2_0_1)+IsEndLoop_0_1_1)+IsEndLoop_1_1_1)+IsEndLoop_2_1_1)+IsEndLoop_0_0_2)+IsEndLoop_2_0_2)+IsEndLoop_1_0_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_1_2)>=3)&&((((((((((((((((((TestIdentity_0_0_0+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_0_1_1)+TestIdentity_1_1_1)+TestIdentity_0_1_0)+TestIdentity_1_1_0)+TestIdentity_2_1_0)+TestIdentity_0_0_1)+TestIdentity_1_1_2)+TestIdentity_0_1_2)+TestIdentity_2_1_2)+TestIdentity_0_0_2)+TestIdentity_2_1_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2)<=(((((TestTurn_0_0+TestTurn_2_1)+TestTurn_1_0)+TestTurn_2_0)+TestTurn_0_1)+TestTurn_1_1)))||(((Idle_0+Idle_2)+Idle_1)<=(((((TestTurn_0_0+TestTurn_2_1)+TestTurn_1_0)+TestTurn_2_0)+TestTurn_0_1)+TestTurn_1_1))))
Read [invariant] property : Peterson-PT-2-ReachabilityCardinality-04 with value :(!((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_0_0_1)+IsEndLoop_1_0_1)+IsEndLoop_2_0_1)+IsEndLoop_0_1_1)+IsEndLoop_1_1_1)+IsEndLoop_2_1_1)+IsEndLoop_0_0_2)+IsEndLoop_2_0_2)+IsEndLoop_1_0_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_1_2)>=3))
Read [invariant] property : Peterson-PT-2-ReachabilityCardinality-05 with value :(((((((WantSection_1_T+WantSection_2_T)+WantSection_0_T)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F)>=1)||((((((((((((((((((BeginLoop_0_0_0+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_2_1_0)+BeginLoop_0_0_1)+BeginLoop_2_1_1)+BeginLoop_0_0_2)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_0_1_2)+BeginLoop_1_1_2)+BeginLoop_1_0_2)+BeginLoop_2_0_2)+BeginLoop_2_1_2)<=((CS_0+CS_1)+CS_2)))
Read [invariant] property : Peterson-PT-2-ReachabilityCardinality-06 with value :(((!(((CS_0+CS_1)+CS_2)>=2))||(((((((((((((((((((TestIdentity_0_0_0+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_0_1_1)+TestIdentity_1_1_1)+TestIdentity_0_1_0)+TestIdentity_1_1_0)+TestIdentity_2_1_0)+TestIdentity_0_0_1)+TestIdentity_1_1_2)+TestIdentity_0_1_2)+TestIdentity_2_1_2)+TestIdentity_0_0_2)+TestIdentity_2_1_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2)<=(((((((((((TestAlone_1_0_0+TestAlone_0_0_1)+TestAlone_2_1_0)+TestAlone_1_1_0)+TestAlone_2_0_0)+TestAlone_0_0_2)+TestAlone_2_1_1)+TestAlone_0_1_1)+TestAlone_2_0_1)+TestAlone_1_1_2)+TestAlone_0_1_2)+TestAlone_1_0_2))||((((((EndTurn_0_0+EndTurn_2_0)+EndTurn_1_0)+EndTurn_1_1)+EndTurn_0_1)+EndTurn_2_1)>=3)))||(((((((AskForSection_1_1+AskForSection_2_1)+AskForSection_2_0)+AskForSection_0_1)+AskForSection_0_0)+AskForSection_1_0)<=(((((TestTurn_0_0+TestTurn_2_1)+TestTurn_1_0)+TestTurn_2_0)+TestTurn_0_1)+TestTurn_1_1))&&(!((((((Turn_0_0+Turn_1_2)+Turn_0_1)+Turn_1_0)+Turn_0_2)+Turn_1_1)<=(((((WantSection_1_T+WantSection_2_T)+WantSection_0_T)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F)))))
Read [reachable] property : Peterson-PT-2-ReachabilityCardinality-07 with value :(!(((((CS_0+CS_1)+CS_2)<=(((((WantSection_1_T+WantSection_2_T)+WantSection_0_T)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F))&&(((CS_0+CS_1)+CS_2)>=2))||((((((Turn_0_0+Turn_1_2)+Turn_0_1)+Turn_1_0)+Turn_0_2)+Turn_1_1)>=2)))
Read [invariant] property : Peterson-PT-2-ReachabilityCardinality-08 with value :((IsEndLoop_0_1_2<=Turn_1_1)||(!((TestAlone_0_0_1>=3)||(TestAlone_1_1_0<=WantSection_0_T))))
Read [reachable] property : Peterson-PT-2-ReachabilityCardinality-09 with value :((((TestTurn_1_0<=IsEndLoop_1_0_0)&&(TestAlone_0_0_2>=3))&&((EndTurn_0_0<=BeginLoop_1_1_2)&&(TestIdentity_0_0_2>=1)))||(((BeginLoop_2_1_0>=1)&&(BeginLoop_0_1_1>=2))||((Turn_0_2>=2)&&(TestIdentity_0_0_1<=EndTurn_2_1))))
Read [invariant] property : Peterson-PT-2-ReachabilityCardinality-10 with value :((CS_2<=TestTurn_0_0)||((!(BeginLoop_1_1_1>=1))&&(!(Turn_1_2<=TestTurn_1_0))))
Read [reachable] property : Peterson-PT-2-ReachabilityCardinality-11 with value :((AskForSection_0_0<=WantSection_0_T)&&(Turn_0_2>=3))
Read [invariant] property : Peterson-PT-2-ReachabilityCardinality-12 with value :(IsEndLoop_2_0_2<=WantSection_2_T)
Read [invariant] property : Peterson-PT-2-ReachabilityCardinality-13 with value :((TestAlone_2_1_0<=WantSection_2_F)||(!((TestIdentity_0_0_2>=3)||(IsEndLoop_2_1_2>=3))))
Read [reachable] property : Peterson-PT-2-ReachabilityCardinality-14 with value :(IsEndLoop_2_0_2>=1)
Read [reachable] property : Peterson-PT-2-ReachabilityCardinality-15 with value :((IsEndLoop_0_1_1>=3)&&((!(WantSection_0_T>=3))||((TestIdentity_1_0_1>=3)||(Turn_0_1>=1))))
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson\_PT\_2\_flat\_flat,20754,0.280111,12724,2,3437,5,32029,6,0,537,38900,0
Total reachable state count : 20754

Verifying 16 reachability properties.
Reachability property Peterson-PT-2-ReachabilityCardinality-00 does not hold.
FORMULA Peterson-PT-2-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : Peterson-PT-2-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-00,0,0.282543,12812,1,0,5,32029,7,0,553,38900,0
Invariant property Peterson-PT-2-ReachabilityCardinality-01 does not hold.
FORMULA Peterson-PT-2-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-01,29,0.314938,12988,2,586,6,32029,8,0,1071,38900,0
Invariant property Peterson-PT-2-ReachabilityCardinality-02 is true.
FORMULA Peterson-PT-2-ReachabilityCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-02,0,0.320804,13136,1,0,6,32029,9,0,1113,38900,0
Invariant property Peterson-PT-2-ReachabilityCardinality-03 is true.
FORMULA Peterson-PT-2-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-03,0,0.32988,13136,1,0,6,32029,10,0,1211,38900,0
Invariant property Peterson-PT-2-ReachabilityCardinality-04 does not hold.
FORMULA Peterson-PT-2-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-04,1,0.331481,13136,2,103,7,32029,11,0,1233,38900,0
Invariant property Peterson-PT-2-ReachabilityCardinality-05 is true.
FORMULA Peterson-PT-2-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-05,0,0.33597,13136,1,0,7,32029,12,0,1269,38900,0
Invariant property Peterson-PT-2-ReachabilityCardinality-06 is true.
FORMULA Peterson-PT-2-ReachabilityCardinality-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-06,0,0.341627,13136,1,0,7,32029,13,0,1280,38900,0
Reachability property Peterson-PT-2-ReachabilityCardinality-07 does not hold.
FORMULA Peterson-PT-2-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : Peterson-PT-2-ReachabilityCardinality-07

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-07,0,0.344122,13136,1,0,7,32029,14,0,1299,38900,0
Invariant property Peterson-PT-2-ReachabilityCardinality-08 does not hold.
FORMULA Peterson-PT-2-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-08,78,0.346302,13136,2,325,8,32029,15,0,1315,38900,0
Reachability property Peterson-PT-2-ReachabilityCardinality-09 does not hold.
FORMULA Peterson-PT-2-ReachabilityCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : Peterson-PT-2-ReachabilityCardinality-09

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-09,0,0.351814,13136,1,0,8,32029,16,0,1332,38900,0
Invariant property Peterson-PT-2-ReachabilityCardinality-10 does not hold.
FORMULA Peterson-PT-2-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-10,70,0.355348,13136,2,459,9,32029,17,0,1347,38900,0
Reachability property Peterson-PT-2-ReachabilityCardinality-11 does not hold.
FORMULA Peterson-PT-2-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : Peterson-PT-2-ReachabilityCardinality-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-11,0,0.356937,13136,1,0,9,32029,18,0,1354,38900,0
Invariant property Peterson-PT-2-ReachabilityCardinality-12 is true.
FORMULA Peterson-PT-2-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-12,0,0.357254,13136,1,0,9,32029,19,0,1359,38900,0
Invariant property Peterson-PT-2-ReachabilityCardinality-13 is true.
FORMULA Peterson-PT-2-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-13,0,0.358573,13136,1,0,9,32029,20,0,1367,38900,0
Reachability property Peterson-PT-2-ReachabilityCardinality-14 is true.
FORMULA Peterson-PT-2-ReachabilityCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-14,449,0.358896,13136,2,577,10,32029,21,0,1368,38900,0
Reachability property Peterson-PT-2-ReachabilityCardinality-15 does not hold.
FORMULA Peterson-PT-2-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : Peterson-PT-2-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Peterson-PT-2-ReachabilityCardinality-15,0,0.359352,13136,1,0,10,32029,22,0,1373,38900,0
ITS tools runner thread asked to quit. Dying gracefully.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 120
// Phase 1: matrix 120 rows 102 cols
invariant :WantSection_2_T + Idle_2 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :Turn_1_2 + Turn_1_0 + Turn_1_1 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_0_2 + IsEndLoop_2_1_2 + EndTurn_2_0 + EndTurn_2_1 + BeginLoop_2_0_0 + BeginLoop_2_0_1 + BeginLoop_2_1_0 + BeginLoop_2_1_1 + BeginLoop_2_0_2 + BeginLoop_2_1_2 + TestAlone_2_1_0 + TestAlone_2_0_0 + TestAlone_2_1_1 + TestAlone_2_0_1 + TestTurn_2_1 + TestIdentity_2_0_0 + TestTurn_2_0 + TestIdentity_2_0_1 + TestIdentity_2_1_0 + TestIdentity_2_1_2 + TestIdentity_2_1_1 + TestIdentity_2_0_2 + Idle_2 + AskForSection_2_1 + AskForSection_2_0 + CS_2 = 1
invariant :WantSection_1_T + Idle_1 = 1
invariant :Turn_0_0 + Turn_0_1 + Turn_0_2 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_0_2 + IsEndLoop_1_1_2 + EndTurn_1_0 + EndTurn_1_1 + BeginLoop_1_0_0 + BeginLoop_1_1_0 + BeginLoop_1_0_1 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_0_2 + TestAlone_1_0_0 + TestAlone_1_1_0 + TestAlone_1_1_2 + TestAlone_1_0_2 + TestIdentity_1_0_0 + TestTurn_1_0 + TestTurn_1_1 + TestIdentity_1_0_1 + TestIdentity_1_1_1 + TestIdentity_1_1_0 + TestIdentity_1_1_2 + TestIdentity_1_0_2 + Idle_1 + CS_1 + AskForSection_1_1 + AskForSection_1_0 = 1
invariant :WantSection_2_F + -1'Idle_2 = 0
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + EndTurn_0_0 + EndTurn_0_1 + BeginLoop_0_0_0 + BeginLoop_0_1_0 + BeginLoop_0_0_1 + BeginLoop_0_0_2 + BeginLoop_0_1_1 + BeginLoop_0_1_2 + TestAlone_0_0_1 + TestAlone_0_0_2 + TestAlone_0_1_1 + TestTurn_0_0 + TestAlone_0_1_2 + TestIdentity_0_0_0 + TestTurn_0_1 + TestIdentity_0_1_1 + TestIdentity_0_1_0 + TestIdentity_0_0_1 + TestIdentity_0_1_2 + TestIdentity_0_0_2 + Idle_0 + CS_0 + AskForSection_0_1 + AskForSection_0_0 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527186600601

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 6:29:59 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 6:29:59 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 6:29:59 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 54 ms
May 24, 2018 6:29:59 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 102 places.
May 24, 2018 6:29:59 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 126 transitions.
May 24, 2018 6:29:59 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 11 ms
May 24, 2018 6:29:59 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 65 ms
May 24, 2018 6:29:59 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 21 ms
May 24, 2018 6:29:59 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 4 ms
May 24, 2018 6:29:59 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 24, 2018 6:29:59 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 36 ms
May 24, 2018 6:30:00 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 126 transitions.
May 24, 2018 6:30:00 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 126 transitions.
java.lang.RuntimeException: Assertion failed : SMT 'push' solver produced unexpected response (error "Error writing to Z3 solver: java.io.IOException: Stream closed")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:446)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.checkProperties(Gal2SMTFrontEnd.java:131)
at fr.lip6.move.gal.application.SMTRunner$2.run(SMTRunner.java:110)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 6:30:00 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 11 place invariants in 23 ms
Skipping mayMatrices nes/nds SMT solver raised an error :(error "Error writing to Z3 solver: java.io.IOException: Stream closed")
java.lang.RuntimeException: SMT solver raised an error :(error "Error writing to Z3 solver: java.io.IOException: Stream closed")
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.computeAndDeclareInvariants(KInductionSolver.java:293)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:71)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 6:30:00 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 392ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-2"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-2.tgz
mv Peterson-PT-2 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Peterson-PT-2, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r116-csrt-152666475500558"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;