Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................................................................
/home/mcc/execution
total 892K
-rw-r--r-- 1 mcc users 5.1K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 66K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 44K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 5.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 27K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 28K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 104K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.2K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 484K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is PermAdmissibility-PT-01, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r116-csrt-152666475400472
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-00
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-01
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-02
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-03
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-04
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-05
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-06
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-07
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-08
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-09
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-10
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-11
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-12
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-13
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-14
FORMULA_NAME PermAdmissibility-PT-01-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527181114252

Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLCardinality.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLCardinality.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLCardinality.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLCardinality.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,52537,8.77424,243152,2,49937,5,147174,6,0,1098,59698,0


Converting to forward existential form...Done !
original formula: ((((((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)) * AF(((c17<=(((aux7_7+aux7_6)+aux7_3)+aux7_2))&&(c13<=(((((((out6_1+out6_2)+out6_0)+out6_6)+out6_5)+out6_4)+out6_3)+out6_7))))) * !(A((c7<=(((aux6_0+aux6_5)+aux6_1)+aux6_4)) U ((((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)>=3))))
=> equivalent forward existential formula: (([(Init * !(((((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7))))] = FALSE * [FwdG(Init,!(((c17<=(((aux7_7+aux7_6)+aux7_3)+aux7_2))&&(c13<=(((((((out6_1+out6_2)+out6_0)+out6_6)+out6_5)+out6_4)+out6_3)+out6_7)))))] = FALSE) * [((Init * !(EG(!(((((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)>=3))))) * !(E(!(((((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)>=3)) U (!((c7<=(((aux6_0+aux6_5)+aux6_1)+aux6_4))) * !(((((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)>=3))))))] = FALSE)
Reverse transition relation is NOT exact ! Due to transitions switch9_2_0, switch9_3_0, switch9_4_0, switch9_3_5, switch9_1_5, switch9_2_5, switch9_7_4, switch9_0_5, switch9_6_4, switch9_3_6, switch9_4_6, switch9_1_6, switch9_2_6, switch9_7_5, switch9_0_6, switch9_6_5, switch9_4_7, switch9_3_7, switch9_2_7, switch9_1_7, switch9_0_7, switch9_5_6, switch10_4_0, switch10_3_0, switch10_2_0, switch9_5_7, switch9_2_1, switch9_3_1, switch9_4_1, switch9_5_0, switch9_6_0, switch9_7_0, switch9_1_2, switch9_4_2, switch9_5_1, switch9_6_1, switch9_7_1, switch9_0_2, switch9_1_3, switch9_4_3, switch9_6_2, switch9_5_2, switch9_0_3, switch9_7_2, switch9_2_4, switch9_1_4, switch9_3_4, switch9_6_3, switch9_5_3, switch9_0_4, switch9_7_3, switch10_7_4, switch10_0_5, switch10_6_4, switch10_3_5, switch10_1_5, switch10_2_5, switch10_7_5, switch10_0_6, switch10_6_5, switch10_3_6, switch10_4_6, switch10_1_6, switch10_2_6, switch10_0_7, switch10_5_6, switch10_4_7, switch10_3_7, switch10_2_7, switch10_1_7, switch10_5_7, switch11_4_0, switch11_3_0, switch11_2_0, switch10_5_0, switch10_6_0, switch10_7_0, switch10_2_1, switch10_3_1, switch10_4_1, switch10_5_1, switch10_6_1, switch10_7_1, switch10_0_2, switch10_1_2, switch10_4_2, switch10_6_2, switch10_5_2, switch10_0_3, switch10_7_2, switch10_1_3, switch10_4_3, switch10_6_3, switch10_5_3, switch10_0_4, switch10_7_3, switch10_2_4, switch10_1_4, switch10_3_4, switch11_4_6, switch11_3_6, switch11_2_6, switch11_1_6, switch11_0_6, switch11_7_5, switch11_6_5, switch11_3_5, switch11_2_5, switch11_1_5, switch11_0_5, switch11_7_4, switch11_6_4, switch11_5_7, switch11_3_7, switch11_4_7, switch11_1_7, switch11_2_7, switch11_0_7, switch11_5_6, switch11_1_2, switch11_4_2, switch11_6_1, switch11_5_1, switch11_0_2, switch11_7_1, switch11_2_1, switch11_4_1, switch11_3_1, switch11_6_0, switch11_5_0, switch11_7_0, switch11_1_4, switch11_2_4, switch11_3_4, switch11_5_3, switch11_6_3, switch11_7_3, switch11_0_4, switch11_1_3, switch11_4_3, switch11_5_2, switch11_6_2, switch11_7_2, switch11_0_3, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :64/384/144/592
dead was empty
(forward)formula 0,1,98.8418,1878088,1,0,1182,4.43657e+06,1152,533,18576,1.27866e+06,1164
FORMULA PermAdmissibility-PT-01-CTLCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EF((((((((((out4_0+out4_1)+out4_7)+out4_6)+out4_3)+out4_2)+out4_5)+out4_4)>=3)&&((((aux7_7+aux7_6)+aux7_3)+aux7_2)<=(((aux8_7+aux8_3)+aux8_6)+aux8_2))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * (((((((((out4_0+out4_1)+out4_7)+out4_6)+out4_3)+out4_2)+out4_5)+out4_4)>=3)&&((((aux7_7+aux7_6)+aux7_3)+aux7_2)<=(((aux8_7+aux8_3)+aux8_6)+aux8_2))))] != FALSE
(forward)formula 1,0,98.8454,1878088,1,0,1182,4.43657e+06,1153,533,18596,1.27866e+06,1164
FORMULA PermAdmissibility-PT-01-CTLCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EG(!((c7>=2)))
=> equivalent forward existential formula: [FwdG(Init,!((c7>=2)))] != FALSE
(forward)formula 2,1,99.4104,1878088,1,0,1182,4.43671e+06,1156,534,18753,1.31352e+06,1167
FORMULA PermAdmissibility-PT-01-CTLCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AF(((!(((((((((aux11_5+aux11_4)+aux11_3)+aux11_2)+aux11_1)+aux11_0)+aux11_7)+aux11_6)>=2)||(c12<=(((((((out8_1+out8_0)+out8_3)+out8_2)+out8_6)+out8_7)+out8_4)+out8_5))))&&((!((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_6)+aux14_5)+aux14_7)>=1))&&(((((((((aux11_5+aux11_4)+aux11_3)+aux11_2)+aux11_1)+aux11_0)+aux11_7)+aux11_6)>=1)&&((((((((out5_1+out5_2)+out5_0)+out5_5)+out5_6)+out5_3)+out5_4)+out5_7)>=3)))))
=> equivalent forward existential formula: [FwdG(Init,!(((!(((((((((aux11_5+aux11_4)+aux11_3)+aux11_2)+aux11_1)+aux11_0)+aux11_7)+aux11_6)>=2)||(c12<=(((((((out8_1+out8_0)+out8_3)+out8_2)+out8_6)+out8_7)+out8_4)+out8_5))))&&((!((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_6)+aux14_5)+aux14_7)>=1))&&(((((((((aux11_5+aux11_4)+aux11_3)+aux11_2)+aux11_1)+aux11_0)+aux11_7)+aux11_6)>=1)&&((((((((out5_1+out5_2)+out5_0)+out5_5)+out5_6)+out5_3)+out5_4)+out5_7)>=3))))))] = FALSE
(forward)formula 3,0,99.5567,1878088,1,0,1182,4.43768e+06,1158,534,18877,1.31474e+06,1168
FORMULA PermAdmissibility-PT-01-CTLCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: (((((!(c8<=(((((((out8_1+out8_0)+out8_3)+out8_2)+out8_6)+out8_7)+out8_4)+out8_5)))||(((((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)>=2)&&((((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)>=2)))||((((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)<=(((((((out6_1+out6_2)+out6_0)+out6_6)+out6_5)+out6_4)+out6_3)+out6_7)))&&(c16>=3)) + EF(AX(((((((((out4_0+out4_1)+out4_7)+out4_6)+out4_3)+out4_2)+out4_5)+out4_4)>=3))))
=> equivalent forward existential formula: ([(Init * ((((!(c8<=(((((((out8_1+out8_0)+out8_3)+out8_2)+out8_6)+out8_7)+out8_4)+out8_5)))||(((((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)>=2)&&((((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)>=2)))||((((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)<=(((((((out6_1+out6_2)+out6_0)+out6_6)+out6_5)+out6_4)+out6_3)+out6_7)))&&(c16>=3)))] != FALSE + [(FwdU(Init,TRUE) * !(EX(!(((((((((out4_0+out4_1)+out4_7)+out4_6)+out4_3)+out4_2)+out4_5)+out4_4)>=3)))))] != FALSE)
(forward)formula 4,1,99.7962,1878088,1,0,1184,4.44239e+06,1161,536,19020,1.32374e+06,1171
FORMULA PermAdmissibility-PT-01-CTLCardinality-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AX(EG(!((c13>=2))))
=> equivalent forward existential formula: [(EY(Init) * !(EG(!((c13>=2)))))] = FALSE
(forward)formula 5,1,99.9112,1878088,1,0,1184,4.44239e+06,1163,536,19022,1.32378e+06,1172
FORMULA PermAdmissibility-PT-01-CTLCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: A((((((aux5_1+aux5_0)+aux5_5)+aux5_4)>=2)||(((((((((aux11_5+aux11_4)+aux11_3)+aux11_2)+aux11_1)+aux11_0)+aux11_7)+aux11_6)>=3)&&(c20<=(((aux7_7+aux7_6)+aux7_3)+aux7_2)))) U AF((c19>=3)))
=> equivalent forward existential formula: [((Init * !(EG(!(!(EG(!((c19>=3)))))))) * !(E(!(!(EG(!((c19>=3))))) U (!((((((aux5_1+aux5_0)+aux5_5)+aux5_4)>=2)||(((((((((aux11_5+aux11_4)+aux11_3)+aux11_2)+aux11_1)+aux11_0)+aux11_7)+aux11_6)>=3)&&(c20<=(((aux7_7+aux7_6)+aux7_3)+aux7_2))))) * !(!(EG(!((c19>=3)))))))))] != FALSE
(forward)formula 6,0,100.036,1878088,1,0,1185,4.4427e+06,1167,537,19067,1.32441e+06,1176
FORMULA PermAdmissibility-PT-01-CTLCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: E(AF((c20>=2)) U EG(((((((((out5_1+out5_2)+out5_0)+out5_5)+out5_6)+out5_3)+out5_4)+out5_7)>=2)))
=> equivalent forward existential formula: [FwdG(FwdU(Init,!(EG(!((c20>=2))))),((((((((out5_1+out5_2)+out5_0)+out5_5)+out5_6)+out5_3)+out5_4)+out5_7)>=2))] != FALSE
dead was empty
(forward)formula 7,0,100.129,1878088,1,0,1185,4.4427e+06,1174,537,19088,1.32486e+06,1181
FORMULA PermAdmissibility-PT-01-CTLCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: !(AF(((aux6_1<=out6_3)&&(!(out4_2<=out2_7)))))
=> equivalent forward existential formula: [FwdG(Init,!(((aux6_1<=out6_3)&&(!(out4_2<=out2_7)))))] != FALSE
Hit Full ! (commute/partial/dont) 558/0/34
(forward)formula 8,1,103.613,1913200,1,0,1187,4.46967e+06,1182,540,19286,1.36719e+06,1184
FORMULA PermAdmissibility-PT-01-CTLCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AG(!(AG((out2_3>=3))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U !((out2_3>=3)))))] = FALSE
(forward)formula 9,1,103.625,1913464,1,0,1187,4.46986e+06,1184,540,19288,1.36781e+06,1186
FORMULA PermAdmissibility-PT-01-CTLCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EX(EG((out5_6<=aux6_4)))
=> equivalent forward existential formula: [FwdG(EY(Init),(out5_6<=aux6_4))] != FALSE
Hit Full ! (commute/partial/dont) 574/0/18
(forward)formula 10,1,106.355,1985272,1,0,1191,4.48766e+06,1191,543,19455,1.39796e+06,1190
FORMULA PermAdmissibility-PT-01-CTLCardinality-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: (((AX((aux9_4<=in4_7)) + AX((aux10_3<=c20))) * EF(((aux14_4>=3)&&(aux5_1>=3)))) + (A((out7_4<=out3_6) U (out4_1>=1)) * !(((!(out5_5<=aux8_7))&&((aux16_2<=out6_6)&&(aux15_1<=out1_3))))))
=> equivalent forward existential formula: ([(EY(((Init * !((!((E(!((out4_1>=1)) U (!((out7_4<=out3_6)) * !((out4_1>=1)))) + EG(!((out4_1>=1))))) * !(((!(out5_5<=aux8_7))&&((aux16_2<=out6_6)&&(aux15_1<=out1_3))))))) * !(!(EX(!((aux9_4<=in4_7))))))) * !((aux10_3<=c20)))] = FALSE * [((Init * !((!((E(!((out4_1>=1)) U (!((out7_4<=out3_6)) * !((out4_1>=1)))) + EG(!((out4_1>=1))))) * !(((!(out5_5<=aux8_7))&&((aux16_2<=out6_6)&&(aux15_1<=out1_3))))))) * !(E(TRUE U ((aux14_4>=3)&&(aux5_1>=3)))))] = FALSE)
(forward)formula 11,0,137.035,2229472,1,0,1247,5.76198e+06,13,577,4750,1.7178e+06,96
FORMULA PermAdmissibility-PT-01-CTLCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: AX((EG((aux15_3<=out6_4)) + AG((c20<=out5_6))))
=> equivalent forward existential formula: [(FwdU((EY(Init) * !(EG((aux15_3<=out6_4)))),TRUE) * !((c20<=out5_6)))] = FALSE
(forward)formula 12,1,140.541,2229472,1,0,1247,5.76198e+06,22,577,6415,1.7178e+06,201
FORMULA PermAdmissibility-PT-01-CTLCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AG(EF((c20<=aux16_2)))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U (c20<=aux16_2))))] = FALSE
(forward)formula 13,1,141.193,2229472,1,0,1247,5.76198e+06,28,577,6556,1.7178e+06,209
FORMULA PermAdmissibility-PT-01-CTLCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EF((aux8_6>=3))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * (aux8_6>=3))] != FALSE
(forward)formula 14,0,141.276,2229472,1,0,1247,5.76198e+06,29,577,6557,1.7178e+06,209
FORMULA PermAdmissibility-PT-01-CTLCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: (EG((aux16_1<=aux15_6)) * EX((((out5_5<=out2_0)||(aux11_3>=3))||((in4_7<=out1_7)||(out1_2>=3)))))
=> equivalent forward existential formula: [(EY((Init * EG((aux16_1<=aux15_6)))) * (((out5_5<=out2_0)||(aux11_3>=3))||((in4_7<=out1_7)||(out1_2>=3))))] != FALSE
(forward)formula 15,1,144.568,2229472,1,0,1247,5.76198e+06,34,577,6577,1.7178e+06,309
FORMULA PermAdmissibility-PT-01-CTLCardinality-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************


BK_STOP 1527181263445

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 4:58:36 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 4:58:36 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 4:58:36 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 136 ms
May 24, 2018 4:58:36 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 168 places.
May 24, 2018 4:58:36 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 592 transitions.
May 24, 2018 4:58:36 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 35 ms
May 24, 2018 4:58:37 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 240 ms
May 24, 2018 4:58:37 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLCardinality.pnml.gal : 10 ms
May 24, 2018 4:58:37 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLCardinality.ctl : 2 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-01"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-01.tgz
mv PermAdmissibility-PT-01 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is PermAdmissibility-PT-01, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r116-csrt-152666475400472"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;