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Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r116-csrt-152666475400439
Last Updated
June 26, 2018

About the Execution of ITS-Tools for PermAdmissibility-COL-02

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15745.900 3600000.00 9803944.00 1143.40 ?FT?FTF??F????TF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................................................................................................
/home/mcc/execution
total 220K
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.2K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 54K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is PermAdmissibility-COL-02, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r116-csrt-152666475400439
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-00
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-01
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-02
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-03
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-04
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-05
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-06
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-07
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-08
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-09
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-10
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-11
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-12
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-13
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-14
FORMULA_NAME PermAdmissibility-COL-02-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527178222479

16:10:25.732 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
16:10:25.734 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : PermAdmissibility-COL-02-ReachabilityCardinality-00 with value :((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)<=(((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7))
Read [invariant] property : PermAdmissibility-COL-02-ReachabilityCardinality-01 with value :((((c13_0<=(((((((out5_0+out5_1)+out5_2)+out5_3)+out5_4)+out5_5)+out5_6)+out5_7))&&(c13_0<=c7_0))&&((c8_0>=3)||((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)<=(((((((out6_0+out6_1)+out6_2)+out6_3)+out6_4)+out6_5)+out6_6)+out6_7))))||((c14_0<=(((((((in4_0+in4_1)+in4_2)+in4_3)+in4_4)+in4_5)+in4_6)+in4_7))&&((((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7)>=2)))
Read [reachable] property : PermAdmissibility-COL-02-ReachabilityCardinality-02 with value :(((!((((((((out4_0+out4_1)+out4_2)+out4_3)+out4_4)+out4_5)+out4_6)+out4_7)<=c110_0))||(((((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7)>=1)&&(c9_0<=(((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7))))||((((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7)>=2))
Read [reachable] property : PermAdmissibility-COL-02-ReachabilityCardinality-03 with value :(((!((((((((in2_0+in2_1)+in2_2)+in2_3)+in2_4)+in2_5)+in2_6)+in2_7)>=1))&&((((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7)>=3))||((((((((out6_0+out6_1)+out6_2)+out6_3)+out6_4)+out6_5)+out6_6)+out6_7)>=3))
Read [reachable] property : PermAdmissibility-COL-02-ReachabilityCardinality-04 with value :(c7_0>=3)
Read [reachable] property : PermAdmissibility-COL-02-ReachabilityCardinality-05 with value :(c12_0>=1)
Read [reachable] property : PermAdmissibility-COL-02-ReachabilityCardinality-06 with value :((((c20_0<=(((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7))||(c18_0<=(((((((in4_0+in4_1)+in4_2)+in4_3)+in4_4)+in4_5)+in4_6)+in4_7)))||(((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)>=1)||(c20_0<=(((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7))))&&((((((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7)>=1)&&((((((((out5_0+out5_1)+out5_2)+out5_3)+out5_4)+out5_5)+out5_6)+out5_7)>=3))&&(((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)<=(((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7))&&((((((((in4_0+in4_1)+in4_2)+in4_3)+in4_4)+in4_5)+in4_6)+in4_7)>=3))))
Read [reachable] property : PermAdmissibility-COL-02-ReachabilityCardinality-07 with value :((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)>=3)
Read [reachable] property : PermAdmissibility-COL-02-ReachabilityCardinality-08 with value :((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)>=1)
Read [reachable] property : PermAdmissibility-COL-02-ReachabilityCardinality-09 with value :(c12_0>=3)
Read [invariant] property : PermAdmissibility-COL-02-ReachabilityCardinality-10 with value :((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)<=(((((((in2_0+in2_1)+in2_2)+in2_3)+in2_4)+in2_5)+in2_6)+in2_7))
Read [reachable] property : PermAdmissibility-COL-02-ReachabilityCardinality-11 with value :(!((((((((out4_0+out4_1)+out4_2)+out4_3)+out4_4)+out4_5)+out4_6)+out4_7)<=c19_0))
Read [invariant] property : PermAdmissibility-COL-02-ReachabilityCardinality-12 with value :((((c16_0<=(((((((out4_0+out4_1)+out4_2)+out4_3)+out4_4)+out4_5)+out4_6)+out4_7))&&(c13_0<=c8_0))||(((((((((aux7_0+aux7_1)+aux7_2)+aux7_3)+aux7_4)+aux7_5)+aux7_6)+aux7_7)>=3)||((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)>=2)))&&((!((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)>=2))||(((((((((aux12_0+aux12_1)+aux12_2)+aux12_3)+aux12_4)+aux12_5)+aux12_6)+aux12_7)<=c6_0)&&((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)>=3))))
Read [reachable] property : PermAdmissibility-COL-02-ReachabilityCardinality-13 with value :(!(((c16_0<=c15_0)&&((((((((aux12_0+aux12_1)+aux12_2)+aux12_3)+aux12_4)+aux12_5)+aux12_6)+aux12_7)<=c20_0))&&(((((((((out4_0+out4_1)+out4_2)+out4_3)+out4_4)+out4_5)+out4_6)+out4_7)<=(((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7))||(c18_0>=1))))
Read [invariant] property : PermAdmissibility-COL-02-ReachabilityCardinality-14 with value :(true)
Read [reachable] property : PermAdmissibility-COL-02-ReachabilityCardinality-15 with value :(((c12_0>=2)||(!(c15_0<=(((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7))))&&(((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)>=1)&&((((((((in3_0+in3_1)+in3_2)+in3_3)+in3_4)+in3_5)+in3_6)+in3_7)>=1)))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1024 rows 208 cols
invariant :-2'out8_2 + -2'out8_7 + -2'out7_2 + -2'out7_7 + -2'out6_2 + -2'out6_7 + -2'out5_2 + -2'out5_7 + -2'out4_2 + -2'out4_7 + -2'out3_2 + -2'out3_7 + -2'out2_2 + -2'out2_7 + -2'out1_2 + -2'out1_7 + -2'aux13_2 + -2'aux13_7 + -2'aux15_2 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + -3'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + -1'aux16_7 + -2'aux5_2 + -2'aux5_7 + -2'aux8_2 + -2'aux8_7 + -2'aux6_2 + -2'aux6_7 + -2'aux7_2 + -2'aux7_7 + -2'in4_2 + -2'in4_7 + -2'in3_2 + -2'in3_7 + -2'in2_2 + -2'in2_7 + -2'in1_2 + -2'in1_7 + 2'aux12_0 + 2'aux12_1 + 2'aux12_3 + 2'aux12_4 + 2'aux12_5 + 2'aux12_6 + -4'c13_0 + -2'aux9_2 + -2'aux9_7 + -2'aux10_2 + -2'aux10_7 + -2'aux11_2 + -2'aux11_7 + -2'c15_0 + -4'c14_0 = -8
invariant :-2'out8_2 + -2'out8_4 + -2'out8_7 + -2'out7_2 + -2'out7_4 + -2'out7_7 + -2'out6_2 + -2'out6_4 + -2'out6_7 + -2'out5_2 + -2'out5_4 + -2'out5_7 + -2'out4_2 + -2'out4_4 + -2'out4_7 + -2'out3_2 + -2'out3_4 + -2'out3_7 + -2'out2_2 + -2'out2_4 + -2'out2_7 + 4'out1_0 + 4'out1_1 + 2'out1_2 + 4'out1_3 + 2'out1_4 + 4'out1_5 + 4'out1_6 + 2'out1_7 + -2'c18_0 + -2'aux13_2 + -2'aux13_4 + -2'aux13_7 + 2'aux15_0 + 2'aux15_1 + 2'aux15_3 + 2'aux15_5 + 2'aux15_6 + -1'aux14_0 + -1'aux14_1 + -3'aux14_2 + -1'aux14_3 + -3'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + aux16_3 + -1'aux16_4 + aux16_5 + aux16_6 + -1'aux16_7 + -2'aux5_2 + -2'aux5_4 + -2'aux5_7 + -2'aux8_2 + -2'aux8_4 + -2'aux8_7 + 2'aux6_0 + 2'aux6_1 + 2'aux6_3 + 2'aux6_5 + 2'aux6_6 + -2'aux7_2 + -2'aux7_4 + -2'aux7_7 + -2'in4_2 + -2'in4_4 + -2'in4_7 + -2'in3_2 + -2'in3_4 + -2'in3_7 + -2'in2_2 + -2'in2_4 + -2'in2_7 + 4'in1_0 + 4'in1_1 + 2'in1_2 + 4'in1_3 + 2'in1_4 + 4'in1_5 + 4'in1_6 + 2'in1_7 + 2'aux12_0 + 2'aux12_1 + 2'aux12_3 + 2'aux12_5 + 2'aux12_6 + -4'c5_0 + -2'c13_0 + -2'aux9_2 + -2'aux9_4 + -2'aux9_7 + -2'aux10_2 + -2'aux10_4 + -2'aux10_7 + aux11_0 + aux11_1 + -1'aux11_2 + aux11_3 + -1'aux11_4 + aux11_5 + aux11_6 + -1'aux11_7 + 2'c15_0 + -1'c14_0 = -4
invariant :out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c18_0 = 0
invariant :-4'out1_0 + -4'out1_1 + -4'out1_2 + -4'out1_3 + -4'out1_4 + -4'out1_5 + -4'out1_6 + -4'out1_7 + 2'c20_0 + 4'c18_0 + 4'c19_0 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + -1'aux16_0 + -1'aux16_1 + -1'aux16_2 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 + 4'c9_0 + -4'aux7_0 + -4'aux7_1 + -4'aux7_2 + -4'aux7_3 + -4'aux7_4 + -4'aux7_5 + -4'aux7_6 + -4'aux7_7 + -12'c7_0 + 4'in2_0 + 4'in2_1 + 4'in2_2 + 4'in2_3 + 4'in2_4 + 4'in2_5 + 4'in2_6 + 4'in2_7 + -12'in1_0 + -12'in1_1 + -12'in1_2 + -12'in1_3 + -12'in1_4 + -12'in1_5 + -12'in1_6 + -12'in1_7 + 12'c5_0 + -2'aux10_0 + -2'aux10_1 + -2'aux10_2 + -2'aux10_3 + -2'aux10_4 + -2'aux10_5 + -2'aux10_6 + -2'aux10_7 + 2'c15_0 = -8
invariant :c20_0 + c18_0 + 2'c19_0 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'c15_0 = 0
invariant :-2'out8_2 + -2'out8_4 + -2'out8_7 + -2'out7_2 + -2'out7_4 + -2'out7_7 + -2'out6_2 + -2'out6_4 + -2'out6_7 + -2'out5_2 + -2'out5_4 + -2'out5_7 + -2'out4_2 + -2'out4_4 + -2'out4_7 + -2'out3_2 + -2'out3_4 + -2'out3_7 + -2'out2_2 + -2'out2_4 + -2'out2_7 + 4'out1_0 + 4'out1_1 + 2'out1_2 + 4'out1_3 + 2'out1_4 + 4'out1_5 + 4'out1_6 + 2'out1_7 + -2'c18_0 + -2'aux13_2 + -2'aux13_4 + -2'aux13_7 + 2'aux15_0 + 2'aux15_1 + 2'aux15_3 + 2'aux15_5 + 2'aux15_6 + -1'aux14_0 + -1'aux14_1 + -3'aux14_2 + -1'aux14_3 + -3'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + aux16_3 + -1'aux16_4 + aux16_5 + aux16_6 + -1'aux16_7 + 2'c12_0 + -2'aux5_2 + -2'aux5_4 + -2'aux5_7 + -2'aux8_2 + -2'aux8_4 + -2'aux8_7 + 2'aux6_0 + 2'aux6_1 + 2'aux6_3 + 2'aux6_5 + 2'aux6_6 + -2'aux7_2 + -2'aux7_4 + -2'aux7_7 + -2'in4_2 + -2'in4_4 + -2'in4_7 + -2'in3_2 + -2'in3_4 + -2'in3_7 + -2'in2_2 + -2'in2_4 + -2'in2_7 + 4'in1_0 + 4'in1_1 + 2'in1_2 + 4'in1_3 + 2'in1_4 + 4'in1_5 + 4'in1_6 + 2'in1_7 + 2'aux12_0 + 2'aux12_1 + 2'aux12_3 + 2'aux12_5 + 2'aux12_6 + -4'c5_0 + -2'aux9_2 + -2'aux9_4 + -2'aux9_7 + -2'aux10_2 + -2'aux10_4 + -2'aux10_7 + -2'aux11_2 + -2'aux11_4 + -2'aux11_7 + 2'c15_0 = -4
invariant :-2'out8_0 + -2'out8_1 + -4'out8_2 + -4'out8_4 + -2'out8_6 + -4'out8_7 + -2'out7_2 + 2'out7_3 + -2'out7_4 + 2'out7_5 + -2'out7_7 + -2'out6_0 + -2'out6_1 + -4'out6_2 + -4'out6_4 + -2'out6_6 + -4'out6_7 + -2'out5_2 + 2'out5_3 + -2'out5_4 + 2'out5_5 + -2'out5_7 + -2'out4_2 + 2'out4_3 + -2'out4_4 + 2'out4_5 + -2'out4_7 + -2'out3_2 + 2'out3_3 + -2'out3_4 + 2'out3_5 + -2'out3_7 + -2'out2_0 + -2'out2_1 + -4'out2_2 + -4'out2_4 + -2'out2_6 + -4'out2_7 + 6'out1_0 + 6'out1_1 + 4'out1_2 + 8'out1_3 + 4'out1_4 + 8'out1_5 + 6'out1_6 + 4'out1_7 + -2'c20_0 + -4'c18_0 + -4'c19_0 + -2'aux13_0 + -2'aux13_1 + -4'aux13_2 + -4'aux13_4 + -2'aux13_6 + -4'aux13_7 + 2'aux15_0 + 2'aux15_1 + 4'aux15_3 + 4'aux15_5 + 2'aux15_6 + -1'aux14_0 + -1'aux14_1 + -3'aux14_2 + aux14_3 + -3'aux14_4 + aux14_5 + -1'aux14_6 + -3'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + 3'aux16_3 + -1'aux16_4 + 3'aux16_5 + aux16_6 + -1'aux16_7 + -2'aux5_2 + 2'aux5_3 + -2'aux5_4 + 2'aux5_5 + -2'aux5_7 + -2'aux8_0 + -2'aux8_1 + -4'aux8_2 + -4'aux8_4 + -2'aux8_6 + -4'aux8_7 + 2'aux6_0 + 2'aux6_1 + 4'aux6_3 + 4'aux6_5 + 2'aux6_6 + -2'aux7_2 + 2'aux7_3 + -2'aux7_4 + 2'aux7_5 + -2'aux7_7 + -2'in4_2 + 2'in4_3 + -2'in4_4 + 2'in4_5 + -2'in4_7 + 4'c7_0 + -2'in3_2 + 2'in3_3 + -2'in3_4 + 2'in3_5 + -2'in3_7 + -4'in2_0 + -4'in2_1 + -6'in2_2 + -2'in2_3 + -6'in2_4 + -2'in2_5 + -4'in2_6 + -6'in2_7 + 8'in1_0 + 8'in1_1 + 6'in1_2 + 10'in1_3 + 6'in1_4 + 10'in1_5 + 8'in1_6 + 6'in1_7 + 2'aux12_0 + 2'aux12_1 + 4'aux12_3 + 4'aux12_5 + 2'aux12_6 + -8'c5_0 + -4'c13_0 + -2'aux9_2 + 2'aux9_3 + -2'aux9_4 + 2'aux9_5 + -2'aux9_7 + -2'aux10_2 + 2'aux10_3 + -2'aux10_4 + 2'aux10_5 + -2'aux10_7 + -2'aux11_2 + 2'aux11_3 + -2'aux11_4 + 2'aux11_5 + -2'aux11_7 + 2'c15_0 = -4
invariant :2'out8_2 + 2'out8_4 + 2'out8_7 + 2'out7_2 + 2'out7_4 + 2'out7_7 + 2'out6_2 + 2'out6_4 + 2'out6_7 + 2'out5_2 + 2'out5_4 + 2'out5_7 + 2'out4_2 + 2'out4_4 + 2'out4_7 + 2'out3_2 + 2'out3_4 + 2'out3_7 + 2'out2_2 + 2'out2_4 + 2'out2_7 + 2'out1_2 + 2'out1_4 + 2'out1_7 + -2'c20_0 + -2'c18_0 + -4'c19_0 + 2'aux13_2 + 2'aux13_4 + 2'aux13_7 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_5 + -2'aux15_6 + 3'aux14_0 + 3'aux14_1 + 5'aux14_2 + 3'aux14_3 + 5'aux14_4 + 3'aux14_5 + 3'aux14_6 + 5'aux14_7 + -1'aux16_0 + -1'aux16_1 + aux16_2 + -1'aux16_3 + aux16_4 + -1'aux16_5 + -1'aux16_6 + aux16_7 + 2'aux5_2 + 2'aux5_4 + 2'aux5_7 + 2'aux8_0 + 2'aux8_1 + 4'aux8_2 + 2'aux8_3 + 4'aux8_4 + 2'aux8_5 + 2'aux8_6 + 4'aux8_7 + -2'aux6_0 + -2'aux6_1 + -2'aux6_3 + -2'aux6_5 + -2'aux6_6 + 2'aux7_2 + 2'aux7_4 + 2'aux7_7 + 2'in4_2 + 2'in4_4 + 2'in4_7 + -4'c7_0 + 2'in3_2 + 2'in3_4 + 2'in3_7 + 4'in2_0 + 4'in2_1 + 6'in2_2 + 4'in2_3 + 6'in2_4 + 4'in2_5 + 4'in2_6 + 6'in2_7 + -8'in1_0 + -8'in1_1 + -6'in1_2 + -8'in1_3 + -6'in1_4 + -8'in1_5 + -8'in1_6 + -6'in1_7 + -2'aux12_0 + -2'aux12_1 + -2'aux12_3 + -2'aux12_5 + -2'aux12_6 + 8'c5_0 + 4'c13_0 + 2'aux9_2 + 2'aux9_4 + 2'aux9_7 + 2'aux10_2 + 2'aux10_4 + 2'aux10_7 + 2'aux11_2 + 2'aux11_4 + 2'aux11_7 + -2'c15_0 + 4'c14_0 = 12
invariant :2'out8_2 + 2'out8_4 + 2'out8_7 + 2'out7_2 + 2'out7_4 + 2'out7_7 + 2'out6_2 + 2'out6_4 + 2'out6_7 + 2'out5_2 + 2'out5_4 + 2'out5_7 + 2'out4_2 + 2'out4_4 + 2'out4_7 + 2'out3_2 + 2'out3_4 + 2'out3_7 + 2'out2_2 + 2'out2_4 + 2'out2_7 + 2'out1_2 + 2'out1_4 + 2'out1_7 + -2'c20_0 + -2'c18_0 + -4'c19_0 + 2'aux13_2 + 2'aux13_4 + 2'aux13_7 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_5 + -2'aux15_6 + 3'aux14_0 + 3'aux14_1 + 5'aux14_2 + 3'aux14_3 + 5'aux14_4 + 3'aux14_5 + 3'aux14_6 + 5'aux14_7 + -1'aux16_0 + -1'aux16_1 + aux16_2 + -1'aux16_3 + aux16_4 + -1'aux16_5 + -1'aux16_6 + aux16_7 + 2'aux5_2 + 2'aux5_4 + 2'aux5_7 + 2'aux8_2 + 2'aux8_4 + 2'aux8_7 + 2'aux6_2 + 2'aux6_4 + 2'aux6_7 + 2'aux7_2 + 2'aux7_4 + 2'aux7_7 + 2'in4_2 + 2'in4_4 + 2'in4_7 + 2'in3_2 + 2'in3_4 + 2'in3_7 + 2'in2_2 + 2'in2_4 + 2'in2_7 + 2'in1_2 + 2'in1_4 + 2'in1_7 + -2'aux12_0 + -2'aux12_1 + -2'aux12_3 + -2'aux12_5 + -2'aux12_6 + 4'c13_0 + 2'aux9_2 + 2'aux9_4 + 2'aux9_7 + 2'aux10_2 + 2'aux10_4 + 2'aux10_7 + 2'aux11_2 + 2'aux11_4 + 2'aux11_7 + -2'c15_0 + 4'c14_0 = 12
invariant :-1'in1_0 + -1'in1_1 + -1'in1_2 + -1'in1_3 + -1'in1_4 + -1'in1_5 + -1'in1_6 + -1'in1_7 + c6_0 + 2'c5_0 = 0
invariant :out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c18_0 + c19_0 = 0
invariant :out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c20_0 + c18_0 + c19_0 = 0
invariant :out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c18_0 = 0
invariant :out8_1 + out7_1 + out6_1 + out5_1 + -1'out4_0 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_1 + out2_1 + out1_0 + 2'out1_1 + out1_2 + out1_3 + out1_4 + out1_5 + out1_6 + out1_7 + -1'c18_0 + aux13_1 + aux15_1 + aux14_1 + aux16_1 + aux5_1 + aux8_1 + aux6_1 + aux7_1 + -1'in4_0 + -1'in4_2 + -1'in4_3 + -1'in4_4 + -1'in4_5 + -1'in4_6 + -1'in4_7 + -1'in3_0 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -1'in3_5 + -1'in3_6 + -1'in3_7 + in2_0 + 2'in2_1 + in2_2 + in2_3 + in2_4 + in2_5 + in2_6 + in2_7 + in1_0 + 2'in1_1 + in1_2 + in1_3 + in1_4 + in1_5 + in1_6 + in1_7 + aux12_1 + aux9_1 + aux10_1 + aux11_1 = 2
invariant :-2'out8_0 + -2'out8_1 + -4'out8_2 + -4'out8_4 + -2'out8_5 + -2'out8_6 + -4'out8_7 + -2'out7_2 + 2'out7_3 + -2'out7_4 + -2'out7_7 + -2'out6_0 + -2'out6_1 + -4'out6_2 + -4'out6_4 + -2'out6_5 + -2'out6_6 + -4'out6_7 + -2'out5_2 + 2'out5_3 + -2'out5_4 + -2'out5_7 + -2'out4_2 + 2'out4_3 + -2'out4_4 + -2'out4_7 + -2'out3_2 + 2'out3_3 + -2'out3_4 + -2'out3_7 + -2'out2_0 + -2'out2_1 + -4'out2_2 + -4'out2_4 + -2'out2_5 + -2'out2_6 + -4'out2_7 + 6'out1_0 + 6'out1_1 + 4'out1_2 + 8'out1_3 + 4'out1_4 + 6'out1_5 + 6'out1_6 + 4'out1_7 + -2'c18_0 + -2'aux13_2 + 2'aux13_3 + -2'aux13_4 + -2'aux13_7 + 2'aux15_0 + 2'aux15_1 + 4'aux15_3 + 2'aux15_5 + 2'aux15_6 + -3'aux14_0 + -3'aux14_1 + -5'aux14_2 + -1'aux14_3 + -5'aux14_4 + -3'aux14_5 + -3'aux14_6 + -5'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + 3'aux16_3 + -1'aux16_4 + aux16_5 + aux16_6 + -1'aux16_7 + -2'aux5_2 + 2'aux5_3 + -2'aux5_4 + -2'aux5_7 + -2'aux8_0 + -2'aux8_1 + -4'aux8_2 + -4'aux8_4 + -2'aux8_5 + -2'aux8_6 + -4'aux8_7 + 2'aux6_0 + 2'aux6_1 + 4'aux6_3 + 2'aux6_5 + 2'aux6_6 + -2'aux7_2 + 2'aux7_3 + -2'aux7_4 + -2'aux7_7 + -2'in4_2 + 2'in4_3 + -2'in4_4 + -2'in4_7 + 4'c7_0 + -2'in3_2 + 2'in3_3 + -2'in3_4 + -2'in3_7 + -4'in2_0 + -4'in2_1 + -6'in2_2 + -2'in2_3 + -6'in2_4 + -4'in2_5 + -4'in2_6 + -6'in2_7 + 8'in1_0 + 8'in1_1 + 6'in1_2 + 10'in1_3 + 6'in1_4 + 8'in1_5 + 8'in1_6 + 6'in1_7 + 2'aux12_0 + 2'aux12_1 + 4'aux12_3 + 2'aux12_5 + 2'aux12_6 + -8'c5_0 + -4'c13_0 + -2'aux9_2 + 2'aux9_3 + -2'aux9_4 + -2'aux9_7 + -2'aux10_2 + 2'aux10_3 + -2'aux10_4 + -2'aux10_7 + -2'aux11_2 + 2'aux11_3 + -2'aux11_4 + -2'aux11_7 + 2'c15_0 + -4'c14_0 = -8
invariant :2'out8_0 + 2'out8_1 + 4'out8_2 + 4'out8_4 + 2'out8_5 + 2'out8_6 + 4'out8_7 + 2'out7_2 + -2'out7_3 + 2'out7_4 + 2'out7_7 + 2'out6_0 + 2'out6_1 + 4'out6_2 + 4'out6_4 + 2'out6_5 + 2'out6_6 + 4'out6_7 + 2'out5_2 + -2'out5_3 + 2'out5_4 + 2'out5_7 + 2'out4_2 + -2'out4_3 + 2'out4_4 + 2'out4_7 + 2'out3_2 + -2'out3_3 + 2'out3_4 + 2'out3_7 + 2'out2_0 + 2'out2_1 + 4'out2_2 + 4'out2_4 + 2'out2_5 + 2'out2_6 + 4'out2_7 + -6'out1_0 + -6'out1_1 + -4'out1_2 + -8'out1_3 + -4'out1_4 + -6'out1_5 + -6'out1_6 + -4'out1_7 + 2'c20_0 + 4'c18_0 + 4'c19_0 + 2'aux13_0 + 2'aux13_1 + 4'aux13_2 + 4'aux13_4 + 2'aux13_5 + 2'aux13_6 + 4'aux13_7 + -2'aux15_0 + -2'aux15_1 + -4'aux15_3 + -2'aux15_5 + -2'aux15_6 + aux14_0 + aux14_1 + 3'aux14_2 + -1'aux14_3 + 3'aux14_4 + aux14_5 + aux14_6 + 3'aux14_7 + -1'aux16_0 + -1'aux16_1 + aux16_2 + -3'aux16_3 + aux16_4 + -1'aux16_5 + -1'aux16_6 + aux16_7 + 2'aux5_2 + -2'aux5_3 + 2'aux5_4 + 2'aux5_7 + 2'aux8_0 + 2'aux8_1 + 4'aux8_2 + 4'aux8_4 + 2'aux8_5 + 2'aux8_6 + 4'aux8_7 + -2'aux6_0 + -2'aux6_1 + -4'aux6_3 + -2'aux6_5 + -2'aux6_6 + 2'aux7_2 + -2'aux7_3 + 2'aux7_4 + 2'aux7_7 + 2'in4_2 + -2'in4_3 + 2'in4_4 + 2'in4_7 + -4'c7_0 + 2'in3_2 + -2'in3_3 + 2'in3_4 + 2'in3_7 + 4'in2_0 + 4'in2_1 + 6'in2_2 + 2'in2_3 + 6'in2_4 + 4'in2_5 + 4'in2_6 + 6'in2_7 + -8'in1_0 + -8'in1_1 + -6'in1_2 + -10'in1_3 + -6'in1_4 + -8'in1_5 + -8'in1_6 + -6'in1_7 + -2'aux12_0 + -2'aux12_1 + -4'aux12_3 + -2'aux12_5 + -2'aux12_6 + 8'c5_0 + 4'c13_0 + 2'aux9_2 + -2'aux9_3 + 2'aux9_4 + 2'aux9_7 + 2'aux10_2 + -2'aux10_3 + 2'aux10_4 + 2'aux10_7 + 2'aux11_2 + -2'aux11_3 + 2'aux11_4 + 2'aux11_7 + -2'c15_0 = 8
invariant :out8_7 + out7_7 + out6_7 + out5_7 + out4_7 + out3_7 + out2_7 + out1_7 + aux13_7 + aux15_7 + aux14_7 + aux16_7 + aux5_7 + aux8_7 + aux6_7 + aux7_7 + in4_7 + in3_7 + in2_7 + in1_7 + aux12_7 + aux9_7 + aux10_7 + aux11_7 = 2
invariant :in3_0 + in3_1 + in3_2 + in3_3 + in3_4 + in3_5 + in3_6 + in3_7 + -1'in1_0 + -1'in1_1 + -1'in1_2 + -1'in1_3 + -1'in1_4 + -1'in1_5 + -1'in1_6 + -1'in1_7 = 0
invariant :-1'out8_1 + -1'out8_6 + -1'out7_1 + -1'out7_6 + -1'out6_1 + -1'out6_6 + -1'out5_1 + -1'out5_6 + out4_0 + out4_2 + out4_3 + out4_4 + out4_5 + out4_7 + -1'out3_1 + -1'out3_6 + -1'out2_1 + -1'out2_6 + -1'out1_0 + -2'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -2'out1_6 + -1'out1_7 + c18_0 + -1'aux13_1 + -1'aux13_6 + -1'aux15_1 + -1'aux15_6 + -1'aux14_1 + -1'aux14_6 + -1'aux16_1 + -1'aux16_6 + aux5_0 + aux5_2 + aux5_3 + aux5_4 + aux5_5 + aux5_7 + -1'aux8_1 + -1'aux8_6 + -1'aux6_1 + -1'aux6_6 + -1'aux7_0 + -2'aux7_1 + -1'aux7_2 + -1'aux7_3 + -1'aux7_4 + -1'aux7_5 + -2'aux7_6 + -1'aux7_7 + in4_0 + in4_2 + in4_3 + in4_4 + in4_5 + in4_7 + -2'c7_0 + in3_0 + in3_2 + in3_3 + in3_4 + in3_5 + in3_7 + -1'in2_0 + -2'in2_1 + -1'in2_2 + -1'in2_3 + -1'in2_4 + -1'in2_5 + -2'in2_6 + -1'in2_7 + -3'in1_0 + -4'in1_1 + -3'in1_2 + -3'in1_3 + -3'in1_4 + -3'in1_5 + -4'in1_6 + -3'in1_7 + -1'aux12_1 + -1'aux12_6 + 4'c5_0 + -1'aux9_1 + -1'aux9_6 + -1'aux10_1 + -1'aux10_6 + -1'aux11_1 + -1'aux11_6 = -4
invariant :in4_0 + in4_1 + in4_2 + in4_3 + in4_4 + in4_5 + in4_6 + in4_7 + -1'in2_0 + -1'in2_1 + -1'in2_2 + -1'in2_3 + -1'in2_4 + -1'in2_5 + -1'in2_6 + -1'in2_7 = 0
invariant :out8_2 + out7_2 + out6_2 + out5_2 + out4_2 + out3_2 + out2_2 + out1_2 + aux13_2 + aux15_2 + aux14_2 + aux16_2 + aux5_2 + aux8_2 + aux6_2 + aux7_2 + in4_2 + in3_2 + in2_2 + in1_2 + aux12_2 + aux9_2 + aux10_2 + aux11_2 = 2
invariant :out5_0 + out5_1 + out5_2 + out5_3 + out5_4 + out5_5 + out5_6 + out5_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c18_0 + c19_0 = 0
invariant :out8_6 + out7_6 + out6_6 + out5_6 + out4_6 + out3_6 + out2_6 + out1_6 + aux13_6 + aux15_6 + aux14_6 + aux16_6 + aux5_6 + aux8_6 + aux6_6 + aux7_6 + in4_6 + in3_6 + in2_6 + in1_6 + aux12_6 + aux9_6 + aux10_6 + aux11_6 = 2
invariant :4'out1_0 + 4'out1_1 + 4'out1_2 + 4'out1_3 + 4'out1_4 + 4'out1_5 + 4'out1_6 + 4'out1_7 + -2'c20_0 + -4'c18_0 + -4'c19_0 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + 2'c110_0 + 2'aux7_0 + 2'aux7_1 + 2'aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_5 + 2'aux7_6 + 2'aux7_7 + 4'c7_0 + 4'in1_0 + 4'in1_1 + 4'in1_2 + 4'in1_3 + 4'in1_4 + 4'in1_5 + 4'in1_6 + 4'in1_7 + -4'c5_0 + 2'aux10_0 + 2'aux10_1 + 2'aux10_2 + 2'aux10_3 + 2'aux10_4 + 2'aux10_5 + 2'aux10_6 + 2'aux10_7 + -2'c15_0 = 8
invariant :-1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + 2'c16_0 + 2'c15_0 = 0
invariant :out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c20_0 + c18_0 + c19_0 = 0
invariant :c8_0 + 2'c7_0 + -1'in2_0 + -1'in2_1 + -1'in2_2 + -1'in2_3 + -1'in2_4 + -1'in2_5 + -1'in2_6 + -1'in2_7 + 2'in1_0 + 2'in1_1 + 2'in1_2 + 2'in1_3 + 2'in1_4 + 2'in1_5 + 2'in1_6 + 2'in1_7 + -2'c5_0 = 0
invariant :4'out8_2 + 4'out8_4 + 4'out8_7 + 4'out7_2 + 4'out7_4 + 4'out7_7 + 4'out6_2 + 4'out6_4 + 4'out6_7 + 4'out5_2 + 4'out5_4 + 4'out5_7 + 4'out4_2 + 4'out4_4 + 4'out4_7 + 4'out3_2 + 4'out3_4 + 4'out3_7 + 4'out2_2 + 4'out2_4 + 4'out2_7 + -8'out1_0 + -8'out1_1 + -4'out1_2 + -8'out1_3 + -4'out1_4 + -8'out1_5 + -8'out1_6 + -4'out1_7 + 4'c18_0 + 4'aux13_2 + 4'aux13_4 + 4'aux13_7 + -4'aux15_0 + -4'aux15_1 + -4'aux15_3 + -4'aux15_5 + -4'aux15_6 + 3'aux14_0 + 3'aux14_1 + 7'aux14_2 + 3'aux14_3 + 7'aux14_4 + 3'aux14_5 + 3'aux14_6 + 7'aux14_7 + -3'aux16_0 + -3'aux16_1 + aux16_2 + -3'aux16_3 + aux16_4 + -3'aux16_5 + -3'aux16_6 + aux16_7 + 4'c11_0 + 4'aux5_2 + 4'aux5_4 + 4'aux5_7 + 4'aux8_2 + 4'aux8_4 + 4'aux8_7 + -4'aux6_0 + -4'aux6_1 + -4'aux6_3 + -4'aux6_5 + -4'aux6_6 + 4'aux7_2 + 4'aux7_4 + 4'aux7_7 + 4'in4_2 + 4'in4_4 + 4'in4_7 + 4'in3_2 + 4'in3_4 + 4'in3_7 + 4'in2_2 + 4'in2_4 + 4'in2_7 + -8'in1_0 + -8'in1_1 + -4'in1_2 + -8'in1_3 + -4'in1_4 + -8'in1_5 + -8'in1_6 + -4'in1_7 + -4'aux12_0 + -4'aux12_1 + -4'aux12_3 + -4'aux12_5 + -4'aux12_6 + 8'c5_0 + 4'c13_0 + 4'aux9_2 + 4'aux9_4 + 4'aux9_7 + -2'aux10_0 + -2'aux10_1 + 2'aux10_2 + -2'aux10_3 + 2'aux10_4 + -2'aux10_5 + -2'aux10_6 + 2'aux10_7 + 4'aux11_2 + 4'aux11_4 + 4'aux11_7 + -2'c15_0 + 4'c14_0 = 8
invariant :out8_0 + out8_1 + 2'out8_2 + 2'out8_4 + out8_6 + 2'out8_7 + out7_2 + -1'out7_3 + out7_4 + -1'out7_5 + out7_7 + out6_0 + out6_1 + 2'out6_2 + 2'out6_4 + out6_6 + 2'out6_7 + out5_2 + -1'out5_3 + out5_4 + -1'out5_5 + out5_7 + out4_2 + -1'out4_3 + out4_4 + -1'out4_5 + out4_7 + out3_2 + -1'out3_3 + out3_4 + -1'out3_5 + out3_7 + out2_0 + out2_1 + 2'out2_2 + 2'out2_4 + out2_6 + 2'out2_7 + out1_0 + out1_1 + 2'out1_2 + 2'out1_4 + out1_6 + 2'out1_7 + -1'c20_0 + -2'c18_0 + -2'c19_0 + aux13_0 + aux13_1 + 2'aux13_2 + 2'aux13_4 + aux13_6 + 2'aux13_7 + -1'aux15_0 + -1'aux15_1 + -2'aux15_3 + -2'aux15_5 + -1'aux15_6 + 2'aux14_0 + 2'aux14_1 + 3'aux14_2 + aux14_3 + 3'aux14_4 + aux14_5 + 2'aux14_6 + 3'aux14_7 + aux16_2 + -1'aux16_3 + aux16_4 + -1'aux16_5 + aux16_7 + aux5_2 + -1'aux5_3 + aux5_4 + -1'aux5_5 + aux5_7 + aux8_0 + aux8_1 + 2'aux8_2 + 2'aux8_4 + aux8_6 + 2'aux8_7 + -1'aux6_0 + -1'aux6_1 + -2'aux6_3 + -2'aux6_5 + -1'aux6_6 + 2'aux7_0 + 2'aux7_1 + 3'aux7_2 + aux7_3 + 3'aux7_4 + aux7_5 + 2'aux7_6 + 3'aux7_7 + in4_2 + -1'in4_3 + in4_4 + -1'in4_5 + in4_7 + 2'c7_0 + in3_2 + -1'in3_3 + in3_4 + -1'in3_5 + in3_7 + 2'in2_0 + 2'in2_1 + 3'in2_2 + in2_3 + 3'in2_4 + in2_5 + 2'in2_6 + 3'in2_7 + in1_2 + -1'in1_3 + in1_4 + -1'in1_5 + in1_7 + -1'aux12_0 + -1'aux12_1 + -2'aux12_3 + -2'aux12_5 + -1'aux12_6 + 2'c13_0 + aux9_0 + aux9_1 + 2'aux9_2 + 2'aux9_4 + aux9_6 + 2'aux9_7 + aux10_0 + aux10_1 + 2'aux10_2 + 2'aux10_4 + aux10_6 + 2'aux10_7 + aux11_2 + -1'aux11_3 + aux11_4 + -1'aux11_5 + aux11_7 + -2'c15_0 + c14_0 = 10
invariant :out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 = 0
invariant :c20_0 + 2'c18_0 + 2'c19_0 + 2'c17_0 + -1'aux16_0 + -1'aux16_1 + -1'aux16_2 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 = 0
FORMULA PermAdmissibility-COL-02-ReachabilityCardinality-14 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1024 rows 208 cols
invariant :-2'out8_2 + -2'out8_7 + -2'out7_2 + -2'out7_7 + -2'out6_2 + -2'out6_7 + -2'out5_2 + -2'out5_7 + -2'out4_2 + -2'out4_7 + -2'out3_2 + -2'out3_7 + -2'out2_2 + -2'out2_7 + -2'out1_2 + -2'out1_7 + -2'aux13_2 + -2'aux13_7 + -2'aux15_2 + -2'aux15_7 + -1'aux14_0 + -1'aux14_1 + -3'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + -1'aux16_7 + -2'aux5_2 + -2'aux5_7 + -2'aux8_2 + -2'aux8_7 + -2'aux6_2 + -2'aux6_7 + -2'aux7_2 + -2'aux7_7 + -2'in4_2 + -2'in4_7 + -2'in3_2 + -2'in3_7 + -2'in2_2 + -2'in2_7 + -2'in1_2 + -2'in1_7 + 2'aux12_0 + 2'aux12_1 + 2'aux12_3 + 2'aux12_4 + 2'aux12_5 + 2'aux12_6 + -4'c13_0 + -2'aux9_2 + -2'aux9_7 + -2'aux10_2 + -2'aux10_7 + -2'aux11_2 + -2'aux11_7 + -2'c15_0 + -4'c14_0 = -8
invariant :-2'out8_2 + -2'out8_4 + -2'out8_7 + -2'out7_2 + -2'out7_4 + -2'out7_7 + -2'out6_2 + -2'out6_4 + -2'out6_7 + -2'out5_2 + -2'out5_4 + -2'out5_7 + -2'out4_2 + -2'out4_4 + -2'out4_7 + -2'out3_2 + -2'out3_4 + -2'out3_7 + -2'out2_2 + -2'out2_4 + -2'out2_7 + 4'out1_0 + 4'out1_1 + 2'out1_2 + 4'out1_3 + 2'out1_4 + 4'out1_5 + 4'out1_6 + 2'out1_7 + -2'c18_0 + -2'aux13_2 + -2'aux13_4 + -2'aux13_7 + 2'aux15_0 + 2'aux15_1 + 2'aux15_3 + 2'aux15_5 + 2'aux15_6 + -1'aux14_0 + -1'aux14_1 + -3'aux14_2 + -1'aux14_3 + -3'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + aux16_3 + -1'aux16_4 + aux16_5 + aux16_6 + -1'aux16_7 + -2'aux5_2 + -2'aux5_4 + -2'aux5_7 + -2'aux8_2 + -2'aux8_4 + -2'aux8_7 + 2'aux6_0 + 2'aux6_1 + 2'aux6_3 + 2'aux6_5 + 2'aux6_6 + -2'aux7_2 + -2'aux7_4 + -2'aux7_7 + -2'in4_2 + -2'in4_4 + -2'in4_7 + -2'in3_2 + -2'in3_4 + -2'in3_7 + -2'in2_2 + -2'in2_4 + -2'in2_7 + 4'in1_0 + 4'in1_1 + 2'in1_2 + 4'in1_3 + 2'in1_4 + 4'in1_5 + 4'in1_6 + 2'in1_7 + 2'aux12_0 + 2'aux12_1 + 2'aux12_3 + 2'aux12_5 + 2'aux12_6 + -4'c5_0 + -2'c13_0 + -2'aux9_2 + -2'aux9_4 + -2'aux9_7 + -2'aux10_2 + -2'aux10_4 + -2'aux10_7 + aux11_0 + aux11_1 + -1'aux11_2 + aux11_3 + -1'aux11_4 + aux11_5 + aux11_6 + -1'aux11_7 + 2'c15_0 + -1'c14_0 = -4
invariant :out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c18_0 = 0
invariant :-4'out1_0 + -4'out1_1 + -4'out1_2 + -4'out1_3 + -4'out1_4 + -4'out1_5 + -4'out1_6 + -4'out1_7 + 2'c20_0 + 4'c18_0 + 4'c19_0 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + -1'aux16_0 + -1'aux16_1 + -1'aux16_2 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 + 4'c9_0 + -4'aux7_0 + -4'aux7_1 + -4'aux7_2 + -4'aux7_3 + -4'aux7_4 + -4'aux7_5 + -4'aux7_6 + -4'aux7_7 + -12'c7_0 + 4'in2_0 + 4'in2_1 + 4'in2_2 + 4'in2_3 + 4'in2_4 + 4'in2_5 + 4'in2_6 + 4'in2_7 + -12'in1_0 + -12'in1_1 + -12'in1_2 + -12'in1_3 + -12'in1_4 + -12'in1_5 + -12'in1_6 + -12'in1_7 + 12'c5_0 + -2'aux10_0 + -2'aux10_1 + -2'aux10_2 + -2'aux10_3 + -2'aux10_4 + -2'aux10_5 + -2'aux10_6 + -2'aux10_7 + 2'c15_0 = -8
invariant :c20_0 + c18_0 + 2'c19_0 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + 2'c15_0 = 0
invariant :-2'out8_2 + -2'out8_4 + -2'out8_7 + -2'out7_2 + -2'out7_4 + -2'out7_7 + -2'out6_2 + -2'out6_4 + -2'out6_7 + -2'out5_2 + -2'out5_4 + -2'out5_7 + -2'out4_2 + -2'out4_4 + -2'out4_7 + -2'out3_2 + -2'out3_4 + -2'out3_7 + -2'out2_2 + -2'out2_4 + -2'out2_7 + 4'out1_0 + 4'out1_1 + 2'out1_2 + 4'out1_3 + 2'out1_4 + 4'out1_5 + 4'out1_6 + 2'out1_7 + -2'c18_0 + -2'aux13_2 + -2'aux13_4 + -2'aux13_7 + 2'aux15_0 + 2'aux15_1 + 2'aux15_3 + 2'aux15_5 + 2'aux15_6 + -1'aux14_0 + -1'aux14_1 + -3'aux14_2 + -1'aux14_3 + -3'aux14_4 + -1'aux14_5 + -1'aux14_6 + -3'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + aux16_3 + -1'aux16_4 + aux16_5 + aux16_6 + -1'aux16_7 + 2'c12_0 + -2'aux5_2 + -2'aux5_4 + -2'aux5_7 + -2'aux8_2 + -2'aux8_4 + -2'aux8_7 + 2'aux6_0 + 2'aux6_1 + 2'aux6_3 + 2'aux6_5 + 2'aux6_6 + -2'aux7_2 + -2'aux7_4 + -2'aux7_7 + -2'in4_2 + -2'in4_4 + -2'in4_7 + -2'in3_2 + -2'in3_4 + -2'in3_7 + -2'in2_2 + -2'in2_4 + -2'in2_7 + 4'in1_0 + 4'in1_1 + 2'in1_2 + 4'in1_3 + 2'in1_4 + 4'in1_5 + 4'in1_6 + 2'in1_7 + 2'aux12_0 + 2'aux12_1 + 2'aux12_3 + 2'aux12_5 + 2'aux12_6 + -4'c5_0 + -2'aux9_2 + -2'aux9_4 + -2'aux9_7 + -2'aux10_2 + -2'aux10_4 + -2'aux10_7 + -2'aux11_2 + -2'aux11_4 + -2'aux11_7 + 2'c15_0 = -4
invariant :-2'out8_0 + -2'out8_1 + -4'out8_2 + -4'out8_4 + -2'out8_6 + -4'out8_7 + -2'out7_2 + 2'out7_3 + -2'out7_4 + 2'out7_5 + -2'out7_7 + -2'out6_0 + -2'out6_1 + -4'out6_2 + -4'out6_4 + -2'out6_6 + -4'out6_7 + -2'out5_2 + 2'out5_3 + -2'out5_4 + 2'out5_5 + -2'out5_7 + -2'out4_2 + 2'out4_3 + -2'out4_4 + 2'out4_5 + -2'out4_7 + -2'out3_2 + 2'out3_3 + -2'out3_4 + 2'out3_5 + -2'out3_7 + -2'out2_0 + -2'out2_1 + -4'out2_2 + -4'out2_4 + -2'out2_6 + -4'out2_7 + 6'out1_0 + 6'out1_1 + 4'out1_2 + 8'out1_3 + 4'out1_4 + 8'out1_5 + 6'out1_6 + 4'out1_7 + -2'c20_0 + -4'c18_0 + -4'c19_0 + -2'aux13_0 + -2'aux13_1 + -4'aux13_2 + -4'aux13_4 + -2'aux13_6 + -4'aux13_7 + 2'aux15_0 + 2'aux15_1 + 4'aux15_3 + 4'aux15_5 + 2'aux15_6 + -1'aux14_0 + -1'aux14_1 + -3'aux14_2 + aux14_3 + -3'aux14_4 + aux14_5 + -1'aux14_6 + -3'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + 3'aux16_3 + -1'aux16_4 + 3'aux16_5 + aux16_6 + -1'aux16_7 + -2'aux5_2 + 2'aux5_3 + -2'aux5_4 + 2'aux5_5 + -2'aux5_7 + -2'aux8_0 + -2'aux8_1 + -4'aux8_2 + -4'aux8_4 + -2'aux8_6 + -4'aux8_7 + 2'aux6_0 + 2'aux6_1 + 4'aux6_3 + 4'aux6_5 + 2'aux6_6 + -2'aux7_2 + 2'aux7_3 + -2'aux7_4 + 2'aux7_5 + -2'aux7_7 + -2'in4_2 + 2'in4_3 + -2'in4_4 + 2'in4_5 + -2'in4_7 + 4'c7_0 + -2'in3_2 + 2'in3_3 + -2'in3_4 + 2'in3_5 + -2'in3_7 + -4'in2_0 + -4'in2_1 + -6'in2_2 + -2'in2_3 + -6'in2_4 + -2'in2_5 + -4'in2_6 + -6'in2_7 + 8'in1_0 + 8'in1_1 + 6'in1_2 + 10'in1_3 + 6'in1_4 + 10'in1_5 + 8'in1_6 + 6'in1_7 + 2'aux12_0 + 2'aux12_1 + 4'aux12_3 + 4'aux12_5 + 2'aux12_6 + -8'c5_0 + -4'c13_0 + -2'aux9_2 + 2'aux9_3 + -2'aux9_4 + 2'aux9_5 + -2'aux9_7 + -2'aux10_2 + 2'aux10_3 + -2'aux10_4 + 2'aux10_5 + -2'aux10_7 + -2'aux11_2 + 2'aux11_3 + -2'aux11_4 + 2'aux11_5 + -2'aux11_7 + 2'c15_0 = -4
invariant :2'out8_2 + 2'out8_4 + 2'out8_7 + 2'out7_2 + 2'out7_4 + 2'out7_7 + 2'out6_2 + 2'out6_4 + 2'out6_7 + 2'out5_2 + 2'out5_4 + 2'out5_7 + 2'out4_2 + 2'out4_4 + 2'out4_7 + 2'out3_2 + 2'out3_4 + 2'out3_7 + 2'out2_2 + 2'out2_4 + 2'out2_7 + 2'out1_2 + 2'out1_4 + 2'out1_7 + -2'c20_0 + -2'c18_0 + -4'c19_0 + 2'aux13_2 + 2'aux13_4 + 2'aux13_7 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_5 + -2'aux15_6 + 3'aux14_0 + 3'aux14_1 + 5'aux14_2 + 3'aux14_3 + 5'aux14_4 + 3'aux14_5 + 3'aux14_6 + 5'aux14_7 + -1'aux16_0 + -1'aux16_1 + aux16_2 + -1'aux16_3 + aux16_4 + -1'aux16_5 + -1'aux16_6 + aux16_7 + 2'aux5_2 + 2'aux5_4 + 2'aux5_7 + 2'aux8_0 + 2'aux8_1 + 4'aux8_2 + 2'aux8_3 + 4'aux8_4 + 2'aux8_5 + 2'aux8_6 + 4'aux8_7 + -2'aux6_0 + -2'aux6_1 + -2'aux6_3 + -2'aux6_5 + -2'aux6_6 + 2'aux7_2 + 2'aux7_4 + 2'aux7_7 + 2'in4_2 + 2'in4_4 + 2'in4_7 + -4'c7_0 + 2'in3_2 + 2'in3_4 + 2'in3_7 + 4'in2_0 + 4'in2_1 + 6'in2_2 + 4'in2_3 + 6'in2_4 + 4'in2_5 + 4'in2_6 + 6'in2_7 + -8'in1_0 + -8'in1_1 + -6'in1_2 + -8'in1_3 + -6'in1_4 + -8'in1_5 + -8'in1_6 + -6'in1_7 + -2'aux12_0 + -2'aux12_1 + -2'aux12_3 + -2'aux12_5 + -2'aux12_6 + 8'c5_0 + 4'c13_0 + 2'aux9_2 + 2'aux9_4 + 2'aux9_7 + 2'aux10_2 + 2'aux10_4 + 2'aux10_7 + 2'aux11_2 + 2'aux11_4 + 2'aux11_7 + -2'c15_0 + 4'c14_0 = 12
invariant :2'out8_2 + 2'out8_4 + 2'out8_7 + 2'out7_2 + 2'out7_4 + 2'out7_7 + 2'out6_2 + 2'out6_4 + 2'out6_7 + 2'out5_2 + 2'out5_4 + 2'out5_7 + 2'out4_2 + 2'out4_4 + 2'out4_7 + 2'out3_2 + 2'out3_4 + 2'out3_7 + 2'out2_2 + 2'out2_4 + 2'out2_7 + 2'out1_2 + 2'out1_4 + 2'out1_7 + -2'c20_0 + -2'c18_0 + -4'c19_0 + 2'aux13_2 + 2'aux13_4 + 2'aux13_7 + -2'aux15_0 + -2'aux15_1 + -2'aux15_3 + -2'aux15_5 + -2'aux15_6 + 3'aux14_0 + 3'aux14_1 + 5'aux14_2 + 3'aux14_3 + 5'aux14_4 + 3'aux14_5 + 3'aux14_6 + 5'aux14_7 + -1'aux16_0 + -1'aux16_1 + aux16_2 + -1'aux16_3 + aux16_4 + -1'aux16_5 + -1'aux16_6 + aux16_7 + 2'aux5_2 + 2'aux5_4 + 2'aux5_7 + 2'aux8_2 + 2'aux8_4 + 2'aux8_7 + 2'aux6_2 + 2'aux6_4 + 2'aux6_7 + 2'aux7_2 + 2'aux7_4 + 2'aux7_7 + 2'in4_2 + 2'in4_4 + 2'in4_7 + 2'in3_2 + 2'in3_4 + 2'in3_7 + 2'in2_2 + 2'in2_4 + 2'in2_7 + 2'in1_2 + 2'in1_4 + 2'in1_7 + -2'aux12_0 + -2'aux12_1 + -2'aux12_3 + -2'aux12_5 + -2'aux12_6 + 4'c13_0 + 2'aux9_2 + 2'aux9_4 + 2'aux9_7 + 2'aux10_2 + 2'aux10_4 + 2'aux10_7 + 2'aux11_2 + 2'aux11_4 + 2'aux11_7 + -2'c15_0 + 4'c14_0 = 12
invariant :-1'in1_0 + -1'in1_1 + -1'in1_2 + -1'in1_3 + -1'in1_4 + -1'in1_5 + -1'in1_6 + -1'in1_7 + c6_0 + 2'c5_0 = 0
invariant :out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c18_0 + c19_0 = 0
invariant :out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c20_0 + c18_0 + c19_0 = 0
invariant :out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c18_0 = 0
invariant :out8_1 + out7_1 + out6_1 + out5_1 + -1'out4_0 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out3_1 + out2_1 + out1_0 + 2'out1_1 + out1_2 + out1_3 + out1_4 + out1_5 + out1_6 + out1_7 + -1'c18_0 + aux13_1 + aux15_1 + aux14_1 + aux16_1 + aux5_1 + aux8_1 + aux6_1 + aux7_1 + -1'in4_0 + -1'in4_2 + -1'in4_3 + -1'in4_4 + -1'in4_5 + -1'in4_6 + -1'in4_7 + -1'in3_0 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -1'in3_5 + -1'in3_6 + -1'in3_7 + in2_0 + 2'in2_1 + in2_2 + in2_3 + in2_4 + in2_5 + in2_6 + in2_7 + in1_0 + 2'in1_1 + in1_2 + in1_3 + in1_4 + in1_5 + in1_6 + in1_7 + aux12_1 + aux9_1 + aux10_1 + aux11_1 = 2
invariant :-2'out8_0 + -2'out8_1 + -4'out8_2 + -4'out8_4 + -2'out8_5 + -2'out8_6 + -4'out8_7 + -2'out7_2 + 2'out7_3 + -2'out7_4 + -2'out7_7 + -2'out6_0 + -2'out6_1 + -4'out6_2 + -4'out6_4 + -2'out6_5 + -2'out6_6 + -4'out6_7 + -2'out5_2 + 2'out5_3 + -2'out5_4 + -2'out5_7 + -2'out4_2 + 2'out4_3 + -2'out4_4 + -2'out4_7 + -2'out3_2 + 2'out3_3 + -2'out3_4 + -2'out3_7 + -2'out2_0 + -2'out2_1 + -4'out2_2 + -4'out2_4 + -2'out2_5 + -2'out2_6 + -4'out2_7 + 6'out1_0 + 6'out1_1 + 4'out1_2 + 8'out1_3 + 4'out1_4 + 6'out1_5 + 6'out1_6 + 4'out1_7 + -2'c18_0 + -2'aux13_2 + 2'aux13_3 + -2'aux13_4 + -2'aux13_7 + 2'aux15_0 + 2'aux15_1 + 4'aux15_3 + 2'aux15_5 + 2'aux15_6 + -3'aux14_0 + -3'aux14_1 + -5'aux14_2 + -1'aux14_3 + -5'aux14_4 + -3'aux14_5 + -3'aux14_6 + -5'aux14_7 + aux16_0 + aux16_1 + -1'aux16_2 + 3'aux16_3 + -1'aux16_4 + aux16_5 + aux16_6 + -1'aux16_7 + -2'aux5_2 + 2'aux5_3 + -2'aux5_4 + -2'aux5_7 + -2'aux8_0 + -2'aux8_1 + -4'aux8_2 + -4'aux8_4 + -2'aux8_5 + -2'aux8_6 + -4'aux8_7 + 2'aux6_0 + 2'aux6_1 + 4'aux6_3 + 2'aux6_5 + 2'aux6_6 + -2'aux7_2 + 2'aux7_3 + -2'aux7_4 + -2'aux7_7 + -2'in4_2 + 2'in4_3 + -2'in4_4 + -2'in4_7 + 4'c7_0 + -2'in3_2 + 2'in3_3 + -2'in3_4 + -2'in3_7 + -4'in2_0 + -4'in2_1 + -6'in2_2 + -2'in2_3 + -6'in2_4 + -4'in2_5 + -4'in2_6 + -6'in2_7 + 8'in1_0 + 8'in1_1 + 6'in1_2 + 10'in1_3 + 6'in1_4 + 8'in1_5 + 8'in1_6 + 6'in1_7 + 2'aux12_0 + 2'aux12_1 + 4'aux12_3 + 2'aux12_5 + 2'aux12_6 + -8'c5_0 + -4'c13_0 + -2'aux9_2 + 2'aux9_3 + -2'aux9_4 + -2'aux9_7 + -2'aux10_2 + 2'aux10_3 + -2'aux10_4 + -2'aux10_7 + -2'aux11_2 + 2'aux11_3 + -2'aux11_4 + -2'aux11_7 + 2'c15_0 + -4'c14_0 = -8
invariant :2'out8_0 + 2'out8_1 + 4'out8_2 + 4'out8_4 + 2'out8_5 + 2'out8_6 + 4'out8_7 + 2'out7_2 + -2'out7_3 + 2'out7_4 + 2'out7_7 + 2'out6_0 + 2'out6_1 + 4'out6_2 + 4'out6_4 + 2'out6_5 + 2'out6_6 + 4'out6_7 + 2'out5_2 + -2'out5_3 + 2'out5_4 + 2'out5_7 + 2'out4_2 + -2'out4_3 + 2'out4_4 + 2'out4_7 + 2'out3_2 + -2'out3_3 + 2'out3_4 + 2'out3_7 + 2'out2_0 + 2'out2_1 + 4'out2_2 + 4'out2_4 + 2'out2_5 + 2'out2_6 + 4'out2_7 + -6'out1_0 + -6'out1_1 + -4'out1_2 + -8'out1_3 + -4'out1_4 + -6'out1_5 + -6'out1_6 + -4'out1_7 + 2'c20_0 + 4'c18_0 + 4'c19_0 + 2'aux13_0 + 2'aux13_1 + 4'aux13_2 + 4'aux13_4 + 2'aux13_5 + 2'aux13_6 + 4'aux13_7 + -2'aux15_0 + -2'aux15_1 + -4'aux15_3 + -2'aux15_5 + -2'aux15_6 + aux14_0 + aux14_1 + 3'aux14_2 + -1'aux14_3 + 3'aux14_4 + aux14_5 + aux14_6 + 3'aux14_7 + -1'aux16_0 + -1'aux16_1 + aux16_2 + -3'aux16_3 + aux16_4 + -1'aux16_5 + -1'aux16_6 + aux16_7 + 2'aux5_2 + -2'aux5_3 + 2'aux5_4 + 2'aux5_7 + 2'aux8_0 + 2'aux8_1 + 4'aux8_2 + 4'aux8_4 + 2'aux8_5 + 2'aux8_6 + 4'aux8_7 + -2'aux6_0 + -2'aux6_1 + -4'aux6_3 + -2'aux6_5 + -2'aux6_6 + 2'aux7_2 + -2'aux7_3 + 2'aux7_4 + 2'aux7_7 + 2'in4_2 + -2'in4_3 + 2'in4_4 + 2'in4_7 + -4'c7_0 + 2'in3_2 + -2'in3_3 + 2'in3_4 + 2'in3_7 + 4'in2_0 + 4'in2_1 + 6'in2_2 + 2'in2_3 + 6'in2_4 + 4'in2_5 + 4'in2_6 + 6'in2_7 + -8'in1_0 + -8'in1_1 + -6'in1_2 + -10'in1_3 + -6'in1_4 + -8'in1_5 + -8'in1_6 + -6'in1_7 + -2'aux12_0 + -2'aux12_1 + -4'aux12_3 + -2'aux12_5 + -2'aux12_6 + 8'c5_0 + 4'c13_0 + 2'aux9_2 + -2'aux9_3 + 2'aux9_4 + 2'aux9_7 + 2'aux10_2 + -2'aux10_3 + 2'aux10_4 + 2'aux10_7 + 2'aux11_2 + -2'aux11_3 + 2'aux11_4 + 2'aux11_7 + -2'c15_0 = 8
invariant :out8_7 + out7_7 + out6_7 + out5_7 + out4_7 + out3_7 + out2_7 + out1_7 + aux13_7 + aux15_7 + aux14_7 + aux16_7 + aux5_7 + aux8_7 + aux6_7 + aux7_7 + in4_7 + in3_7 + in2_7 + in1_7 + aux12_7 + aux9_7 + aux10_7 + aux11_7 = 2
invariant :in3_0 + in3_1 + in3_2 + in3_3 + in3_4 + in3_5 + in3_6 + in3_7 + -1'in1_0 + -1'in1_1 + -1'in1_2 + -1'in1_3 + -1'in1_4 + -1'in1_5 + -1'in1_6 + -1'in1_7 = 0
invariant :-1'out8_1 + -1'out8_6 + -1'out7_1 + -1'out7_6 + -1'out6_1 + -1'out6_6 + -1'out5_1 + -1'out5_6 + out4_0 + out4_2 + out4_3 + out4_4 + out4_5 + out4_7 + -1'out3_1 + -1'out3_6 + -1'out2_1 + -1'out2_6 + -1'out1_0 + -2'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -2'out1_6 + -1'out1_7 + c18_0 + -1'aux13_1 + -1'aux13_6 + -1'aux15_1 + -1'aux15_6 + -1'aux14_1 + -1'aux14_6 + -1'aux16_1 + -1'aux16_6 + aux5_0 + aux5_2 + aux5_3 + aux5_4 + aux5_5 + aux5_7 + -1'aux8_1 + -1'aux8_6 + -1'aux6_1 + -1'aux6_6 + -1'aux7_0 + -2'aux7_1 + -1'aux7_2 + -1'aux7_3 + -1'aux7_4 + -1'aux7_5 + -2'aux7_6 + -1'aux7_7 + in4_0 + in4_2 + in4_3 + in4_4 + in4_5 + in4_7 + -2'c7_0 + in3_0 + in3_2 + in3_3 + in3_4 + in3_5 + in3_7 + -1'in2_0 + -2'in2_1 + -1'in2_2 + -1'in2_3 + -1'in2_4 + -1'in2_5 + -2'in2_6 + -1'in2_7 + -3'in1_0 + -4'in1_1 + -3'in1_2 + -3'in1_3 + -3'in1_4 + -3'in1_5 + -4'in1_6 + -3'in1_7 + -1'aux12_1 + -1'aux12_6 + 4'c5_0 + -1'aux9_1 + -1'aux9_6 + -1'aux10_1 + -1'aux10_6 + -1'aux11_1 + -1'aux11_6 = -4
invariant :in4_0 + in4_1 + in4_2 + in4_3 + in4_4 + in4_5 + in4_6 + in4_7 + -1'in2_0 + -1'in2_1 + -1'in2_2 + -1'in2_3 + -1'in2_4 + -1'in2_5 + -1'in2_6 + -1'in2_7 = 0
invariant :out8_2 + out7_2 + out6_2 + out5_2 + out4_2 + out3_2 + out2_2 + out1_2 + aux13_2 + aux15_2 + aux14_2 + aux16_2 + aux5_2 + aux8_2 + aux6_2 + aux7_2 + in4_2 + in3_2 + in2_2 + in1_2 + aux12_2 + aux9_2 + aux10_2 + aux11_2 = 2
invariant :out5_0 + out5_1 + out5_2 + out5_3 + out5_4 + out5_5 + out5_6 + out5_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c18_0 + c19_0 = 0
invariant :out8_6 + out7_6 + out6_6 + out5_6 + out4_6 + out3_6 + out2_6 + out1_6 + aux13_6 + aux15_6 + aux14_6 + aux16_6 + aux5_6 + aux8_6 + aux6_6 + aux7_6 + in4_6 + in3_6 + in2_6 + in1_6 + aux12_6 + aux9_6 + aux10_6 + aux11_6 = 2
invariant :4'out1_0 + 4'out1_1 + 4'out1_2 + 4'out1_3 + 4'out1_4 + 4'out1_5 + 4'out1_6 + 4'out1_7 + -2'c20_0 + -4'c18_0 + -4'c19_0 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + 2'c110_0 + 2'aux7_0 + 2'aux7_1 + 2'aux7_2 + 2'aux7_3 + 2'aux7_4 + 2'aux7_5 + 2'aux7_6 + 2'aux7_7 + 4'c7_0 + 4'in1_0 + 4'in1_1 + 4'in1_2 + 4'in1_3 + 4'in1_4 + 4'in1_5 + 4'in1_6 + 4'in1_7 + -4'c5_0 + 2'aux10_0 + 2'aux10_1 + 2'aux10_2 + 2'aux10_3 + 2'aux10_4 + 2'aux10_5 + 2'aux10_6 + 2'aux10_7 + -2'c15_0 = 8
invariant :-1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + 2'c16_0 + 2'c15_0 = 0
invariant :out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + c20_0 + c18_0 + c19_0 = 0
invariant :c8_0 + 2'c7_0 + -1'in2_0 + -1'in2_1 + -1'in2_2 + -1'in2_3 + -1'in2_4 + -1'in2_5 + -1'in2_6 + -1'in2_7 + 2'in1_0 + 2'in1_1 + 2'in1_2 + 2'in1_3 + 2'in1_4 + 2'in1_5 + 2'in1_6 + 2'in1_7 + -2'c5_0 = 0
invariant :4'out8_2 + 4'out8_4 + 4'out8_7 + 4'out7_2 + 4'out7_4 + 4'out7_7 + 4'out6_2 + 4'out6_4 + 4'out6_7 + 4'out5_2 + 4'out5_4 + 4'out5_7 + 4'out4_2 + 4'out4_4 + 4'out4_7 + 4'out3_2 + 4'out3_4 + 4'out3_7 + 4'out2_2 + 4'out2_4 + 4'out2_7 + -8'out1_0 + -8'out1_1 + -4'out1_2 + -8'out1_3 + -4'out1_4 + -8'out1_5 + -8'out1_6 + -4'out1_7 + 4'c18_0 + 4'aux13_2 + 4'aux13_4 + 4'aux13_7 + -4'aux15_0 + -4'aux15_1 + -4'aux15_3 + -4'aux15_5 + -4'aux15_6 + 3'aux14_0 + 3'aux14_1 + 7'aux14_2 + 3'aux14_3 + 7'aux14_4 + 3'aux14_5 + 3'aux14_6 + 7'aux14_7 + -3'aux16_0 + -3'aux16_1 + aux16_2 + -3'aux16_3 + aux16_4 + -3'aux16_5 + -3'aux16_6 + aux16_7 + 4'c11_0 + 4'aux5_2 + 4'aux5_4 + 4'aux5_7 + 4'aux8_2 + 4'aux8_4 + 4'aux8_7 + -4'aux6_0 + -4'aux6_1 + -4'aux6_3 + -4'aux6_5 + -4'aux6_6 + 4'aux7_2 + 4'aux7_4 + 4'aux7_7 + 4'in4_2 + 4'in4_4 + 4'in4_7 + 4'in3_2 + 4'in3_4 + 4'in3_7 + 4'in2_2 + 4'in2_4 + 4'in2_7 + -8'in1_0 + -8'in1_1 + -4'in1_2 + -8'in1_3 + -4'in1_4 + -8'in1_5 + -8'in1_6 + -4'in1_7 + -4'aux12_0 + -4'aux12_1 + -4'aux12_3 + -4'aux12_5 + -4'aux12_6 + 8'c5_0 + 4'c13_0 + 4'aux9_2 + 4'aux9_4 + 4'aux9_7 + -2'aux10_0 + -2'aux10_1 + 2'aux10_2 + -2'aux10_3 + 2'aux10_4 + -2'aux10_5 + -2'aux10_6 + 2'aux10_7 + 4'aux11_2 + 4'aux11_4 + 4'aux11_7 + -2'c15_0 + 4'c14_0 = 8
invariant :out8_0 + out8_1 + 2'out8_2 + 2'out8_4 + out8_6 + 2'out8_7 + out7_2 + -1'out7_3 + out7_4 + -1'out7_5 + out7_7 + out6_0 + out6_1 + 2'out6_2 + 2'out6_4 + out6_6 + 2'out6_7 + out5_2 + -1'out5_3 + out5_4 + -1'out5_5 + out5_7 + out4_2 + -1'out4_3 + out4_4 + -1'out4_5 + out4_7 + out3_2 + -1'out3_3 + out3_4 + -1'out3_5 + out3_7 + out2_0 + out2_1 + 2'out2_2 + 2'out2_4 + out2_6 + 2'out2_7 + out1_0 + out1_1 + 2'out1_2 + 2'out1_4 + out1_6 + 2'out1_7 + -1'c20_0 + -2'c18_0 + -2'c19_0 + aux13_0 + aux13_1 + 2'aux13_2 + 2'aux13_4 + aux13_6 + 2'aux13_7 + -1'aux15_0 + -1'aux15_1 + -2'aux15_3 + -2'aux15_5 + -1'aux15_6 + 2'aux14_0 + 2'aux14_1 + 3'aux14_2 + aux14_3 + 3'aux14_4 + aux14_5 + 2'aux14_6 + 3'aux14_7 + aux16_2 + -1'aux16_3 + aux16_4 + -1'aux16_5 + aux16_7 + aux5_2 + -1'aux5_3 + aux5_4 + -1'aux5_5 + aux5_7 + aux8_0 + aux8_1 + 2'aux8_2 + 2'aux8_4 + aux8_6 + 2'aux8_7 + -1'aux6_0 + -1'aux6_1 + -2'aux6_3 + -2'aux6_5 + -1'aux6_6 + 2'aux7_0 + 2'aux7_1 + 3'aux7_2 + aux7_3 + 3'aux7_4 + aux7_5 + 2'aux7_6 + 3'aux7_7 + in4_2 + -1'in4_3 + in4_4 + -1'in4_5 + in4_7 + 2'c7_0 + in3_2 + -1'in3_3 + in3_4 + -1'in3_5 + in3_7 + 2'in2_0 + 2'in2_1 + 3'in2_2 + in2_3 + 3'in2_4 + in2_5 + 2'in2_6 + 3'in2_7 + in1_2 + -1'in1_3 + in1_4 + -1'in1_5 + in1_7 + -1'aux12_0 + -1'aux12_1 + -2'aux12_3 + -2'aux12_5 + -1'aux12_6 + 2'c13_0 + aux9_0 + aux9_1 + 2'aux9_2 + 2'aux9_4 + aux9_6 + 2'aux9_7 + aux10_0 + aux10_1 + 2'aux10_2 + 2'aux10_4 + aux10_6 + 2'aux10_7 + aux11_2 + -1'aux11_3 + aux11_4 + -1'aux11_5 + aux11_7 + -2'c15_0 + c14_0 = 10
invariant :out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_3 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 = 0
invariant :c20_0 + 2'c18_0 + 2'c19_0 + 2'c17_0 + -1'aux16_0 + -1'aux16_1 + -1'aux16_2 + -1'aux16_3 + -1'aux16_4 + -1'aux16_5 + -1'aux16_6 + -1'aux16_7 = 0
FORMULA PermAdmissibility-COL-02-ReachabilityCardinality-04 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA PermAdmissibility-COL-02-ReachabilityCardinality-06 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA PermAdmissibility-COL-02-ReachabilityCardinality-09 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA PermAdmissibility-COL-02-ReachabilityCardinality-15 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 29196 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 328 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL02ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL02ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL02ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
LTSmin run took 51078 ms.
Found Violation
FORMULA PermAdmissibility-COL-02-ReachabilityCardinality-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL02ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
LTSmin run took 17129 ms.
Found Violation
FORMULA PermAdmissibility-COL-02-ReachabilityCardinality-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL02ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL02ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL02ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
LTSmin run took 14689 ms.
Found Violation
FORMULA PermAdmissibility-COL-02-ReachabilityCardinality-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL02ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL02ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL02ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL02ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 4:10:25 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 4:10:25 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 4:10:25 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 24, 2018 4:10:26 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 959 ms
May 24, 2018 4:10:26 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 40 places.
May 24, 2018 4:10:26 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 24, 2018 4:10:26 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :input->out8,out7,out6,out5,out4,out3,out2,out1,aux13,aux15,aux14,aux16,aux5,aux8,aux6,aux7,in4,in3,in2,in1,aux12,aux9,aux10,aux11,
Dot->c20,c18,c19,c17,c12,c110,c11,c9,c8,c7,c6,c5,c13,c16,c15,c14,

May 24, 2018 4:10:26 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 16 transitions.
May 24, 2018 4:10:26 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 24, 2018 4:10:26 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
May 24, 2018 4:10:26 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 252 ms
May 24, 2018 4:10:29 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 139 ms
May 24, 2018 4:10:29 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 82 ms
May 24, 2018 4:10:29 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 283 ms
May 24, 2018 4:10:29 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 2 ms
May 24, 2018 4:10:30 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
May 24, 2018 4:10:30 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
May 24, 2018 4:10:30 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 8 ms.
May 24, 2018 4:10:30 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 255 ms.
May 24, 2018 4:10:33 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 31 place invariants in 573 ms
May 24, 2018 4:10:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 1 / 16 in 4661 ms.
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-00(UNSAT) depth K=0 took 174 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-01(UNSAT) depth K=0 took 87 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-02(UNSAT) depth K=0 took 13 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 61 ms.
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-03(UNSAT) depth K=0 took 27 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-04(UNSAT) depth K=0 took 32 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-05(UNSAT) depth K=0 took 25 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-06(UNSAT) depth K=0 took 31 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-07(UNSAT) depth K=0 took 8 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-08(UNSAT) depth K=0 took 22 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-09(UNSAT) depth K=0 took 9 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-10(UNSAT) depth K=0 took 33 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-11(UNSAT) depth K=0 took 47 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-12(UNSAT) depth K=0 took 63 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-13(UNSAT) depth K=0 took 7 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-15(UNSAT) depth K=0 took 23 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-00(UNSAT) depth K=1 took 40 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-01(UNSAT) depth K=1 took 33 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-02(UNSAT) depth K=1 took 52 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-03(UNSAT) depth K=1 took 64 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-04(UNSAT) depth K=1 took 63 ms
May 24, 2018 4:10:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-05(UNSAT) depth K=1 took 63 ms
May 24, 2018 4:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-06(UNSAT) depth K=1 took 124 ms
May 24, 2018 4:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-07(UNSAT) depth K=1 took 131 ms
May 24, 2018 4:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-08(UNSAT) depth K=1 took 61 ms
May 24, 2018 4:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-09(UNSAT) depth K=1 took 20 ms
May 24, 2018 4:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-10(UNSAT) depth K=1 took 30 ms
May 24, 2018 4:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-11(UNSAT) depth K=1 took 8 ms
May 24, 2018 4:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-12(UNSAT) depth K=1 took 56 ms
May 24, 2018 4:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-13(UNSAT) depth K=1 took 36 ms
May 24, 2018 4:10:35 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 31 place invariants in 483 ms
May 24, 2018 4:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-15(UNSAT) depth K=1 took 64 ms
May 24, 2018 4:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-00(UNSAT) depth K=2 took 274 ms
May 24, 2018 4:10:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-01(UNSAT) depth K=2 took 657 ms
May 24, 2018 4:10:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-02(UNSAT) depth K=2 took 453 ms
May 24, 2018 4:10:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-03(UNSAT) depth K=2 took 200 ms
May 24, 2018 4:10:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-04(UNSAT) depth K=2 took 216 ms
May 24, 2018 4:10:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-05(UNSAT) depth K=2 took 286 ms
May 24, 2018 4:10:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-06(UNSAT) depth K=2 took 208 ms
May 24, 2018 4:10:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-07(UNSAT) depth K=2 took 194 ms
May 24, 2018 4:10:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-08(UNSAT) depth K=2 took 161 ms
May 24, 2018 4:10:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-09(UNSAT) depth K=2 took 590 ms
May 24, 2018 4:10:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-10(UNSAT) depth K=2 took 264 ms
May 24, 2018 4:10:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-11(UNSAT) depth K=2 took 297 ms
May 24, 2018 4:10:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-12(UNSAT) depth K=2 took 677 ms
May 24, 2018 4:10:40 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 208 variables to be positive in 7332 ms
May 24, 2018 4:10:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1024 transitions.
May 24, 2018 4:10:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1024 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 4:10:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 372 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 4:10:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1024 transitions.
May 24, 2018 4:10:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 136 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 4:10:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-13(UNSAT) depth K=2 took 1313 ms
May 24, 2018 4:10:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-15(UNSAT) depth K=2 took 108 ms
May 24, 2018 4:10:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-00(UNSAT) depth K=3 took 1894 ms
May 24, 2018 4:10:46 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 208 variables to be positive in 11131 ms
May 24, 2018 4:10:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-01(UNSAT) depth K=3 took 2982 ms
May 24, 2018 4:10:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-00
May 24, 2018 4:10:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-00(SAT) depth K=0 took 4750 ms
May 24, 2018 4:10:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-02(UNSAT) depth K=3 took 7131 ms
May 24, 2018 4:11:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-01
May 24, 2018 4:11:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-01(SAT) depth K=0 took 19529 ms
May 24, 2018 4:11:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-03(UNSAT) depth K=3 took 26868 ms
May 24, 2018 4:11:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-02
May 24, 2018 4:11:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-02(SAT) depth K=0 took 11427 ms
May 24, 2018 4:11:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-04(UNSAT) depth K=3 took 10862 ms
May 24, 2018 4:11:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-05(UNSAT) depth K=3 took 1626 ms
May 24, 2018 4:11:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-06(UNSAT) depth K=3 took 2441 ms
May 24, 2018 4:11:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-07(UNSAT) depth K=3 took 1920 ms
May 24, 2018 4:11:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-08(UNSAT) depth K=3 took 11535 ms
May 24, 2018 4:11:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-03
May 24, 2018 4:11:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-03(SAT) depth K=0 took 34073 ms
May 24, 2018 4:11:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-09(UNSAT) depth K=3 took 7775 ms
May 24, 2018 4:12:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-10(UNSAT) depth K=3 took 5197 ms
May 24, 2018 4:12:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate PermAdmissibility-COL-02-ReachabilityCardinality-04
May 24, 2018 4:12:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for PermAdmissibility-COL-02-ReachabilityCardinality-04
May 24, 2018 4:12:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-04(FALSE) depth K=0 took 9137 ms
May 24, 2018 4:12:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-11(UNSAT) depth K=3 took 10110 ms
May 24, 2018 4:12:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-05
May 24, 2018 4:12:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-05(SAT) depth K=0 took 16859 ms
May 24, 2018 4:12:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-12(UNSAT) depth K=3 took 11362 ms
May 24, 2018 4:12:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-13(UNSAT) depth K=3 took 1836 ms
May 24, 2018 4:12:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-15(UNSAT) depth K=3 took 1536 ms
May 24, 2018 4:13:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-00(UNSAT) depth K=4 took 47502 ms
May 24, 2018 4:13:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate PermAdmissibility-COL-02-ReachabilityCardinality-06
May 24, 2018 4:13:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for PermAdmissibility-COL-02-ReachabilityCardinality-06
May 24, 2018 4:13:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-06(FALSE) depth K=0 took 66989 ms
May 24, 2018 4:13:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-07
May 24, 2018 4:13:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-07(SAT) depth K=0 took 3300 ms
May 24, 2018 4:13:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-08
May 24, 2018 4:13:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-08(SAT) depth K=0 took 2271 ms
May 24, 2018 4:13:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate PermAdmissibility-COL-02-ReachabilityCardinality-09
May 24, 2018 4:13:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for PermAdmissibility-COL-02-ReachabilityCardinality-09
May 24, 2018 4:13:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-09(FALSE) depth K=0 took 4973 ms
May 24, 2018 4:13:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-10
May 24, 2018 4:13:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-10(SAT) depth K=0 took 20074 ms
May 24, 2018 4:14:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-11
May 24, 2018 4:14:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-11(SAT) depth K=0 took 5752 ms
May 24, 2018 4:14:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-12
May 24, 2018 4:14:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-12(SAT) depth K=0 took 2261 ms
May 24, 2018 4:14:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-13
May 24, 2018 4:14:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-13(SAT) depth K=0 took 10704 ms
May 24, 2018 4:14:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1024 transitions.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
May 24, 2018 4:15:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate PermAdmissibility-COL-02-ReachabilityCardinality-15
May 24, 2018 4:15:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for PermAdmissibility-COL-02-ReachabilityCardinality-15
May 24, 2018 4:15:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-15(FALSE) depth K=0 took 50893 ms
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
May 24, 2018 4:15:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/1024) took 37879 ms. Total solver calls (SAT/UNSAT): 260(260/0)
May 24, 2018 4:15:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 38109 ms. Total solver calls (SAT/UNSAT): 260(260/0)
May 24, 2018 4:15:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 1024 transitions.
May 24, 2018 4:15:14 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:16 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:17 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:18 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:18 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:19 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:20 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:21 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:21 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:22 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:25 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:25 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:26 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-01(UNSAT) depth K=4 took 132964 ms
May 24, 2018 4:15:31 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:32 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:33 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:33 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:34 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:34 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:34 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:35 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:35 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-00
May 24, 2018 4:15:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-00(SAT) depth K=1 took 27042 ms
May 24, 2018 4:15:36 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:37 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:38 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:39 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:40 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:41 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:42 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:42 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:43 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:43 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:44 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:44 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:45 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:46 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:46 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:47 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:47 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:47 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:48 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:48 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:49 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:50 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 24, 2018 4:15:50 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:628)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 4:15:51 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 322114ms conformant to PINS in folder :/home/mcc/execution
May 24, 2018 4:17:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-02(UNSAT) depth K=4 took 96999 ms
May 24, 2018 4:19:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-03(UNSAT) depth K=4 took 156241 ms
May 24, 2018 4:21:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-01
May 24, 2018 4:21:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-01(SAT) depth K=1 took 333067 ms
May 24, 2018 4:21:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-05(UNSAT) depth K=4 took 89920 ms
May 24, 2018 4:21:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-02
May 24, 2018 4:21:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-02(SAT) depth K=1 took 5126 ms
May 24, 2018 4:21:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-06(UNSAT) depth K=4 took 35319 ms
May 24, 2018 4:22:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-07(UNSAT) depth K=4 took 46228 ms
May 24, 2018 4:23:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-03
May 24, 2018 4:23:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-03(SAT) depth K=1 took 147671 ms
May 24, 2018 4:23:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-05
May 24, 2018 4:23:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-05(SAT) depth K=1 took 15601 ms
May 24, 2018 4:24:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-07
May 24, 2018 4:24:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-07(SAT) depth K=1 took 47051 ms
May 24, 2018 4:25:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-08(UNSAT) depth K=4 took 157634 ms
May 24, 2018 4:25:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-08
May 24, 2018 4:25:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-08(SAT) depth K=1 took 27757 ms
May 24, 2018 4:25:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-10
May 24, 2018 4:25:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-10(SAT) depth K=1 took 7583 ms
May 24, 2018 4:25:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-09(UNSAT) depth K=4 took 36980 ms
May 24, 2018 4:26:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-11
May 24, 2018 4:26:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-11(SAT) depth K=1 took 66739 ms
May 24, 2018 4:26:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-10(UNSAT) depth K=4 took 49997 ms
May 24, 2018 4:27:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-12
May 24, 2018 4:27:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-12(SAT) depth K=1 took 39236 ms
May 24, 2018 4:28:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-11(UNSAT) depth K=4 took 119256 ms
May 24, 2018 4:28:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-13
May 24, 2018 4:28:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-13(SAT) depth K=1 took 102737 ms
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PermAdmissibilityCOL02ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 4:29:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-12(UNSAT) depth K=4 took 58539 ms
May 24, 2018 4:30:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-13(UNSAT) depth K=4 took 44087 ms
May 24, 2018 4:31:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-15(UNSAT) depth K=4 took 59639 ms
May 24, 2018 4:34:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-00
May 24, 2018 4:34:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-00(SAT) depth K=2 took 322001 ms
ITS-tools command line returned an error code 137
May 24, 2018 4:40:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-00(UNSAT) depth K=5 took 580111 ms
May 24, 2018 4:46:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-03
May 24, 2018 4:46:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-03(SAT) depth K=2 took 765651 ms
May 24, 2018 4:47:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-03(UNSAT) depth K=5 took 364609 ms
May 24, 2018 4:50:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-07(UNSAT) depth K=5 took 224074 ms
May 24, 2018 4:51:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-07
May 24, 2018 4:51:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-07(SAT) depth K=2 took 257429 ms
May 24, 2018 4:56:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-08(UNSAT) depth K=5 took 322154 ms
May 24, 2018 4:58:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-08
May 24, 2018 4:58:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-08(SAT) depth K=2 took 438413 ms
May 24, 2018 4:59:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-10
May 24, 2018 4:59:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-10(SAT) depth K=2 took 80677 ms
May 24, 2018 5:01:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-10(UNSAT) depth K=5 took 330982 ms
May 24, 2018 5:04:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-02-ReachabilityCardinality-11
May 24, 2018 5:04:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-02-ReachabilityCardinality-11(SAT) depth K=2 took 280185 ms
May 24, 2018 5:05:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-02-ReachabilityCardinality-11(UNSAT) depth K=5 took 236540 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-02"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-02.tgz
mv PermAdmissibility-COL-02 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is PermAdmissibility-COL-02, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r116-csrt-152666475400439"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;