fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r116-csrt-152666475400412
Last Updated
June 26, 2018

About the Execution of ITS-Tools for Parking-PT-432

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15754.940 27058.00 79183.00 162.50 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..........................................................
/home/mcc/execution
total 340K
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.9K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 105 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 343 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 192K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Parking-PT-432, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r116-csrt-152666475400412
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Parking-PT-432-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527176997999

Flatten gal took : 222 ms
Constant places removed 1 places and 1 transitions.
Reduce isomorphic transitions removed 328 transitions.
Performed 32 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 361 rules applied. Total rules applied 361 place count 528 transition count 424
Constant places removed 32 places and 0 transitions.
Iterating post reduction 1 with 32 rules applied. Total rules applied 393 place count 496 transition count 424
Symmetric choice reduction at 2 with 4 rule applications. Total rules 397 place count 496 transition count 424
Constant places removed 4 places and 4 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 401 place count 492 transition count 420
Performed 20 Post agglomeration using F-continuation condition.
Constant places removed 20 places and 0 transitions.
Iterating post reduction 3 with 20 rules applied. Total rules applied 421 place count 472 transition count 400
Applied a total of 421 rules in 134 ms. Remains 472 /529 variables (removed 57) and now considering 400/785 (removed 385) transitions.
// Phase 1: matrix 400 rows 472 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 400 rows 472 cols
invariant :p39 + p40 = 1
invariant :p307 + p308 = 1
invariant :p491 + p492 + p493 + p496 + p497 + p498 = 1
invariant :p19 + p20 = 1
invariant :p183 + p184 + p185 + p187 + p188 + p189 + -1'p198 + -1'p206 + -1'p214 + -1'p222 + -1'p230 + -1'p238 + -1'p246 + -1'p270 + -1'p272 = -8
invariant :p411 + p412 = 1
invariant :p29 + p30 = 1
invariant :p301 + p302 = 1
invariant :p283 + p284 = 1
invariant :p289 + p290 = 1
invariant :p151 + p152 = 1
invariant :p13 + p14 = 1
invariant :p191 + p192 + p193 + p195 + p196 + p197 + p198 = 1
invariant :p427 + p428 = 1
invariant :p365 + p366 + p367 + p370 + p371 + p372 = 1
invariant :p149 + p150 = 1
invariant :p417 + p418 = 1
invariant :p167 + p168 = 1
invariant :p316 + p324 + p332 + p340 + p348 + p356 + p364 + p372 + p396 + p398 = 9
invariant :p333 + p334 + p335 + p338 + p339 + p340 = 1
invariant :p281 + p282 = 1
invariant :p295 + p296 = 1
invariant :p97 + p98 + p99 + p101 + p102 + p103 + p104 = 1
invariant :p43 + p44 = 1
invariant :p7 + p8 = 1
invariant :p275 + p276 = 1
invariant :p223 + p224 + p225 + p227 + p228 + p229 + p230 = 1
invariant :p419 + p420 = 1
invariant :p113 + p114 + p115 + p118 + p119 + p120 = 1
invariant :p303 + p304 = 1
invariant :p121 + p122 + p123 + p124 + p125 + p126 + p127 + p128 + p129 + p130 + p131 + p132 + p133 + p134 + p135 + p136 + p137 + p138 + p139 + p140 + p141 + p142 + p143 + p144 = 1
invariant :p177 + p178 = 1
invariant :p15 + p16 = 1
invariant :p341 + p342 + p343 + p345 + p346 + p347 + p348 = 1
invariant :p467 + p468 + p469 + p471 + p472 + p473 + p474 = 1
invariant :p247 + p248 + p249 + p250 + p251 + p252 + p253 + p254 + p255 + p256 + p257 + p258 + p259 + p260 + p261 + p262 + p263 + p264 + p265 + p266 + p267 + p268 + p269 + p270 = 1
invariant :p31 + p32 = 1
invariant :p64 + p72 + p80 + p88 + p96 + p104 + p112 + p120 + p144 + p146 = 9
invariant :p373 + p374 + p375 + p376 + p377 + p378 + p379 + p380 + p381 + p382 + p383 + p384 + p385 + p386 + p387 + p388 + p389 + p390 + p391 + p392 + p393 + p394 + p395 + p396 = 1
invariant :p179 + p180 = 1
invariant :p297 + p298 = 1
invariant :p401 + p402 = 1
invariant :p499 + p500 + p501 + p502 + p503 + p504 + p505 + p506 + p507 + p508 + p509 + p510 + p511 + p512 + p513 + p514 + p515 + p516 + p517 + p518 + p519 + p520 + p521 + p522 = 1
invariant :p443 + p444 + p445 + p447 + p448 + p449 + p450 = 1
invariant :p277 + p278 = 1
invariant :p3 + p4 = 1
invariant :p433 + p434 = 1
invariant :p163 + p164 = 1
invariant :p181 + p182 = 1
invariant :p161 + p162 = 1
invariant :p35 + p36 = 1
invariant :p403 + p404 = 1
invariant :p409 + p410 = 1
invariant :p309 + p310 + p311 + p313 + p314 + p315 + -1'p324 + -1'p332 + -1'p340 + -1'p348 + -1'p356 + -1'p364 + -1'p372 + -1'p396 + -1'p398 = -8
invariant :p425 + p426 = 1
invariant :p239 + p240 + p241 + p244 + p245 + p246 = 1
invariant :p81 + p82 + p83 + p86 + p87 + p88 = 1
invariant :p1 + p2 = 1
invariant :p231 + p232 + p233 + p236 + p237 + p238 = 1
invariant :p523 + p524 = 1
invariant :p527 + p528 = 1
invariant :p459 + p460 + p461 + p464 + p465 + p466 = 1
invariant :p105 + p106 + p107 + p110 + p111 + p112 = 1
invariant :p291 + p292 = 1
invariant :p25 + p26 = 1
invariant :p89 + p90 + p91 + p93 + p94 + p95 + p96 = 1
invariant :p27 + p28 = 1
invariant :p423 + p424 = 1
invariant :p207 + p208 + p209 + p212 + p213 + p214 = 1
invariant :p57 + p58 + p59 + p61 + p62 + p63 + -1'p72 + -1'p80 + -1'p88 + -1'p96 + -1'p104 + -1'p112 + -1'p120 + -1'p144 + -1'p146 = -8
invariant :p215 + p216 + p217 + p219 + p220 + p221 + p222 = 1
invariant :p451 + p452 + p453 + p456 + p457 + p458 = 1
invariant :p299 + p300 = 1
invariant :p407 + p408 = 1
invariant :p41 + p42 = 1
invariant :p317 + p318 + p319 + p321 + p322 + p323 + p324 = 1
invariant :p11 + p12 = 1
invariant :p325 + p326 + p327 + p330 + p331 + p332 = 1
invariant :p413 + p414 = 1
invariant :p435 + p436 + p437 + p439 + p440 + p441 + -1'p450 + -1'p458 + -1'p466 + -1'p474 + -1'p482 + -1'p490 + -1'p498 + -1'p522 + -1'p524 = -8
invariant :p53 + p54 = 1
invariant :p159 + p160 = 1
invariant :p145 + p146 = 1
invariant :p9 + p10 = 1
invariant :p49 + p50 = 1
invariant :p157 + p158 = 1
invariant :p173 + p174 = 1
invariant :p285 + p286 = 1
invariant :p475 + p476 + p477 + p479 + p480 + p481 + p482 = 1
invariant :p175 + p176 = 1
invariant :p415 + p416 = 1
invariant :p45 + p46 = 1
invariant :p21 + p22 = 1
invariant :p279 + p280 = 1
invariant :p153 + p154 = 1
invariant :p305 + p306 = 1
invariant :p429 + p430 = 1
invariant :p17 + p18 = 1
invariant :p397 + p398 = 1
invariant :p55 + p56 = 1
invariant :p5 + p6 = 1
invariant :p51 + p52 = 1
invariant :p73 + p74 + p75 + p78 + p79 + p80 = 1
invariant :p47 + p48 = 1
invariant :p33 + p34 = 1
invariant :p271 + p272 = 1
invariant :p349 + p350 + p351 + p353 + p354 + p355 + p356 = 1
invariant :p165 + p166 = 1
invariant :p65 + p66 + p67 + p69 + p70 + p71 + p72 = 1
invariant :p287 + p288 = 1
invariant :p421 + p422 = 1
invariant :p483 + p484 + p485 + p488 + p489 + p490 = 1
invariant :p169 + p170 = 1
invariant :p171 + p172 = 1
invariant :p357 + p358 + p359 + p362 + p363 + p364 = 1
invariant :p431 + p432 = 1
invariant :p293 + p294 = 1
invariant :p37 + p38 = 1
invariant :p155 + p156 = 1
invariant :p190 + p198 + p206 + p214 + p222 + p230 + p238 + p246 + p270 + p272 = 9
invariant :p199 + p200 + p201 + p204 + p205 + p206 = 1
invariant :p442 + p450 + p458 + p466 + p474 + p482 + p490 + p498 + p522 + p524 = 9
invariant :p405 + p406 = 1
invariant :p23 + p24 = 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,2.58485e+31,2.26348,60516,2,20076,5,242501,6,0,2291,254584,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,1.50062e+06,22.1704,542696,2,3473,7,3.76501e+06,9,1,10003,254584,2

System contains 1.50062e+06 deadlocks (shown below if less than --print-limit option) !
FORMULA Parking-PT-432-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 1500625 states ] showing 10 first states
[ p431=1 p427=1 p482=1 p498=1 p474=1 p423=1 p466=1 p524=1 p458=1 p450=1 p442=1 p522=1 p488=1 p527=1 p425=1 p429=1 p421=1 p419=1 p417=1 p413=1 p409=1 p415=1 p433=1 p405=1 p411=1 p407=1 p305=1 p301=1 p403=1 p356=1 p372=1 p348=1 p398=1 p340=1 p332=1 p297=1 p324=1 p316=1 p396=1 p362=1 p401=1 p299=1 p303=1 p295=1 p293=1 p291=1 p287=1 p283=1 p307=1 p279=1 p289=1 p285=1 p281=1 p277=1 p17=1 p179=1 p175=1 p23=1 p246=1 p230=1 p222=1 p272=1 p270=1 p214=1 p206=1 p198=1 p190=1 p171=1 p236=1 p177=1 p173=1 p275=1 p169=1 p181=1 p165=1 p167=1 p5=1 p161=1 p157=1 p11=1 p153=1 p163=1 p21=1 p159=1 p155=1 p151=1 p3=1 p19=1 p9=1 p13=1 p15=1 p1=1 p7=1 p53=1 p55=1 p120=1 p112=1 p104=1 p146=1 p64=1 p96=1 p88=1 p80=1 p72=1 p49=1 p51=1 p27=1 p47=1 p45=1 p149=1 p25=1 p43=1 p31=1 p39=1 p35=1 p41=1 p29=1 p127=1 p37=1 p33=1 ]
[ p431=1 p427=1 p482=1 p498=1 p474=1 p423=1 p466=1 p524=1 p458=1 p450=1 p442=1 p522=1 p488=1 p527=1 p425=1 p429=1 p421=1 p419=1 p417=1 p413=1 p409=1 p415=1 p433=1 p405=1 p411=1 p407=1 p305=1 p301=1 p403=1 p356=1 p372=1 p348=1 p398=1 p340=1 p332=1 p297=1 p324=1 p316=1 p396=1 p362=1 p401=1 p299=1 p303=1 p295=1 p293=1 p291=1 p287=1 p283=1 p307=1 p279=1 p289=1 p285=1 p281=1 p277=1 p17=1 p179=1 p175=1 p23=1 p246=1 p230=1 p222=1 p272=1 p270=1 p214=1 p206=1 p198=1 p190=1 p171=1 p236=1 p177=1 p173=1 p275=1 p169=1 p181=1 p165=1 p167=1 p5=1 p161=1 p157=1 p11=1 p153=1 p163=1 p21=1 p159=1 p155=1 p151=1 p3=1 p19=1 p9=1 p13=1 p15=1 p1=1 p7=1 p53=1 p55=1 p120=1 p112=1 p104=1 p146=1 p64=1 p96=1 p88=1 p80=1 p72=1 p49=1 p51=1 p27=1 p47=1 p45=1 p149=1 p25=1 p43=1 p31=1 p39=1 p35=1 p41=1 p128=1 p29=1 p37=1 p33=1 ]
[ p431=1 p427=1 p482=1 p498=1 p474=1 p423=1 p466=1 p524=1 p458=1 p450=1 p442=1 p522=1 p488=1 p527=1 p425=1 p429=1 p421=1 p419=1 p417=1 p413=1 p409=1 p415=1 p433=1 p405=1 p411=1 p407=1 p305=1 p301=1 p403=1 p356=1 p372=1 p348=1 p398=1 p340=1 p332=1 p297=1 p324=1 p316=1 p396=1 p362=1 p401=1 p299=1 p303=1 p295=1 p293=1 p291=1 p287=1 p283=1 p307=1 p279=1 p289=1 p285=1 p281=1 p277=1 p17=1 p179=1 p175=1 p23=1 p246=1 p230=1 p222=1 p272=1 p270=1 p214=1 p206=1 p198=1 p190=1 p171=1 p236=1 p177=1 p173=1 p275=1 p169=1 p181=1 p165=1 p167=1 p5=1 p161=1 p157=1 p11=1 p153=1 p163=1 p21=1 p159=1 p155=1 p151=1 p3=1 p19=1 p9=1 p13=1 p15=1 p1=1 p7=1 p53=1 p55=1 p120=1 p112=1 p104=1 p146=1 p64=1 p96=1 p88=1 p80=1 p72=1 p49=1 p51=1 p27=1 p47=1 p45=1 p149=1 p25=1 p43=1 p31=1 p39=1 p35=1 p41=1 p126=1 p29=1 p37=1 p33=1 ]
[ p431=1 p427=1 p482=1 p498=1 p474=1 p423=1 p466=1 p524=1 p458=1 p450=1 p442=1 p522=1 p488=1 p527=1 p425=1 p429=1 p421=1 p419=1 p417=1 p413=1 p409=1 p415=1 p433=1 p405=1 p411=1 p407=1 p305=1 p301=1 p403=1 p356=1 p372=1 p348=1 p398=1 p340=1 p332=1 p297=1 p324=1 p316=1 p396=1 p362=1 p401=1 p299=1 p303=1 p295=1 p293=1 p291=1 p287=1 p283=1 p307=1 p279=1 p289=1 p285=1 p281=1 p277=1 p17=1 p179=1 p175=1 p23=1 p246=1 p230=1 p222=1 p272=1 p270=1 p214=1 p206=1 p198=1 p190=1 p171=1 p236=1 p177=1 p173=1 p275=1 p169=1 p181=1 p165=1 p167=1 p5=1 p161=1 p157=1 p11=1 p153=1 p163=1 p21=1 p159=1 p155=1 p151=1 p3=1 p19=1 p9=1 p13=1 p15=1 p1=1 p7=1 p53=1 p55=1 p120=1 p112=1 p104=1 p146=1 p64=1 p96=1 p88=1 p80=1 p72=1 p49=1 p51=1 p27=1 p47=1 p45=1 p149=1 p25=1 p129=1 p43=1 p31=1 p39=1 p35=1 p41=1 p29=1 p37=1 p33=1 ]
[ p431=1 p427=1 p482=1 p498=1 p474=1 p423=1 p466=1 p524=1 p458=1 p450=1 p442=1 p522=1 p488=1 p527=1 p425=1 p429=1 p421=1 p419=1 p417=1 p413=1 p409=1 p415=1 p433=1 p405=1 p411=1 p407=1 p305=1 p301=1 p403=1 p356=1 p372=1 p348=1 p398=1 p340=1 p332=1 p297=1 p324=1 p316=1 p396=1 p362=1 p401=1 p299=1 p303=1 p295=1 p293=1 p291=1 p287=1 p283=1 p307=1 p279=1 p289=1 p285=1 p281=1 p277=1 p17=1 p179=1 p175=1 p23=1 p246=1 p230=1 p222=1 p272=1 p270=1 p214=1 p206=1 p198=1 p190=1 p171=1 p236=1 p177=1 p173=1 p275=1 p169=1 p181=1 p165=1 p167=1 p5=1 p161=1 p157=1 p11=1 p153=1 p163=1 p21=1 p159=1 p155=1 p151=1 p3=1 p19=1 p9=1 p13=1 p15=1 p1=1 p7=1 p53=1 p55=1 p120=1 p112=1 p104=1 p146=1 p64=1 p96=1 p88=1 p80=1 p72=1 p49=1 p51=1 p27=1 p47=1 p45=1 p125=1 p149=1 p25=1 p43=1 p31=1 p39=1 p35=1 p41=1 p29=1 p37=1 p33=1 ]
[ p431=1 p427=1 p482=1 p498=1 p474=1 p423=1 p466=1 p524=1 p458=1 p450=1 p442=1 p522=1 p488=1 p527=1 p425=1 p429=1 p421=1 p419=1 p417=1 p413=1 p409=1 p415=1 p433=1 p405=1 p411=1 p407=1 p305=1 p301=1 p403=1 p356=1 p372=1 p348=1 p398=1 p340=1 p332=1 p297=1 p324=1 p316=1 p396=1 p362=1 p401=1 p299=1 p303=1 p295=1 p293=1 p291=1 p287=1 p283=1 p307=1 p279=1 p289=1 p285=1 p281=1 p277=1 p17=1 p179=1 p175=1 p23=1 p246=1 p230=1 p222=1 p272=1 p270=1 p214=1 p206=1 p198=1 p190=1 p171=1 p236=1 p177=1 p173=1 p275=1 p169=1 p181=1 p165=1 p167=1 p5=1 p161=1 p157=1 p11=1 p153=1 p163=1 p21=1 p159=1 p155=1 p151=1 p3=1 p19=1 p9=1 p13=1 p15=1 p1=1 p7=1 p53=1 p55=1 p120=1 p112=1 p104=1 p146=1 p64=1 p96=1 p88=1 p80=1 p72=1 p49=1 p51=1 p27=1 p130=1 p47=1 p45=1 p149=1 p25=1 p43=1 p31=1 p39=1 p35=1 p41=1 p29=1 p37=1 p33=1 ]
[ p431=1 p427=1 p482=1 p498=1 p474=1 p423=1 p466=1 p524=1 p458=1 p450=1 p442=1 p522=1 p488=1 p527=1 p425=1 p429=1 p421=1 p419=1 p417=1 p413=1 p409=1 p415=1 p433=1 p405=1 p411=1 p407=1 p305=1 p301=1 p403=1 p356=1 p372=1 p348=1 p398=1 p340=1 p332=1 p297=1 p324=1 p316=1 p396=1 p362=1 p401=1 p299=1 p303=1 p295=1 p293=1 p291=1 p287=1 p283=1 p307=1 p279=1 p289=1 p285=1 p281=1 p277=1 p17=1 p179=1 p175=1 p23=1 p246=1 p230=1 p222=1 p272=1 p270=1 p214=1 p206=1 p198=1 p190=1 p171=1 p236=1 p177=1 p173=1 p275=1 p169=1 p181=1 p165=1 p167=1 p5=1 p161=1 p157=1 p11=1 p153=1 p163=1 p21=1 p159=1 p155=1 p151=1 p3=1 p19=1 p9=1 p13=1 p15=1 p1=1 p7=1 p53=1 p55=1 p120=1 p112=1 p104=1 p146=1 p64=1 p131=1 p96=1 p88=1 p80=1 p72=1 p49=1 p51=1 p27=1 p47=1 p45=1 p149=1 p25=1 p43=1 p31=1 p39=1 p35=1 p41=1 p29=1 p37=1 p33=1 ]
[ p431=1 p427=1 p482=1 p498=1 p474=1 p423=1 p466=1 p524=1 p458=1 p450=1 p442=1 p522=1 p488=1 p527=1 p425=1 p429=1 p421=1 p419=1 p417=1 p413=1 p409=1 p415=1 p433=1 p405=1 p411=1 p407=1 p305=1 p301=1 p403=1 p356=1 p372=1 p348=1 p398=1 p340=1 p332=1 p297=1 p324=1 p316=1 p396=1 p362=1 p401=1 p299=1 p303=1 p295=1 p293=1 p291=1 p287=1 p283=1 p307=1 p279=1 p289=1 p285=1 p281=1 p277=1 p17=1 p179=1 p175=1 p23=1 p246=1 p230=1 p222=1 p272=1 p270=1 p214=1 p206=1 p198=1 p190=1 p171=1 p236=1 p177=1 p173=1 p275=1 p169=1 p181=1 p165=1 p167=1 p5=1 p161=1 p157=1 p11=1 p153=1 p163=1 p21=1 p159=1 p155=1 p151=1 p3=1 p19=1 p9=1 p13=1 p15=1 p1=1 p7=1 p53=1 p55=1 p120=1 p124=1 p112=1 p104=1 p146=1 p64=1 p96=1 p88=1 p80=1 p72=1 p49=1 p51=1 p27=1 p47=1 p45=1 p149=1 p25=1 p43=1 p31=1 p39=1 p35=1 p41=1 p29=1 p37=1 p33=1 ]
[ p431=1 p427=1 p482=1 p498=1 p474=1 p423=1 p466=1 p524=1 p458=1 p450=1 p442=1 p522=1 p488=1 p527=1 p425=1 p429=1 p421=1 p419=1 p417=1 p413=1 p409=1 p415=1 p433=1 p405=1 p411=1 p407=1 p305=1 p301=1 p403=1 p356=1 p372=1 p348=1 p398=1 p340=1 p332=1 p297=1 p324=1 p316=1 p396=1 p362=1 p401=1 p299=1 p303=1 p295=1 p293=1 p291=1 p287=1 p283=1 p307=1 p279=1 p289=1 p285=1 p281=1 p277=1 p17=1 p179=1 p175=1 p23=1 p246=1 p230=1 p222=1 p272=1 p270=1 p214=1 p206=1 p198=1 p190=1 p171=1 p236=1 p177=1 p173=1 p275=1 p169=1 p181=1 p165=1 p167=1 p5=1 p161=1 p157=1 p11=1 p153=1 p163=1 p21=1 p159=1 p155=1 p151=1 p3=1 p19=1 p9=1 p13=1 p15=1 p1=1 p7=1 p53=1 p55=1 p144=1 p112=1 p104=1 p146=1 p64=1 p96=1 p88=1 p80=1 p72=1 p49=1 p51=1 p27=1 p115=1 p47=1 p45=1 p149=1 p25=1 p43=1 p31=1 p39=1 p35=1 p41=1 p29=1 p37=1 p33=1 ]
[ p431=1 p427=1 p482=1 p498=1 p474=1 p423=1 p466=1 p524=1 p458=1 p450=1 p442=1 p522=1 p488=1 p527=1 p425=1 p429=1 p421=1 p419=1 p417=1 p413=1 p409=1 p415=1 p433=1 p405=1 p411=1 p407=1 p305=1 p301=1 p403=1 p356=1 p372=1 p348=1 p398=1 p340=1 p332=1 p297=1 p324=1 p316=1 p396=1 p362=1 p401=1 p299=1 p303=1 p295=1 p293=1 p291=1 p287=1 p283=1 p307=1 p279=1 p289=1 p285=1 p281=1 p277=1 p17=1 p179=1 p175=1 p23=1 p246=1 p230=1 p222=1 p272=1 p270=1 p214=1 p206=1 p198=1 p190=1 p171=1 p236=1 p177=1 p173=1 p275=1 p169=1 p181=1 p165=1 p167=1 p5=1 p161=1 p157=1 p11=1 p153=1 p163=1 p21=1 p159=1 p155=1 p151=1 p3=1 p19=1 p9=1 p13=1 p15=1 p1=1 p7=1 p53=1 p55=1 p144=1 p112=1 p104=1 p146=1 p64=1 p96=1 p88=1 p80=1 p72=1 p118=1 p49=1 p51=1 p27=1 p47=1 p45=1 p149=1 p25=1 p43=1 p31=1 p39=1 p35=1 p41=1 p29=1 p37=1 p33=1 ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527177025057

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 3:50:00 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 3:50:00 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 3:50:00 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 155 ms
May 24, 2018 3:50:00 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 529 places.
May 24, 2018 3:50:01 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 785 transitions.
May 24, 2018 3:50:01 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 24, 2018 3:50:01 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 38 ms
May 24, 2018 3:50:01 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 203 ms
May 24, 2018 3:50:01 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 10 ms
May 24, 2018 3:50:01 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 785 transitions.
May 24, 2018 3:50:02 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 2 ms
May 24, 2018 3:50:02 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 400 transitions.
May 24, 2018 3:50:03 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 124 place invariants in 132 ms
May 24, 2018 3:50:05 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 472 variables to be positive in 2064 ms
May 24, 2018 3:50:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 400 transitions.
May 24, 2018 3:50:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/400 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 3:50:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 50 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 3:50:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 400 transitions.
May 24, 2018 3:50:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 38 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 3:50:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 400 transitions.
May 24, 2018 3:50:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/400) took 3146 ms. Total solver calls (SAT/UNSAT): 94(62/32)
May 24, 2018 3:50:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/400) took 6152 ms. Total solver calls (SAT/UNSAT): 240(152/88)
May 24, 2018 3:50:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/400) took 9324 ms. Total solver calls (SAT/UNSAT): 610(239/371)
May 24, 2018 3:50:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/400) took 12917 ms. Total solver calls (SAT/UNSAT): 758(260/498)
May 24, 2018 3:50:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(109/400) took 15998 ms. Total solver calls (SAT/UNSAT): 969(260/709)
May 24, 2018 3:50:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(142/400) took 19158 ms. Total solver calls (SAT/UNSAT): 1381(320/1061)
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 3:50:24 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 22406ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Parking-PT-432"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Parking-PT-432.tgz
mv Parking-PT-432 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Parking-PT-432, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r116-csrt-152666475400412"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;