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Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r116-csrt-152666475000145
Last Updated
June 26, 2018

About the Execution of ITS-Tools for LamportFastMutEx-PT-7

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.070 3600000.00 9173158.00 738.90 TTF???????TF?T?? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.......................................
/home/mcc/execution
total 612K
-rw-r--r-- 1 mcc users 9.6K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 42K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.8K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 28K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 37K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 13K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 53K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 255K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is LamportFastMutEx-PT-7, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r116-csrt-152666475000145
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-PT-7-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527166737764

FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-01 with value :((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)+x_7)<=(((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)+P_await_13_7))
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-02 with value :((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)>=3)
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-03 with value :(((!((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((P_wait_0_0+P_wait_0_1)+P_wait_0_2)+P_wait_0_3)+P_wait_0_4)+P_wait_0_5)+P_wait_0_6)+P_wait_0_7)+P_wait_1_0)+P_wait_1_1)+P_wait_1_2)+P_wait_1_3)+P_wait_1_4)+P_wait_1_5)+P_wait_1_6)+P_wait_1_7)+P_wait_2_0)+P_wait_2_1)+P_wait_2_2)+P_wait_2_3)+P_wait_2_4)+P_wait_2_5)+P_wait_2_6)+P_wait_2_7)+P_wait_3_0)+P_wait_3_1)+P_wait_3_2)+P_wait_3_3)+P_wait_3_4)+P_wait_3_5)+P_wait_3_6)+P_wait_3_7)+P_wait_4_0)+P_wait_4_1)+P_wait_4_2)+P_wait_4_3)+P_wait_4_4)+P_wait_4_5)+P_wait_4_6)+P_wait_4_7)+P_wait_5_0)+P_wait_5_1)+P_wait_5_2)+P_wait_5_3)+P_wait_5_4)+P_wait_5_5)+P_wait_5_6)+P_wait_5_7)+P_wait_6_0)+P_wait_6_1)+P_wait_6_2)+P_wait_6_3)+P_wait_6_4)+P_wait_6_5)+P_wait_6_6)+P_wait_6_7)+P_wait_7_0)+P_wait_7_1)+P_wait_7_2)+P_wait_7_3)+P_wait_7_4)+P_wait_7_5)+P_wait_7_6)+P_wait_7_7)>=3))&&(((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7))||((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)+P_fordo_12_7))))||((((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)+P_CS_21_7)<=(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)))
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-04 with value :((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7)<=(((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)+P_await_13_7))
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-05 with value :(((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)+P_setbi_5_7)<=(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)+P_setbi_24_7))||((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)+P_fordo_12_7)))
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-06 with value :(!((!((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((P_done_0_0+P_done_0_1)+P_done_0_2)+P_done_0_3)+P_done_0_4)+P_done_0_5)+P_done_0_6)+P_done_0_7)+P_done_1_0)+P_done_1_1)+P_done_1_2)+P_done_1_3)+P_done_1_4)+P_done_1_5)+P_done_1_6)+P_done_1_7)+P_done_2_0)+P_done_2_1)+P_done_2_2)+P_done_2_3)+P_done_2_4)+P_done_2_5)+P_done_2_6)+P_done_2_7)+P_done_3_0)+P_done_3_1)+P_done_3_2)+P_done_3_3)+P_done_3_4)+P_done_3_5)+P_done_3_6)+P_done_3_7)+P_done_4_0)+P_done_4_1)+P_done_4_2)+P_done_4_3)+P_done_4_4)+P_done_4_5)+P_done_4_6)+P_done_4_7)+P_done_5_0)+P_done_5_1)+P_done_5_2)+P_done_5_3)+P_done_5_4)+P_done_5_5)+P_done_5_6)+P_done_5_7)+P_done_6_0)+P_done_6_1)+P_done_6_2)+P_done_6_3)+P_done_6_4)+P_done_6_5)+P_done_6_6)+P_done_6_7)+P_done_7_0)+P_done_7_1)+P_done_7_2)+P_done_7_3)+P_done_7_4)+P_done_7_5)+P_done_7_6)+P_done_7_7)<=(((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)+P_setbi_5_7)))||(((((((((((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)+P_b_4_false)+P_b_4_true)+P_b_5_false)+P_b_5_true)+P_b_6_false)+P_b_6_true)+P_b_7_false)+P_b_7_true)>=1)&&((((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)+P_setbi_11_7)<=(((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)+P_setx_3_7)))))
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-07 with value :(((((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)+P_CS_21_7)<=(((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)+P_ifxi_10_7))&&((((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)+P_setbi_24_7)>=2))
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-08 with value :((((P_b_0_false>=3)||(P_wait_5_7<=P_wait_4_5))||(P_ify0_4_3>=1))&&(P_done_6_6<=P_setbi_11_6))
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-09 with value :(P_setbi_11_4<=P_ifyi_15_3)
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-10 with value :(!(P_start_1_3>=3))
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-11 with value :(((P_done_3_6>=2)&&((P_done_2_7>=2)&&(P_wait_6_6>=3)))&&(P_b_3_false>=1))
Read [reachable] property : LamportFastMutEx-PT-7-ReachabilityCardinality-12 with value :(((P_await_13_2>=1)&&(P_setbi_11_3<=P_wait_2_5))||((P_done_0_7>=1)&&(!(y_3>=3))))
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-13 with value :((((P_setbi_24_0<=P_wait_2_1)||(P_start_1_6<=P_wait_2_2))||((P_ifyi_15_7<=P_sety_9_7)||(P_ifxi_10_6<=P_setbi_5_6)))||(P_done_2_1<=P_awaity_1))
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-14 with value :((P_wait_1_1<=P_wait_5_3)&&((P_wait_4_2<=P_wait_2_0)||(!(P_wait_3_6<=P_done_7_3))))
Read [invariant] property : LamportFastMutEx-PT-7-ReachabilityCardinality-15 with value :((P_setbi_11_4<=P_setbi_5_0)||(P_b_7_true>=2))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 392
// Phase 1: matrix 392 rows 264 cols
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_0_6 + -1'P_await_13_0 + P_done_0_6 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_1_6 + -1'P_await_13_1 + P_done_1_6 = 0
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_4_7 + -1'P_await_13_4 + P_done_4_7 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_6_4 + -1'P_await_13_6 + P_done_6_4 = 0
invariant :P_wait_6_5 + -1'P_await_13_6 + P_done_6_5 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_7_4 + -1'P_await_13_7 + P_done_7_4 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_2_6 + -1'P_await_13_2 + P_done_2_6 = 0
invariant :P_wait_6_7 + -1'P_await_13_6 + P_done_6_7 = 0
invariant :P_wait_3_7 + -1'P_await_13_3 + P_done_3_7 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_wait_6_2 + -1'P_await_13_6 + P_done_6_2 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_2_7 + -1'P_await_13_2 + P_done_2_7 = 0
invariant :P_wait_0_7 + -1'P_await_13_0 + P_done_0_7 = 0
invariant :P_wait_5_7 + -1'P_await_13_5 + P_done_5_7 = 0
invariant :P_wait_4_6 + -1'P_await_13_4 + P_done_4_6 = 0
invariant :P_b_7_false + P_b_7_true = 1
invariant :P_wait_7_7 + -1'P_await_13_7 + P_done_7_7 = 0
invariant :P_wait_7_6 + -1'P_await_13_7 + P_done_7_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 + y_7 = 1
invariant :P_wait_7_1 + -1'P_await_13_7 + P_done_7_1 = 0
invariant :P_wait_6_1 + -1'P_await_13_6 + P_done_6_1 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_6_0 + P_done_6_0 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_b_6_false + P_b_6_true = 1
invariant :P_wait_7_5 + -1'P_await_13_7 + P_done_7_5 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_7_0 + P_done_7_0 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_wait_7_2 + -1'P_await_13_7 + P_done_7_2 = 0
invariant :P_wait_5_6 + -1'P_await_13_5 + P_done_5_6 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :P_wait_1_7 + -1'P_await_13_1 + P_done_1_7 = 0
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
invariant :P_wait_7_3 + -1'P_await_13_7 + P_done_7_3 = 0
invariant :P_wait_3_6 + -1'P_await_13_3 + P_done_3_6 = 0
invariant :P_wait_6_6 + -1'P_await_13_6 + P_done_6_6 = 0
invariant :P_wait_6_3 + -1'P_await_13_6 + P_done_6_3 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 + x_7 = 1
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_start_1_7 + P_setx_3_7 + P_setbi_5_7 + P_ify0_4_7 + P_sety_9_7 + P_ifxi_10_7 + P_setbi_11_7 + P_fordo_12_7 + P_await_13_7 + P_ifyi_15_7 + P_awaity_7 + P_CS_21_7 + P_setbi_24_7 = 1
invariant :P_wait_3_0 + P_done_3_0 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 392
// Phase 1: matrix 392 rows 264 cols
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_0_6 + -1'P_await_13_0 + P_done_0_6 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_1_6 + -1'P_await_13_1 + P_done_1_6 = 0
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_4_7 + -1'P_await_13_4 + P_done_4_7 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_6_4 + -1'P_await_13_6 + P_done_6_4 = 0
invariant :P_wait_6_5 + -1'P_await_13_6 + P_done_6_5 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_7_4 + -1'P_await_13_7 + P_done_7_4 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_2_6 + -1'P_await_13_2 + P_done_2_6 = 0
invariant :P_wait_6_7 + -1'P_await_13_6 + P_done_6_7 = 0
invariant :P_wait_3_7 + -1'P_await_13_3 + P_done_3_7 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_wait_6_2 + -1'P_await_13_6 + P_done_6_2 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_2_7 + -1'P_await_13_2 + P_done_2_7 = 0
invariant :P_wait_0_7 + -1'P_await_13_0 + P_done_0_7 = 0
invariant :P_wait_5_7 + -1'P_await_13_5 + P_done_5_7 = 0
invariant :P_wait_4_6 + -1'P_await_13_4 + P_done_4_6 = 0
invariant :P_b_7_false + P_b_7_true = 1
invariant :P_wait_7_7 + -1'P_await_13_7 + P_done_7_7 = 0
invariant :P_wait_7_6 + -1'P_await_13_7 + P_done_7_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 + y_7 = 1
invariant :P_wait_7_1 + -1'P_await_13_7 + P_done_7_1 = 0
invariant :P_wait_6_1 + -1'P_await_13_6 + P_done_6_1 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_6_0 + P_done_6_0 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_b_6_false + P_b_6_true = 1
invariant :P_wait_7_5 + -1'P_await_13_7 + P_done_7_5 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_7_0 + P_done_7_0 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_wait_7_2 + -1'P_await_13_7 + P_done_7_2 = 0
invariant :P_wait_5_6 + -1'P_await_13_5 + P_done_5_6 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :P_wait_1_7 + -1'P_await_13_1 + P_done_1_7 = 0
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
invariant :P_wait_7_3 + -1'P_await_13_7 + P_done_7_3 = 0
invariant :P_wait_3_6 + -1'P_await_13_3 + P_done_3_6 = 0
invariant :P_wait_6_6 + -1'P_await_13_6 + P_done_6_6 = 0
invariant :P_wait_6_3 + -1'P_await_13_6 + P_done_6_3 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 + x_7 = 1
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_start_1_7 + P_setx_3_7 + P_setbi_5_7 + P_ify0_4_7 + P_sety_9_7 + P_ifxi_10_7 + P_setbi_11_7 + P_fordo_12_7 + P_await_13_7 + P_ifyi_15_7 + P_awaity_7 + P_CS_21_7 + P_setbi_24_7 = 1
invariant :P_wait_3_0 + P_done_3_0 = 0
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-10 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-11 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-13 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 17122 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 431 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
LTSmin run took 8990 ms.
Found Violation
FORMULA LamportFastMutEx-PT-7-ReachabilityCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 12:58:59 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 12:58:59 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 12:58:59 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 84 ms
May 24, 2018 12:58:59 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 264 places.
May 24, 2018 12:58:59 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 536 transitions.
May 24, 2018 12:58:59 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 27 ms
May 24, 2018 12:59:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 150 ms
May 24, 2018 12:59:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 165 ms
May 24, 2018 12:59:00 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 5 ms
May 24, 2018 12:59:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 182 ms
May 24, 2018 12:59:00 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 24, 2018 12:59:00 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 536 transitions.
May 24, 2018 12:59:00 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 536 transitions.
May 24, 2018 12:59:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 15 in 702 ms.
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 82 place invariants in 152 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(UNSAT) depth K=0 took 22 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(UNSAT) depth K=0 took 6 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(UNSAT) depth K=0 took 39 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(UNSAT) depth K=0 took 19 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(UNSAT) depth K=0 took 13 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 536 transitions.
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(UNSAT) depth K=0 took 15 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(UNSAT) depth K=0 took 11 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(UNSAT) depth K=0 took 18 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(UNSAT) depth K=0 took 8 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-10(UNSAT) depth K=0 took 15 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-11(UNSAT) depth K=0 took 11 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(UNSAT) depth K=0 took 11 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-13(UNSAT) depth K=0 took 11 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(UNSAT) depth K=0 took 11 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(UNSAT) depth K=0 took 11 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(UNSAT) depth K=1 took 15 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(UNSAT) depth K=1 took 20 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(UNSAT) depth K=1 took 16 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(UNSAT) depth K=1 took 12 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(UNSAT) depth K=1 took 19 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(UNSAT) depth K=1 took 72 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(UNSAT) depth K=1 took 12 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(UNSAT) depth K=1 took 13 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(UNSAT) depth K=1 took 11 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-10(UNSAT) depth K=1 took 7 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 82 place invariants in 111 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-11(UNSAT) depth K=1 took 29 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(UNSAT) depth K=1 took 6 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-13(UNSAT) depth K=1 took 11 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(UNSAT) depth K=1 took 14 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(UNSAT) depth K=1 took 14 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(UNSAT) depth K=2 took 267 ms
May 24, 2018 12:59:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(UNSAT) depth K=2 took 148 ms
May 24, 2018 12:59:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(UNSAT) depth K=2 took 328 ms
May 24, 2018 12:59:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(UNSAT) depth K=2 took 400 ms
May 24, 2018 12:59:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(UNSAT) depth K=2 took 289 ms
May 24, 2018 12:59:03 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 264 variables to be positive in 2391 ms
May 24, 2018 12:59:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 536 transitions.
May 24, 2018 12:59:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/536 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:59:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 62 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:59:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 536 transitions.
May 24, 2018 12:59:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 26 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:59:03 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 264 variables to be positive in 2334 ms
May 24, 2018 12:59:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(UNSAT) depth K=2 took 737 ms
May 24, 2018 12:59:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(UNSAT) depth K=2 took 554 ms
May 24, 2018 12:59:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(UNSAT) depth K=2 took 194 ms
May 24, 2018 12:59:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(UNSAT) depth K=2 took 428 ms
May 24, 2018 12:59:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-10(UNSAT) depth K=2 took 175 ms
May 24, 2018 12:59:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-11(UNSAT) depth K=2 took 337 ms
May 24, 2018 12:59:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(UNSAT) depth K=2 took 176 ms
May 24, 2018 12:59:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-01
May 24, 2018 12:59:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(SAT) depth K=0 took 2078 ms
May 24, 2018 12:59:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-13(UNSAT) depth K=2 took 759 ms
May 24, 2018 12:59:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(UNSAT) depth K=2 took 306 ms
May 24, 2018 12:59:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(UNSAT) depth K=2 took 167 ms
May 24, 2018 12:59:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-7-ReachabilityCardinality-02
May 24, 2018 12:59:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-7-ReachabilityCardinality-02
May 24, 2018 12:59:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(FALSE) depth K=0 took 2150 ms
May 24, 2018 12:59:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-03
May 24, 2018 12:59:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(SAT) depth K=0 took 2185 ms
May 24, 2018 12:59:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(UNSAT) depth K=3 took 5585 ms
May 24, 2018 12:59:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-04
May 24, 2018 12:59:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(SAT) depth K=0 took 3089 ms
May 24, 2018 12:59:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-05
May 24, 2018 12:59:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(SAT) depth K=0 took 1033 ms
May 24, 2018 12:59:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-06
May 24, 2018 12:59:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(SAT) depth K=0 took 713 ms
May 24, 2018 12:59:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-07
May 24, 2018 12:59:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(SAT) depth K=0 took 683 ms
May 24, 2018 12:59:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-08
May 24, 2018 12:59:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(SAT) depth K=0 took 1291 ms
May 24, 2018 12:59:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-09
May 24, 2018 12:59:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(SAT) depth K=0 took 1201 ms
May 24, 2018 12:59:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-PT-7-ReachabilityCardinality-10
May 24, 2018 12:59:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-7-ReachabilityCardinality-10
May 24, 2018 12:59:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-10(TRUE) depth K=0 took 350 ms
May 24, 2018 12:59:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-7-ReachabilityCardinality-11
May 24, 2018 12:59:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-7-ReachabilityCardinality-11
May 24, 2018 12:59:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-11(FALSE) depth K=0 took 358 ms
May 24, 2018 12:59:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-12
May 24, 2018 12:59:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(SAT) depth K=0 took 1238 ms
May 24, 2018 12:59:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-PT-7-ReachabilityCardinality-13
May 24, 2018 12:59:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-7-ReachabilityCardinality-13
May 24, 2018 12:59:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-13(TRUE) depth K=0 took 571 ms
May 24, 2018 12:59:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-02(UNSAT) depth K=3 took 9121 ms
May 24, 2018 12:59:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-14
May 24, 2018 12:59:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(SAT) depth K=0 took 922 ms
May 24, 2018 12:59:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-15
May 24, 2018 12:59:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(SAT) depth K=0 took 901 ms
May 24, 2018 12:59:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(UNSAT) depth K=3 took 5641 ms
May 24, 2018 12:59:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 536 transitions.
May 24, 2018 12:59:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(UNSAT) depth K=3 took 3085 ms
May 24, 2018 12:59:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/536) took 659 ms. Total solver calls (SAT/UNSAT): 73(0/73)
May 24, 2018 12:59:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-01
May 24, 2018 12:59:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(SAT) depth K=1 took 9417 ms
May 24, 2018 12:59:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/536) took 3869 ms. Total solver calls (SAT/UNSAT): 435(14/421)
May 24, 2018 12:59:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-03
May 24, 2018 12:59:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(SAT) depth K=1 took 2623 ms
May 24, 2018 12:59:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/536) took 7010 ms. Total solver calls (SAT/UNSAT): 798(35/763)
May 24, 2018 12:59:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/536) took 10114 ms. Total solver calls (SAT/UNSAT): 1160(49/1111)
May 24, 2018 12:59:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(UNSAT) depth K=3 took 10021 ms
May 24, 2018 12:59:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/536) took 13150 ms. Total solver calls (SAT/UNSAT): 1511(49/1462)
May 24, 2018 12:59:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/536) took 17610 ms. Total solver calls (SAT/UNSAT): 2030(49/1981)
May 24, 2018 12:59:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(UNSAT) depth K=3 took 10471 ms
May 24, 2018 12:59:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/536) took 21943 ms. Total solver calls (SAT/UNSAT): 2540(49/2491)
May 24, 2018 12:59:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/536) took 26223 ms. Total solver calls (SAT/UNSAT): 3041(88/2953)
May 24, 2018 1:00:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/536) took 30426 ms. Total solver calls (SAT/UNSAT): 3533(127/3406)
May 24, 2018 1:00:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(UNSAT) depth K=3 took 9972 ms
May 24, 2018 1:00:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/536) took 34883 ms. Total solver calls (SAT/UNSAT): 4016(165/3851)
May 24, 2018 1:00:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(UNSAT) depth K=3 took 4390 ms
May 24, 2018 1:00:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/536) took 38814 ms. Total solver calls (SAT/UNSAT): 4490(201/4289)
May 24, 2018 1:00:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-04
May 24, 2018 1:00:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(SAT) depth K=1 took 34063 ms
May 24, 2018 1:00:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(UNSAT) depth K=3 took 6014 ms
May 24, 2018 1:00:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/536) took 42711 ms. Total solver calls (SAT/UNSAT): 4955(237/4718)
May 24, 2018 1:00:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-10(UNSAT) depth K=3 took 4763 ms
May 24, 2018 1:00:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/536) took 46843 ms. Total solver calls (SAT/UNSAT): 5411(271/5140)
May 24, 2018 1:00:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-11(UNSAT) depth K=3 took 2512 ms
May 24, 2018 1:00:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-05
May 24, 2018 1:00:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(SAT) depth K=1 took 10227 ms
May 24, 2018 1:00:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/536) took 50970 ms. Total solver calls (SAT/UNSAT): 5858(304/5554)
May 24, 2018 1:00:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(UNSAT) depth K=3 took 4640 ms
May 24, 2018 1:00:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(47/536) took 54686 ms. Total solver calls (SAT/UNSAT): 6296(337/5959)
May 24, 2018 1:00:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/536) took 58486 ms. Total solver calls (SAT/UNSAT): 6725(367/6358)
May 24, 2018 1:00:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-06
May 24, 2018 1:00:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(SAT) depth K=1 took 9840 ms
May 24, 2018 1:00:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-13(UNSAT) depth K=3 took 8008 ms
May 24, 2018 1:00:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/536) took 62292 ms. Total solver calls (SAT/UNSAT): 7145(397/6748)
May 24, 2018 1:00:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/536) took 65743 ms. Total solver calls (SAT/UNSAT): 7556(426/7130)
May 24, 2018 1:00:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/536) took 69270 ms. Total solver calls (SAT/UNSAT): 7958(453/7505)
May 24, 2018 1:00:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(UNSAT) depth K=3 took 8517 ms
May 24, 2018 1:00:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(62/536) took 72570 ms. Total solver calls (SAT/UNSAT): 8351(480/7871)
May 24, 2018 1:00:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(UNSAT) depth K=3 took 4250 ms
May 24, 2018 1:00:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/536) took 75803 ms. Total solver calls (SAT/UNSAT): 8735(505/8230)
May 24, 2018 1:00:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-07
May 24, 2018 1:00:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(SAT) depth K=1 took 17646 ms
May 24, 2018 1:00:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/536) took 78966 ms. Total solver calls (SAT/UNSAT): 9110(529/8581)
May 24, 2018 1:00:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-08
May 24, 2018 1:00:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(SAT) depth K=1 took 3583 ms
May 24, 2018 1:00:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/536) took 82343 ms. Total solver calls (SAT/UNSAT): 9476(553/8923)
May 24, 2018 1:00:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-09
May 24, 2018 1:00:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(SAT) depth K=1 took 2855 ms
May 24, 2018 1:00:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/536) took 86290 ms. Total solver calls (SAT/UNSAT): 9950(581/9369)
May 24, 2018 1:00:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(78/536) took 89388 ms. Total solver calls (SAT/UNSAT): 10295(602/9693)
May 24, 2018 1:01:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/536) took 92818 ms. Total solver calls (SAT/UNSAT): 10695(609/10086)
May 24, 2018 1:01:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-12
May 24, 2018 1:01:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(SAT) depth K=1 took 11212 ms
May 24, 2018 1:01:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/536) took 98021 ms. Total solver calls (SAT/UNSAT): 11266(609/10657)
May 24, 2018 1:01:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-14
May 24, 2018 1:01:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(SAT) depth K=1 took 8161 ms
May 24, 2018 1:01:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/536) took 102678 ms. Total solver calls (SAT/UNSAT): 11833(609/11224)
May 24, 2018 1:01:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/536) took 106962 ms. Total solver calls (SAT/UNSAT): 12396(609/11787)
May 24, 2018 1:01:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(88/536) took 112074 ms. Total solver calls (SAT/UNSAT): 12955(663/12292)
May 24, 2018 1:01:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-15
May 24, 2018 1:01:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(SAT) depth K=1 took 10080 ms
May 24, 2018 1:01:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/536) took 117139 ms. Total solver calls (SAT/UNSAT): 13510(717/12793)
May 24, 2018 1:01:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/536) took 121819 ms. Total solver calls (SAT/UNSAT): 14061(771/13290)
May 24, 2018 1:01:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(94/536) took 126694 ms. Total solver calls (SAT/UNSAT): 14608(824/13784)
May 24, 2018 1:01:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-01
May 24, 2018 1:01:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(SAT) depth K=2 took 14262 ms
May 24, 2018 1:01:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-03
May 24, 2018 1:01:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(SAT) depth K=2 took 4254 ms
May 24, 2018 1:01:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/536) took 131523 ms. Total solver calls (SAT/UNSAT): 15151(876/14275)
May 24, 2018 1:01:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/536) took 136894 ms. Total solver calls (SAT/UNSAT): 15690(928/14762)
May 24, 2018 1:01:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/536) took 141463 ms. Total solver calls (SAT/UNSAT): 16225(980/15245)
May 24, 2018 1:01:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/536) took 146006 ms. Total solver calls (SAT/UNSAT): 16756(1030/15726)
May 24, 2018 1:02:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/536) took 150790 ms. Total solver calls (SAT/UNSAT): 17283(1080/16203)
May 24, 2018 1:02:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/536) took 155195 ms. Total solver calls (SAT/UNSAT): 17806(1130/16676)
May 24, 2018 1:02:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/536) took 159602 ms. Total solver calls (SAT/UNSAT): 18325(1179/17146)
May 24, 2018 1:02:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/536) took 163926 ms. Total solver calls (SAT/UNSAT): 18840(1227/17613)
May 24, 2018 1:02:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-01(UNSAT) depth K=4 took 90575 ms
May 24, 2018 1:02:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(112/536) took 168238 ms. Total solver calls (SAT/UNSAT): 19351(1275/18076)
May 24, 2018 1:02:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/536) took 172822 ms. Total solver calls (SAT/UNSAT): 19858(1323/18535)
May 24, 2018 1:02:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(116/536) took 177750 ms. Total solver calls (SAT/UNSAT): 20361(1369/18992)
May 24, 2018 1:02:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(118/536) took 182906 ms. Total solver calls (SAT/UNSAT): 20860(1415/19445)
May 24, 2018 1:02:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/536) took 187742 ms. Total solver calls (SAT/UNSAT): 21355(1461/19894)
May 24, 2018 1:02:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/536) took 191935 ms. Total solver calls (SAT/UNSAT): 21846(1506/20340)
May 24, 2018 1:02:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/536) took 196374 ms. Total solver calls (SAT/UNSAT): 22333(1550/20783)
May 24, 2018 1:02:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(126/536) took 200862 ms. Total solver calls (SAT/UNSAT): 22816(1594/21222)
May 24, 2018 1:02:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(128/536) took 204982 ms. Total solver calls (SAT/UNSAT): 23295(1638/21657)
May 24, 2018 1:02:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/536) took 209030 ms. Total solver calls (SAT/UNSAT): 23770(1680/22090)
May 24, 2018 1:02:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(UNSAT) depth K=4 took 44925 ms
May 24, 2018 1:03:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/536) took 213162 ms. Total solver calls (SAT/UNSAT): 24241(1722/22519)
May 24, 2018 1:03:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(134/536) took 217129 ms. Total solver calls (SAT/UNSAT): 24708(1764/22944)
May 24, 2018 1:03:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(138/536) took 220527 ms. Total solver calls (SAT/UNSAT): 25107(1792/23315)
May 24, 2018 1:03:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(145/536) took 223843 ms. Total solver calls (SAT/UNSAT): 25495(1813/23682)
May 24, 2018 1:03:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(152/536) took 229119 ms. Total solver calls (SAT/UNSAT): 26057(1834/24223)
May 24, 2018 1:03:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(154/536) took 233055 ms. Total solver calls (SAT/UNSAT): 26512(1901/24611)
May 24, 2018 1:03:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(156/536) took 237366 ms. Total solver calls (SAT/UNSAT): 26963(1964/24999)
May 24, 2018 1:03:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-04
May 24, 2018 1:03:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(SAT) depth K=2 took 110643 ms
May 24, 2018 1:03:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(158/536) took 242527 ms. Total solver calls (SAT/UNSAT): 27410(2023/25387)
May 24, 2018 1:03:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(160/536) took 246687 ms. Total solver calls (SAT/UNSAT): 27853(2051/25802)
May 24, 2018 1:03:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/536) took 250515 ms. Total solver calls (SAT/UNSAT): 28292(2104/26188)
May 24, 2018 1:03:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(164/536) took 254242 ms. Total solver calls (SAT/UNSAT): 28727(2153/26574)
May 24, 2018 1:03:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(166/536) took 257951 ms. Total solver calls (SAT/UNSAT): 29158(2198/26960)
May 24, 2018 1:03:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(168/536) took 261558 ms. Total solver calls (SAT/UNSAT): 29585(2219/27366)
May 24, 2018 1:03:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(170/536) took 265159 ms. Total solver calls (SAT/UNSAT): 30008(2219/27789)
May 24, 2018 1:03:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-05
May 24, 2018 1:03:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(SAT) depth K=2 took 25494 ms
May 24, 2018 1:03:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(172/536) took 268655 ms. Total solver calls (SAT/UNSAT): 30427(2219/28208)
May 24, 2018 1:04:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(174/536) took 272082 ms. Total solver calls (SAT/UNSAT): 30842(2219/28623)
May 24, 2018 1:04:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(UNSAT) depth K=4 took 64948 ms
May 24, 2018 1:04:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(176/536) took 275622 ms. Total solver calls (SAT/UNSAT): 31253(2239/29014)
May 24, 2018 1:04:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(178/536) took 279091 ms. Total solver calls (SAT/UNSAT): 31660(2279/29381)
May 24, 2018 1:04:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(180/536) took 282495 ms. Total solver calls (SAT/UNSAT): 32063(2319/29744)
May 24, 2018 1:04:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(182/536) took 285854 ms. Total solver calls (SAT/UNSAT): 32462(2359/30103)
May 24, 2018 1:04:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(184/536) took 289202 ms. Total solver calls (SAT/UNSAT): 32857(2398/30459)
May 24, 2018 1:04:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(186/536) took 292482 ms. Total solver calls (SAT/UNSAT): 33248(2436/30812)
May 24, 2018 1:04:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(188/536) took 295730 ms. Total solver calls (SAT/UNSAT): 33635(2474/31161)
May 24, 2018 1:04:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(190/536) took 298998 ms. Total solver calls (SAT/UNSAT): 34018(2512/31506)
May 24, 2018 1:04:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(192/536) took 302423 ms. Total solver calls (SAT/UNSAT): 34397(2549/31848)
May 24, 2018 1:04:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(194/536) took 305618 ms. Total solver calls (SAT/UNSAT): 34772(2585/32187)
May 24, 2018 1:04:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(196/536) took 308790 ms. Total solver calls (SAT/UNSAT): 35143(2621/32522)
May 24, 2018 1:04:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(198/536) took 312228 ms. Total solver calls (SAT/UNSAT): 35510(2657/32853)
May 24, 2018 1:04:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(200/536) took 315938 ms. Total solver calls (SAT/UNSAT): 35873(2692/33181)
May 24, 2018 1:04:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(202/536) took 318987 ms. Total solver calls (SAT/UNSAT): 36232(2726/33506)
May 24, 2018 1:04:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(204/536) took 322014 ms. Total solver calls (SAT/UNSAT): 36587(2760/33827)
May 24, 2018 1:04:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(207/536) took 326438 ms. Total solver calls (SAT/UNSAT): 37112(2811/34301)
May 24, 2018 1:04:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(209/536) took 330231 ms. Total solver calls (SAT/UNSAT): 37457(2843/34614)
May 24, 2018 1:05:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(212/536) took 334586 ms. Total solver calls (SAT/UNSAT): 37967(2891/35076)
May 24, 2018 1:05:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(UNSAT) depth K=4 took 64174 ms
May 24, 2018 1:05:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(215/536) took 338831 ms. Total solver calls (SAT/UNSAT): 38468(2939/35529)
May 24, 2018 1:05:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(218/536) took 343123 ms. Total solver calls (SAT/UNSAT): 38960(2984/35976)
May 24, 2018 1:05:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(221/536) took 347246 ms. Total solver calls (SAT/UNSAT): 39443(3029/36414)
May 24, 2018 1:05:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(224/536) took 351246 ms. Total solver calls (SAT/UNSAT): 39917(3073/36844)
May 24, 2018 1:05:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(227/536) took 355185 ms. Total solver calls (SAT/UNSAT): 40382(3115/37267)
May 24, 2018 1:05:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(230/536) took 359142 ms. Total solver calls (SAT/UNSAT): 40838(3157/37681)
May 24, 2018 1:05:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(234/536) took 362727 ms. Total solver calls (SAT/UNSAT): 41264(3171/38093)
May 24, 2018 1:05:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(238/536) took 365734 ms. Total solver calls (SAT/UNSAT): 41618(3171/38447)
May 24, 2018 1:05:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(243/536) took 369450 ms. Total solver calls (SAT/UNSAT): 42038(3202/38836)
May 24, 2018 1:05:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(248/536) took 372858 ms. Total solver calls (SAT/UNSAT): 42433(3231/39202)
May 24, 2018 1:05:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(253/536) took 376051 ms. Total solver calls (SAT/UNSAT): 42803(3256/39547)
May 24, 2018 1:05:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(259/536) took 379602 ms. Total solver calls (SAT/UNSAT): 43214(3282/39932)
May 24, 2018 1:05:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(265/536) took 382826 ms. Total solver calls (SAT/UNSAT): 43589(3304/40285)
May 24, 2018 1:05:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(272/536) took 386542 ms. Total solver calls (SAT/UNSAT): 43981(3324/40657)
May 24, 2018 1:05:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(279/536) took 389755 ms. Total solver calls (SAT/UNSAT): 44324(3338/40986)
May 24, 2018 1:06:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(287/536) took 392827 ms. Total solver calls (SAT/UNSAT): 44656(3346/41310)
May 24, 2018 1:06:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(297/536) took 396083 ms. Total solver calls (SAT/UNSAT): 45021(3374/41647)
May 24, 2018 1:06:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(308/536) took 399255 ms. Total solver calls (SAT/UNSAT): 45380(3395/41985)
May 24, 2018 1:06:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(319/536) took 402522 ms. Total solver calls (SAT/UNSAT): 45722(3395/42327)
May 24, 2018 1:06:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(331/536) took 405774 ms. Total solver calls (SAT/UNSAT): 46100(3496/42604)
May 24, 2018 1:06:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(343/536) took 408843 ms. Total solver calls (SAT/UNSAT): 46448(3581/42867)
May 24, 2018 1:06:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(355/536) took 411879 ms. Total solver calls (SAT/UNSAT): 46792(3653/43139)
May 24, 2018 1:06:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(368/536) took 415118 ms. Total solver calls (SAT/UNSAT): 47131(3704/43427)
May 24, 2018 1:06:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(378/536) took 418128 ms. Total solver calls (SAT/UNSAT): 47361(3731/43630)
May 24, 2018 1:06:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(385/536) took 421661 ms. Total solver calls (SAT/UNSAT): 47715(3731/43984)
May 24, 2018 1:06:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(388/536) took 424855 ms. Total solver calls (SAT/UNSAT): 48096(3731/44365)
May 24, 2018 1:06:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-06
May 24, 2018 1:06:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(SAT) depth K=2 took 158963 ms
May 24, 2018 1:06:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(391/536) took 428015 ms. Total solver calls (SAT/UNSAT): 48468(3745/44723)
May 24, 2018 1:06:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(394/536) took 431298 ms. Total solver calls (SAT/UNSAT): 48831(3784/45047)
May 24, 2018 1:06:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(397/536) took 434438 ms. Total solver calls (SAT/UNSAT): 49185(3823/45362)
May 24, 2018 1:06:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-07
May 24, 2018 1:06:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(SAT) depth K=2 took 8873 ms
May 24, 2018 1:06:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(401/536) took 438380 ms. Total solver calls (SAT/UNSAT): 49643(3873/45770)
May 24, 2018 1:06:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(404/536) took 441555 ms. Total solver calls (SAT/UNSAT): 49976(3909/46067)
May 24, 2018 1:06:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(407/536) took 444665 ms. Total solver calls (SAT/UNSAT): 50300(3945/46355)
May 24, 2018 1:06:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(410/536) took 447783 ms. Total solver calls (SAT/UNSAT): 50615(3978/46637)
May 24, 2018 1:07:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(413/536) took 451391 ms. Total solver calls (SAT/UNSAT): 50921(4011/46910)
May 24, 2018 1:07:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(417/536) took 454702 ms. Total solver calls (SAT/UNSAT): 51315(4053/47262)
May 24, 2018 1:07:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(421/536) took 457987 ms. Total solver calls (SAT/UNSAT): 51693(4093/47600)
May 24, 2018 1:07:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-08
May 24, 2018 1:07:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(SAT) depth K=2 took 25870 ms
May 24, 2018 1:07:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(425/536) took 461222 ms. Total solver calls (SAT/UNSAT): 52055(4131/47924)
May 24, 2018 1:07:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(429/536) took 464277 ms. Total solver calls (SAT/UNSAT): 52401(4167/48234)
May 24, 2018 1:07:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(433/536) took 467563 ms. Total solver calls (SAT/UNSAT): 52731(4201/48530)
May 24, 2018 1:07:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(436/536) took 470697 ms. Total solver calls (SAT/UNSAT): 52968(4225/48743)
May 24, 2018 1:07:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(UNSAT) depth K=4 took 131957 ms
May 24, 2018 1:07:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-09
May 24, 2018 1:07:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(SAT) depth K=2 took 12870 ms
May 24, 2018 1:07:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(441/536) took 474014 ms. Total solver calls (SAT/UNSAT): 53343(4256/49087)
May 24, 2018 1:07:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(446/536) took 477398 ms. Total solver calls (SAT/UNSAT): 53693(4291/49402)
May 24, 2018 1:07:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(458/536) took 480626 ms. Total solver calls (SAT/UNSAT): 54060(4298/49762)
May 24, 2018 1:07:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(464/536) took 483759 ms. Total solver calls (SAT/UNSAT): 54417(4304/50113)
May 24, 2018 1:07:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(471/536) took 487091 ms. Total solver calls (SAT/UNSAT): 54788(4346/50442)
May 24, 2018 1:07:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(479/536) took 490475 ms. Total solver calls (SAT/UNSAT): 55152(4386/50766)
May 24, 2018 1:07:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(488/536) took 493550 ms. Total solver calls (SAT/UNSAT): 55485(4421/51064)
May 24, 2018 1:07:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(500/536) took 496662 ms. Total solver calls (SAT/UNSAT): 55803(4452/51351)
May 24, 2018 1:07:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 498797 ms. Total solver calls (SAT/UNSAT): 56020(4466/51554)
May 24, 2018 1:07:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 536 transitions.
May 24, 2018 1:07:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 105 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 1:07:48 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 528514ms conformant to PINS in folder :/home/mcc/execution
May 24, 2018 1:07:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-12
May 24, 2018 1:07:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(SAT) depth K=2 took 34743 ms
May 24, 2018 1:08:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-14
May 24, 2018 1:08:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(SAT) depth K=2 took 25455 ms
May 24, 2018 1:08:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(UNSAT) depth K=4 took 63541 ms
May 24, 2018 1:08:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(UNSAT) depth K=4 took 30980 ms
May 24, 2018 1:09:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-15
May 24, 2018 1:09:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(SAT) depth K=2 took 37822 ms
May 24, 2018 1:09:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(UNSAT) depth K=4 took 23332 ms
May 24, 2018 1:10:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(UNSAT) depth K=4 took 46747 ms
May 24, 2018 1:10:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(UNSAT) depth K=4 took 45268 ms
May 24, 2018 1:11:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(UNSAT) depth K=4 took 24138 ms
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExPT7ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 1:13:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(UNSAT) depth K=5 took 147180 ms
May 24, 2018 1:15:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-03
May 24, 2018 1:15:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(SAT) depth K=3 took 368667 ms
May 24, 2018 1:18:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(UNSAT) depth K=5 took 259666 ms
ITS-tools command line returned an error code 137
May 24, 2018 1:20:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-04
May 24, 2018 1:20:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(SAT) depth K=3 took 319137 ms
May 24, 2018 1:22:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-05
May 24, 2018 1:22:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(SAT) depth K=3 took 123761 ms
May 24, 2018 1:26:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(UNSAT) depth K=5 took 535418 ms
May 24, 2018 1:28:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-06
May 24, 2018 1:28:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(SAT) depth K=3 took 373291 ms
May 24, 2018 1:29:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-07
May 24, 2018 1:29:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(SAT) depth K=3 took 63840 ms
May 24, 2018 1:31:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-08
May 24, 2018 1:31:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(SAT) depth K=3 took 114737 ms
May 24, 2018 1:33:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-09
May 24, 2018 1:33:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(SAT) depth K=3 took 90058 ms
May 24, 2018 1:34:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-12
May 24, 2018 1:34:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(SAT) depth K=3 took 73862 ms
May 24, 2018 1:37:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-14
May 24, 2018 1:37:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(SAT) depth K=3 took 205950 ms
May 24, 2018 1:38:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-15
May 24, 2018 1:38:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(SAT) depth K=3 took 39817 ms
May 24, 2018 1:43:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-06(UNSAT) depth K=5 took 995360 ms
May 24, 2018 1:44:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-03
May 24, 2018 1:44:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-03(SAT) depth K=4 took 366524 ms
May 24, 2018 1:46:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-07(UNSAT) depth K=5 took 177671 ms
May 24, 2018 1:48:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-08(UNSAT) depth K=5 took 124119 ms
May 24, 2018 1:50:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-09(UNSAT) depth K=5 took 87028 ms
May 24, 2018 1:51:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-12(UNSAT) depth K=5 took 87679 ms
May 24, 2018 1:52:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-04
May 24, 2018 1:52:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-04(SAT) depth K=4 took 456535 ms
May 24, 2018 1:53:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-14(UNSAT) depth K=5 took 113095 ms
May 24, 2018 1:54:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-15(UNSAT) depth K=5 took 84232 ms
May 24, 2018 1:56:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-7-ReachabilityCardinality-05
May 24, 2018 1:56:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-7-ReachabilityCardinality-05(SAT) depth K=4 took 248143 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-7"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-7.tgz
mv LamportFastMutEx-PT-7 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-PT-7, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r116-csrt-152666475000145"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;