About the Execution of ITS-Tools for LamportFastMutEx-PT-5
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15755.810 | 99006.00 | 373080.00 | 248.30 | FTFTTTFTFFFTFFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 472K
-rw-r--r-- 1 mcc users 7.6K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 34K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 28K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.4K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 32K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.1K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 152K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is LamportFastMutEx-PT-5, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r116-csrt-152666475000133
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-00
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-01
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-02
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-03
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-04
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-05
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-06
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-07
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-08
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-09
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-10
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-11
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-12
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-13
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-14
FORMULA_NAME LamportFastMutEx-PT-5-ReachabilityFireability-15
=== Now, execution of the tool begins
BK_START 1527165500680
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityFireability.pnml.gal, -t, CGAL, -reachable-file, ReachabilityFireability.prop, --nowitness], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityFireability.pnml.gal -t CGAL -reachable-file ReachabilityFireability.prop --nowitness
Loading property file ReachabilityFireability.prop.
Read [invariant] property : LamportFastMutEx-PT-5-ReachabilityFireability-00 with value :((!(((((((((y_0>=1)&&(P_ifyi_15_0>=1))||((y_1>=1)&&(P_ifyi_15_1>=1)))||((y_2>=1)&&(P_ifyi_15_2>=1)))||((y_3>=1)&&(P_ifyi_15_3>=1)))||((y_4>=1)&&(P_ifyi_15_4>=1)))||((y_5>=1)&&(P_ifyi_15_5>=1)))&&(((((((((((((P_b_0_false>=1)&&(P_setbi_11_0>=1))||((P_b_0_true>=1)&&(P_setbi_11_0>=1)))||((P_b_1_false>=1)&&(P_setbi_11_1>=1)))||((P_b_1_true>=1)&&(P_setbi_11_1>=1)))||((P_b_2_false>=1)&&(P_setbi_11_2>=1)))||((P_b_2_true>=1)&&(P_setbi_11_2>=1)))||((P_b_3_false>=1)&&(P_setbi_11_3>=1)))||((P_b_3_true>=1)&&(P_setbi_11_3>=1)))||((P_b_4_false>=1)&&(P_setbi_11_4>=1)))||((P_b_4_true>=1)&&(P_setbi_11_4>=1)))||((P_b_5_false>=1)&&(P_setbi_11_5>=1)))||((P_b_5_true>=1)&&(P_setbi_11_5>=1))))||((((((P_fordo_12_0>=1)||(P_fordo_12_1>=1))||(P_fordo_12_2>=1))||(P_fordo_12_3>=1))||(P_fordo_12_4>=1))||(P_fordo_12_5>=1))))||(!(((((((((y_0>=1)&&(P_awaity_0>=1))||((y_0>=1)&&(P_awaity_1>=1)))||((y_0>=1)&&(P_awaity_2>=1)))||((y_0>=1)&&(P_awaity_3>=1)))||((y_0>=1)&&(P_awaity_4>=1)))||((y_0>=1)&&(P_awaity_5>=1)))||(((((((((((((((((((((((((((((((((((((y_0>=1)&&(P_sety_9_0>=1))||((y_1>=1)&&(P_sety_9_0>=1)))||((y_2>=1)&&(P_sety_9_0>=1)))||((y_3>=1)&&(P_sety_9_0>=1)))||((y_4>=1)&&(P_sety_9_0>=1)))||((y_5>=1)&&(P_sety_9_0>=1)))||((y_0>=1)&&(P_sety_9_1>=1)))||((y_1>=1)&&(P_sety_9_1>=1)))||((y_2>=1)&&(P_sety_9_1>=1)))||((y_3>=1)&&(P_sety_9_1>=1)))||((y_4>=1)&&(P_sety_9_1>=1)))||((y_5>=1)&&(P_sety_9_1>=1)))||((y_0>=1)&&(P_sety_9_2>=1)))||((y_1>=1)&&(P_sety_9_2>=1)))||((y_2>=1)&&(P_sety_9_2>=1)))||((y_3>=1)&&(P_sety_9_2>=1)))||((y_4>=1)&&(P_sety_9_2>=1)))||((y_5>=1)&&(P_sety_9_2>=1)))||((y_0>=1)&&(P_sety_9_3>=1)))||((y_1>=1)&&(P_sety_9_3>=1)))||((y_2>=1)&&(P_sety_9_3>=1)))||((y_3>=1)&&(P_sety_9_3>=1)))||((y_4>=1)&&(P_sety_9_3>=1)))||((y_5>=1)&&(P_sety_9_3>=1)))||((y_0>=1)&&(P_sety_9_4>=1)))||((y_1>=1)&&(P_sety_9_4>=1)))||((y_2>=1)&&(P_sety_9_4>=1)))||((y_3>=1)&&(P_sety_9_4>=1)))||((y_4>=1)&&(P_sety_9_4>=1)))||((y_5>=1)&&(P_sety_9_4>=1)))||((y_0>=1)&&(P_sety_9_5>=1)))||((y_1>=1)&&(P_sety_9_5>=1)))||((y_2>=1)&&(P_sety_9_5>=1)))||((y_3>=1)&&(P_sety_9_5>=1)))||((y_4>=1)&&(P_sety_9_5>=1)))||((y_5>=1)&&(P_sety_9_5>=1))))&&(!((((((((((((((((((((((((((((((((((((((P_b_0_false>=1)&&(P_wait_0_0>=1))&&(P_await_13_0>=1))||(((P_b_1_false>=1)&&(P_wait_0_1>=1))&&(P_await_13_0>=1)))||(((P_b_2_false>=1)&&(P_wait_0_2>=1))&&(P_await_13_0>=1)))||(((P_b_3_false>=1)&&(P_wait_0_3>=1))&&(P_await_13_0>=1)))||(((P_b_4_false>=1)&&(P_wait_0_4>=1))&&(P_await_13_0>=1)))||(((P_b_5_false>=1)&&(P_wait_0_5>=1))&&(P_await_13_0>=1)))||(((P_b_0_false>=1)&&(P_wait_1_0>=1))&&(P_await_13_1>=1)))||(((P_b_1_false>=1)&&(P_wait_1_1>=1))&&(P_await_13_1>=1)))||(((P_b_2_false>=1)&&(P_wait_1_2>=1))&&(P_await_13_1>=1)))||(((P_b_3_false>=1)&&(P_wait_1_3>=1))&&(P_await_13_1>=1)))||(((P_b_4_false>=1)&&(P_wait_1_4>=1))&&(P_await_13_1>=1)))||(((P_b_5_false>=1)&&(P_wait_1_5>=1))&&(P_await_13_1>=1)))||(((P_b_0_false>=1)&&(P_wait_2_0>=1))&&(P_await_13_2>=1)))||(((P_b_1_false>=1)&&(P_wait_2_1>=1))&&(P_await_13_2>=1)))||(((P_b_2_false>=1)&&(P_wait_2_2>=1))&&(P_await_13_2>=1)))||(((P_b_3_false>=1)&&(P_wait_2_3>=1))&&(P_await_13_2>=1)))||(((P_b_4_false>=1)&&(P_wait_2_4>=1))&&(P_await_13_2>=1)))||(((P_b_5_false>=1)&&(P_wait_2_5>=1))&&(P_await_13_2>=1)))||(((P_b_0_false>=1)&&(P_wait_3_0>=1))&&(P_await_13_3>=1)))||(((P_b_1_false>=1)&&(P_wait_3_1>=1))&&(P_await_13_3>=1)))||(((P_b_2_false>=1)&&(P_wait_3_2>=1))&&(P_await_13_3>=1)))||(((P_b_3_false>=1)&&(P_wait_3_3>=1))&&(P_await_13_3>=1)))||(((P_b_4_false>=1)&&(P_wait_3_4>=1))&&(P_await_13_3>=1)))||(((P_b_5_false>=1)&&(P_wait_3_5>=1))&&(P_await_13_3>=1)))||(((P_b_0_false>=1)&&(P_wait_4_0>=1))&&(P_await_13_4>=1)))||(((P_b_1_false>=1)&&(P_wait_4_1>=1))&&(P_await_13_4>=1)))||(((P_b_2_false>=1)&&(P_wait_4_2>=1))&&(P_await_13_4>=1)))||(((P_b_3_false>=1)&&(P_wait_4_3>=1))&&(P_await_13_4>=1)))||(((P_b_4_false>=1)&&(P_wait_4_4>=1))&&(P_await_13_4>=1)))||(((P_b_5_false>=1)&&(P_wait_4_5>=1))&&(P_await_13_4>=1)))||(((P_b_0_false>=1)&&(P_wait_5_0>=1))&&(P_await_13_5>=1)))||(((P_b_1_false>=1)&&(P_wait_5_1>=1))&&(P_await_13_5>=1)))||(((P_b_2_false>=1)&&(P_wait_5_2>=1))&&(P_await_13_5>=1)))||(((P_b_3_false>=1)&&(P_wait_5_3>=1))&&(P_await_13_5>=1)))||(((P_b_4_false>=1)&&(P_wait_5_4>=1))&&(P_await_13_5>=1)))||(((P_b_5_false>=1)&&(P_wait_5_5>=1))&&(P_await_13_5>=1)))))))
Read [invariant] property : LamportFastMutEx-PT-5-ReachabilityFireability-02 with value :(((((((((((y_0>=1)&&(P_ify0_4_0>=1))||((y_0>=1)&&(P_ify0_4_1>=1)))||((y_0>=1)&&(P_ify0_4_2>=1)))||((y_0>=1)&&(P_ify0_4_3>=1)))||((y_0>=1)&&(P_ify0_4_4>=1)))||((y_0>=1)&&(P_ify0_4_5>=1)))||(((((((((((((((((((((((((((((((((((((y_0>=1)&&(P_CS_21_0>=1))||((y_1>=1)&&(P_CS_21_0>=1)))||((y_2>=1)&&(P_CS_21_0>=1)))||((y_3>=1)&&(P_CS_21_0>=1)))||((y_4>=1)&&(P_CS_21_0>=1)))||((y_5>=1)&&(P_CS_21_0>=1)))||((y_0>=1)&&(P_CS_21_1>=1)))||((y_1>=1)&&(P_CS_21_1>=1)))||((y_2>=1)&&(P_CS_21_1>=1)))||((y_3>=1)&&(P_CS_21_1>=1)))||((y_4>=1)&&(P_CS_21_1>=1)))||((y_5>=1)&&(P_CS_21_1>=1)))||((y_0>=1)&&(P_CS_21_2>=1)))||((y_1>=1)&&(P_CS_21_2>=1)))||((y_2>=1)&&(P_CS_21_2>=1)))||((y_3>=1)&&(P_CS_21_2>=1)))||((y_4>=1)&&(P_CS_21_2>=1)))||((y_5>=1)&&(P_CS_21_2>=1)))||((y_0>=1)&&(P_CS_21_3>=1)))||((y_1>=1)&&(P_CS_21_3>=1)))||((y_2>=1)&&(P_CS_21_3>=1)))||((y_3>=1)&&(P_CS_21_3>=1)))||((y_4>=1)&&(P_CS_21_3>=1)))||((y_5>=1)&&(P_CS_21_3>=1)))||((y_0>=1)&&(P_CS_21_4>=1)))||((y_1>=1)&&(P_CS_21_4>=1)))||((y_2>=1)&&(P_CS_21_4>=1)))||((y_3>=1)&&(P_CS_21_4>=1)))||((y_4>=1)&&(P_CS_21_4>=1)))||((y_5>=1)&&(P_CS_21_4>=1)))||((y_0>=1)&&(P_CS_21_5>=1)))||((y_1>=1)&&(P_CS_21_5>=1)))||((y_2>=1)&&(P_CS_21_5>=1)))||((y_3>=1)&&(P_CS_21_5>=1)))||((y_4>=1)&&(P_CS_21_5>=1)))||((y_5>=1)&&(P_CS_21_5>=1))))||((((((P_fordo_12_0>=1)||(P_fordo_12_1>=1))||(P_fordo_12_2>=1))||(P_fordo_12_3>=1))||(P_fordo_12_4>=1))||(P_fordo_12_5>=1)))||((((((((((((((P_b_0_false>=1)&&(P_setbi_24_0>=1))||((P_b_0_true>=1)&&(P_setbi_24_0>=1)))||((P_b_1_false>=1)&&(P_setbi_24_1>=1)))||((P_b_1_true>=1)&&(P_setbi_24_1>=1)))||((P_b_2_false>=1)&&(P_setbi_24_2>=1)))||((P_b_2_true>=1)&&(P_setbi_24_2>=1)))||((P_b_3_false>=1)&&(P_setbi_24_3>=1)))||((P_b_3_true>=1)&&(P_setbi_24_3>=1)))||((P_b_4_false>=1)&&(P_setbi_24_4>=1)))||((P_b_4_true>=1)&&(P_setbi_24_4>=1)))||((P_b_5_false>=1)&&(P_setbi_24_5>=1)))||((P_b_5_true>=1)&&(P_setbi_24_5>=1)))||(!((((((((((((((((((((((((((((((((((((((P_b_0_false>=1)&&(P_wait_0_0>=1))&&(P_await_13_0>=1))||(((P_b_1_false>=1)&&(P_wait_0_1>=1))&&(P_await_13_0>=1)))||(((P_b_2_false>=1)&&(P_wait_0_2>=1))&&(P_await_13_0>=1)))||(((P_b_3_false>=1)&&(P_wait_0_3>=1))&&(P_await_13_0>=1)))||(((P_b_4_false>=1)&&(P_wait_0_4>=1))&&(P_await_13_0>=1)))||(((P_b_5_false>=1)&&(P_wait_0_5>=1))&&(P_await_13_0>=1)))||(((P_b_0_false>=1)&&(P_wait_1_0>=1))&&(P_await_13_1>=1)))||(((P_b_1_false>=1)&&(P_wait_1_1>=1))&&(P_await_13_1>=1)))||(((P_b_2_false>=1)&&(P_wait_1_2>=1))&&(P_await_13_1>=1)))||(((P_b_3_false>=1)&&(P_wait_1_3>=1))&&(P_await_13_1>=1)))||(((P_b_4_false>=1)&&(P_wait_1_4>=1))&&(P_await_13_1>=1)))||(((P_b_5_false>=1)&&(P_wait_1_5>=1))&&(P_await_13_1>=1)))||(((P_b_0_false>=1)&&(P_wait_2_0>=1))&&(P_await_13_2>=1)))||(((P_b_1_false>=1)&&(P_wait_2_1>=1))&&(P_await_13_2>=1)))||(((P_b_2_false>=1)&&(P_wait_2_2>=1))&&(P_await_13_2>=1)))||(((P_b_3_false>=1)&&(P_wait_2_3>=1))&&(P_await_13_2>=1)))||(((P_b_4_false>=1)&&(P_wait_2_4>=1))&&(P_await_13_2>=1)))||(((P_b_5_false>=1)&&(P_wait_2_5>=1))&&(P_await_13_2>=1)))||(((P_b_0_false>=1)&&(P_wait_3_0>=1))&&(P_await_13_3>=1)))||(((P_b_1_false>=1)&&(P_wait_3_1>=1))&&(P_await_13_3>=1)))||(((P_b_2_false>=1)&&(P_wait_3_2>=1))&&(P_await_13_3>=1)))||(((P_b_3_false>=1)&&(P_wait_3_3>=1))&&(P_await_13_3>=1)))||(((P_b_4_false>=1)&&(P_wait_3_4>=1))&&(P_await_13_3>=1)))||(((P_b_5_false>=1)&&(P_wait_3_5>=1))&&(P_await_13_3>=1)))||(((P_b_0_false>=1)&&(P_wait_4_0>=1))&&(P_await_13_4>=1)))||(((P_b_1_false>=1)&&(P_wait_4_1>=1))&&(P_await_13_4>=1)))||(((P_b_2_false>=1)&&(P_wait_4_2>=1))&&(P_await_13_4>=1)))||(((P_b_3_false>=1)&&(P_wait_4_3>=1))&&(P_await_13_4>=1)))||(((P_b_4_false>=1)&&(P_wait_4_4>=1))&&(P_await_13_4>=1)))||(((P_b_5_false>=1)&&(P_wait_4_5>=1))&&(P_await_13_4>=1)))||(((P_b_0_false>=1)&&(P_wait_5_0>=1))&&(P_await_13_5>=1)))||(((P_b_1_false>=1)&&(P_wait_5_1>=1))&&(P_await_13_5>=1)))||(((P_b_2_false>=1)&&(P_wait_5_2>=1))&&(P_await_13_5>=1)))||(((P_b_3_false>=1)&&(P_wait_5_3>=1))&&(P_await_13_5>=1)))||(((P_b_4_false>=1)&&(P_wait_5_4>=1))&&(P_await_13_5>=1)))||(((P_b_5_false>=1)&&(P_wait_5_5>=1))&&(P_await_13_5>=1))))))&&(((!(((((((y_0>=1)&&(P_ify0_4_0>=1))||((y_0>=1)&&(P_ify0_4_1>=1)))||((y_0>=1)&&(P_ify0_4_2>=1)))||((y_0>=1)&&(P_ify0_4_3>=1)))||((y_0>=1)&&(P_ify0_4_4>=1)))||((y_0>=1)&&(P_ify0_4_5>=1))))||((((((((((((((((((((((((((((((((((((((y_0>=1)&&(P_sety_9_0>=1))||((y_1>=1)&&(P_sety_9_0>=1)))||((y_2>=1)&&(P_sety_9_0>=1)))||((y_3>=1)&&(P_sety_9_0>=1)))||((y_4>=1)&&(P_sety_9_0>=1)))||((y_5>=1)&&(P_sety_9_0>=1)))||((y_0>=1)&&(P_sety_9_1>=1)))||((y_1>=1)&&(P_sety_9_1>=1)))||((y_2>=1)&&(P_sety_9_1>=1)))||((y_3>=1)&&(P_sety_9_1>=1)))||((y_4>=1)&&(P_sety_9_1>=1)))||((y_5>=1)&&(P_sety_9_1>=1)))||((y_0>=1)&&(P_sety_9_2>=1)))||((y_1>=1)&&(P_sety_9_2>=1)))||((y_2>=1)&&(P_sety_9_2>=1)))||((y_3>=1)&&(P_sety_9_2>=1)))||((y_4>=1)&&(P_sety_9_2>=1)))||((y_5>=1)&&(P_sety_9_2>=1)))||((y_0>=1)&&(P_sety_9_3>=1)))||((y_1>=1)&&(P_sety_9_3>=1)))||((y_2>=1)&&(P_sety_9_3>=1)))||((y_3>=1)&&(P_sety_9_3>=1)))||((y_4>=1)&&(P_sety_9_3>=1)))||((y_5>=1)&&(P_sety_9_3>=1)))||((y_0>=1)&&(P_s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Read [reachable] property : LamportFastMutEx-PT-5-ReachabilityFireability-03 with value :(((((((((((((((((((((((((((((((y_1>=1)&&(P_ifyi_15_0>=1))||((y_2>=1)&&(P_ifyi_15_0>=1)))||((y_3>=1)&&(P_ifyi_15_0>=1)))||((y_4>=1)&&(P_ifyi_15_0>=1)))||((y_5>=1)&&(P_ifyi_15_0>=1)))||((y_0>=1)&&(P_ifyi_15_1>=1)))||((y_2>=1)&&(P_ifyi_15_1>=1)))||((y_3>=1)&&(P_ifyi_15_1>=1)))||((y_4>=1)&&(P_ifyi_15_1>=1)))||((y_5>=1)&&(P_ifyi_15_1>=1)))||((y_0>=1)&&(P_ifyi_15_2>=1)))||((y_1>=1)&&(P_ifyi_15_2>=1)))||((y_3>=1)&&(P_ifyi_15_2>=1)))||((y_4>=1)&&(P_ifyi_15_2>=1)))||((y_5>=1)&&(P_ifyi_15_2>=1)))||((y_0>=1)&&(P_ifyi_15_3>=1)))||((y_1>=1)&&(P_ifyi_15_3>=1)))||((y_2>=1)&&(P_ifyi_15_3>=1)))||((y_4>=1)&&(P_ifyi_15_3>=1)))||((y_5>=1)&&(P_ifyi_15_3>=1)))||((y_0>=1)&&(P_ifyi_15_4>=1)))||((y_1>=1)&&(P_ifyi_15_4>=1)))||((y_2>=1)&&(P_ifyi_15_4>=1)))||((y_3>=1)&&(P_ifyi_15_4>=1)))||((y_5>=1)&&(P_ifyi_15_4>=1)))||((y_0>=1)&&(P_ifyi_15_5>=1)))||((y_1>=1)&&(P_ifyi_15_5>=1)))||((y_2>=1)&&(P_ifyi_15_5>=1)))||((y_3>=1)&&(P_ifyi_15_5>=1)))||((y_4>=1)&&(P_ifyi_15_5>=1)))
Read [reachable] property : LamportFastMutEx-PT-5-ReachabilityFireability-04 with value :(((((((((((((((((((((((((((((((y_1>=1)&&(P_ifyi_15_0>=1))||((y_2>=1)&&(P_ifyi_15_0>=1)))||((y_3>=1)&&(P_ifyi_15_0>=1)))||((y_4>=1)&&(P_ifyi_15_0>=1)))||((y_5>=1)&&(P_ifyi_15_0>=1)))||((y_0>=1)&&(P_ifyi_15_1>=1)))||((y_2>=1)&&(P_ifyi_15_1>=1)))||((y_3>=1)&&(P_ifyi_15_1>=1)))||((y_4>=1)&&(P_ifyi_15_1>=1)))||((y_5>=1)&&(P_ifyi_15_1>=1)))||((y_0>=1)&&(P_ifyi_15_2>=1)))||((y_1>=1)&&(P_ifyi_15_2>=1)))||((y_3>=1)&&(P_ifyi_15_2>=1)))||((y_4>=1)&&(P_ifyi_15_2>=1)))||((y_5>=1)&&(P_ifyi_15_2>=1)))||((y_0>=1)&&(P_ifyi_15_3>=1)))||((y_1>=1)&&(P_ifyi_15_3>=1)))||((y_2>=1)&&(P_ifyi_15_3>=1)))||((y_4>=1)&&(P_ifyi_15_3>=1)))||((y_5>=1)&&(P_ifyi_15_3>=1)))||((y_0>=1)&&(P_ifyi_15_4>=1)))||((y_1>=1)&&(P_ifyi_15_4>=1)))||((y_2>=1)&&(P_ifyi_15_4>=1)))||((y_3>=1)&&(P_ifyi_15_4>=1)))||((y_5>=1)&&(P_ifyi_15_4>=1)))||((y_0>=1)&&(P_ifyi_15_5>=1)))||((y_1>=1)&&(P_ifyi_15_5>=1)))||((y_2>=1)&&(P_ifyi_15_5>=1)))||((y_3>=1)&&(P_ifyi_15_5>=1)))||((y_4>=1)&&(P_ifyi_15_5>=1)))
Read [reachable] property : LamportFastMutEx-PT-5-ReachabilityFireability-05 with value :((!((((((((((((((((((((((((((((((((((((((y_0>=1)&&(P_sety_9_0>=1))||((y_1>=1)&&(P_sety_9_0>=1)))||((y_2>=1)&&(P_sety_9_0>=1)))||((y_3>=1)&&(P_sety_9_0>=1)))||((y_4>=1)&&(P_sety_9_0>=1)))||((y_5>=1)&&(P_sety_9_0>=1)))||((y_0>=1)&&(P_sety_9_1>=1)))||((y_1>=1)&&(P_sety_9_1>=1)))||((y_2>=1)&&(P_sety_9_1>=1)))||((y_3>=1)&&(P_sety_9_1>=1)))||((y_4>=1)&&(P_sety_9_1>=1)))||((y_5>=1)&&(P_sety_9_1>=1)))||((y_0>=1)&&(P_sety_9_2>=1)))||((y_1>=1)&&(P_sety_9_2>=1)))||((y_2>=1)&&(P_sety_9_2>=1)))||((y_3>=1)&&(P_sety_9_2>=1)))||((y_4>=1)&&(P_sety_9_2>=1)))||((y_5>=1)&&(P_sety_9_2>=1)))||((y_0>=1)&&(P_sety_9_3>=1)))||((y_1>=1)&&(P_sety_9_3>=1)))||((y_2>=1)&&(P_sety_9_3>=1)))||((y_3>=1)&&(P_sety_9_3>=1)))||((y_4>=1)&&(P_sety_9_3>=1)))||((y_5>=1)&&(P_sety_9_3>=1)))||((y_0>=1)&&(P_sety_9_4>=1)))||((y_1>=1)&&(P_sety_9_4>=1)))||((y_2>=1)&&(P_sety_9_4>=1)))||((y_3>=1)&&(P_sety_9_4>=1)))||((y_4>=1)&&(P_sety_9_4>=1)))||((y_5>=1)&&(P_sety_9_4>=1)))||((y_0>=1)&&(P_sety_9_5>=1)))||((y_1>=1)&&(P_sety_9_5>=1)))||((y_2>=1)&&(P_sety_9_5>=1)))||((y_3>=1)&&(P_sety_9_5>=1)))||((y_4>=1)&&(P_sety_9_5>=1)))||((y_5>=1)&&(P_sety_9_5>=1)))&&(!(((((((y_0>=1)&&(P_ify0_4_0>=1))||((y_0>=1)&&(P_ify0_4_1>=1)))||((y_0>=1)&&(P_ify0_4_2>=1)))||((y_0>=1)&&(P_ify0_4_3>=1)))||((y_0>=1)&&(P_ify0_4_4>=1)))||((y_0>=1)&&(P_ify0_4_5>=1))))))&&((((((((((((((((((((((((((((((((((((((((y_0>=1)&&(P_CS_21_0>=1))||((y_1>=1)&&(P_CS_21_0>=1)))||((y_2>=1)&&(P_CS_21_0>=1)))||((y_3>=1)&&(P_CS_21_0>=1)))||((y_4>=1)&&(P_CS_21_0>=1)))||((y_5>=1)&&(P_CS_21_0>=1)))||((y_0>=1)&&(P_CS_21_1>=1)))||((y_1>=1)&&(P_CS_21_1>=1)))||((y_2>=1)&&(P_CS_21_1>=1)))||((y_3>=1)&&(P_CS_21_1>=1)))||((y_4>=1)&&(P_CS_21_1>=1)))||((y_5>=1)&&(P_CS_21_1>=1)))||((y_0>=1)&&(P_CS_21_2>=1)))||((y_1>=1)&&(P_CS_21_2>=1)))||((y_2>=1)&&(P_CS_21_2>=1)))||((y_3>=1)&&(P_CS_21_2>=1)))||((y_4>=1)&&(P_CS_21_2>=1)))||((y_5>=1)&&(P_CS_21_2>=1)))||((y_0>=1)&&(P_CS_21_3>=1)))||((y_1>=1)&&(P_CS_21_3>=1)))||((y_2>=1)&&(P_CS_21_3>=1)))||((y_3>=1)&&(P_CS_21_3>=1)))||((y_4>=1)&&(P_CS_21_3>=1)))||((y_5>=1)&&(P_CS_21_3>=1)))||((y_0>=1)&&(P_CS_21_4>=1)))||((y_1>=1)&&(P_CS_21_4>=1)))||((y_2>=1)&&(P_CS_21_4>=1)))||((y_3>=1)&&(P_CS_21_4>=1)))||((y_4>=1)&&(P_CS_21_4>=1)))||((y_5>=1)&&(P_CS_21_4>=1)))||((y_0>=1)&&(P_CS_21_5>=1)))||((y_1>=1)&&(P_CS_21_5>=1)))||((y_2>=1)&&(P_CS_21_5>=1)))||((y_3>=1)&&(P_CS_21_5>=1)))||((y_4>=1)&&(P_CS_21_5>=1)))||((y_5>=1)&&(P_CS_21_5>=1)))&&((((((P_fordo_12_0>=1)||(P_fordo_12_1>=1))||(P_fordo_12_2>=1))||(P_fordo_12_3>=1))||(P_fordo_12_4>=1))||(P_fordo_12_5>=1)))&&((((((((((((((P_b_0_false>=1)&&(P_setbi_11_0>=1))||((P_b_0_true>=1)&&(P_setbi_11_0>=1)))||((P_b_1_false>=1)&&(P_setbi_11_1>=1)))||((P_b_1_true>=1)&&(P_setbi_11_1>=1)))||((P_b_2_false>=1)&&(P_setbi_11_2>=1)))||((P_b_2_true>=1)&&(P_setbi_11_2>=1)))||((P_b_3_false>=1)&&(P_setbi_11_3>=1)))||((P_b_3_true>=1)&&(P_setbi_11_3>=1)))||((P_b_4_false>=1)&&(P_setbi_11_4>=1)))||((P_b_4_true>=1)&&(P_setbi_11_4>=1)))||((P_b_5_false>=1)&&(P_setbi_11_5>=1)))||((P_b_5_true>=1)&&(P_setbi_11_5>=1)))&&((((((((((((((((((((((((((((((((((((((P_b_0_false>=1)&&(P_wait_0_0>=1))&&(P_await_13_0>=1))||(((P_b_1_false>=1)&&(P_wait_0_1>=1))&&(P_await_13_0>=1)))||(((P_b_2_false>=1)&&(P_wait_0_2>=1))&&(P_await_13_0>=1)))||(((P_b_3_false>=1)&&(P_wait_0_3>=1))&&(P_await_13_0>=1)))||(((P_b_4_false>=1)&&(P_wait_0_4>=1))&&(P_await_13_0>=1)))||(((P_b_5_false>=1)&&(P_wait_0_5>=1))&&(P_await_13_0>=1)))||(((P_b_0_false>=1)&&(P_wait_1_0>=1))&&(P_await_13_1>=1)))||(((P_b_1_false>=1)&&(P_wait_1_1>=1))&&(P_await_13_1>=1)))||(((P_b_2_false>=1)&&(P_wait_1_2>=1))&&(P_await_13_1>=1)))||(((P_b_3_false>=1)&&(P_wait_1_3>=1))&&(P_await_13_1>=1)))||(((P_b_4_false>=1)&&(P_wait_1_4>=1))&&(P_await_13_1>=1)))||(((P_b_5_false>=1)&&(P_wait_1_5>=1))&&(P_await_13_1>=1)))||(((P_b_0_false>=1)&&(P_wait_2_0>=1))&&(P_await_13_2>=1)))||(((P_b_1_false>=1)&&(P_wait_2_1>=1))&&(P_await_13_2>=1)))||(((P_b_2_false>=1)&&(P_wait_2_2>=1))&&(P_await_13_2>=1)))||(((P_b_3_false>=1)&&(P_wait_2_3>=1))&&(P_await_13_2>=1)))||(((P_b_4_false>=1)&&(P_wait_2_4>=1))&&(P_await_13_2>=1)))||(((P_b_5_false>=1)&&(P_wait_2_5>=1))&&(P_await_13_2>=1)))||(((P_b_0_false>=1)&&(P_wait_3_0>=1))&&(P_await_13_3>=1)))||(((P_b_1_false>=1)&&(P_wait_3_1>=1))&&(P_await_13_3>=1)))||(((P_b_2_false>=1)&&(P_wait_3_2>=1))&&(P_await_13_3>=1)))||(((P_b_3_false>=1)&&(P_wait_3_3>=1))&&(P_await_13_3>=1)))||(((P_b_4_false>=1)&&(P_wait_3_4>=1))&&(P_await_13_3>=1)))||(((P_b_5_false>=1)&&(P_wait_3_5>=1))&&(P_await_13_3>=1)))||(((P_b_0_false>=1)&&(P_wait_4_0>=1))&&(P_await_13_4>=1)))||(((P_b_1_false>=1)&&(P_wait_4_1>=1))&&(P_await_13_4>=1)))||(((P_b_2_false>=1)&&(P_wait_4_2>=1))&&(P_await_13_4>=1)))||(((P_b_3_false>=1)&&(P_wait_4_3>=1))&&(P_await_13_4>=1)))||(((P_b_4_false>=1)&&(P_wait_4_4>=1))&&(P_await_13_4>=1)))||(((P_b_5_false>=1)&&(P_wait_4_5>=1))&&(P_await_13_4>=1)))||(((P_b_0_false>=1)&&(P_wait_5_0>=1))&&(P_await_13_5>=1)))||(((P_b_1_false>=1)&&(P_wait_5_1>=1))&&(P_await_13_5>=1)))||(((P_b_2_false>=1)&&(P_wait_5_2>=1))&&(P_await_13_5>=1)))||(((P_b_3_false>=1)&&(P_wait_5_3>=1))&&(P_await_13_5>=1)))||(((P_b_4_false>=1)&&(P_wait_5_4>=1))&&(P_await_13_5>=1)))||(((P_b_5_false>=1)&&(P_wait_5_5>=1))&&(P_await_13_5>=1)))))&&(((((((((((P_await_13_0>=1)&&(P_done_0_1>=1))&&(P_done_0_2>=1))&&(P_done_0_3>=1))&&(P_done_0_4>=1))&&(P_done_0_5>=1))||((((((P_await_13_1>=1)&&(P_done_1_1>=1))&&(P_done_1_2>=1))&&(P_done_1_3>=1))&&(P_done_1_4>=1))&&(P_done_1_5>=1)))||((((((P_await_13_2>=1)&&(P_done_2_1>=1))&&(P_done_2_2>=1))&&(P_done_2_3>=1))&&(P_done_2_4>=1))&&(P_done_2_5>=1)))||((((((P_await_13_3>=1)&&(P_done_3_1>=1))&&(P_done_3_2>=1))&&(P_done_3_3>=1))&&(P_done_3_4>=1))&&(P_done_3_5>=1)))||((((((P_await_13_4>=1)&&(P_done_4_1>=1))&&(P_done_4_2>=1))&&(P_done_4_3>=1))&&(P_done_4_4>=1))&&(P_done_4_5>=1)))||((((((P_await_13_5>=1)&&(P_done_5_1>=1))&&(P_done_5_2>=1))&&(P_done_5_3>=1))&&(P_done_5_4>=1))&&(P_done_5_5>=1)))))
Read [reachable] property : LamportFastMutEx-PT-5-ReachabilityFireability-06 with value :(!(((!(((((((((((((((((((((((((((((((((((((y_0>=1)&&(P_CS_21_0>=1))||((y_1>=1)&&(P_CS_21_0>=1)))||((y_2>=1)&&(P_CS_21_0>=1)))||((y_3>=1)&&(P_CS_21_0>=1)))||((y_4>=1)&&(P_CS_21_0>=1)))||((y_5>=1)&&(P_CS_21_0>=1)))||((y_0>=1)&&(P_CS_21_1>=1)))||((y_1>=1)&&(P_CS_21_1>=1)))||((y_2>=1)&&(P_CS_21_1>=1)))||((y_3>=1)&&(P_CS_21_1>=1)))||((y_4>=1)&&(P_CS_21_1>=1)))||((y_5>=1)&&(P_CS_21_1>=1)))||((y_0>=1)&&(P_CS_21_2>=1)))||((y_1>=1)&&(P_CS_21_2>=1)))||((y_2>=1)&&(P_CS_21_2>=1)))||((y_3>=1)&&(P_CS_21_2>=1)))||((y_4>=1)&&(P_CS_21_2>=1)))||((y_5>=1)&&(P_CS_21_2>=1)))||((y_0>=1)&&(P_CS_21_3>=1)))||((y_1>=1)&&(P_CS_21_3>=1)))||((y_2>=1)&&(P_CS_21_3>=1)))||((y_3>=1)&&(P_CS_21_3>=1)))||((y_4>=1)&&(P_CS_21_3>=1)))||((y_5>=1)&&(P_CS_21_3>=1)))||((y_0>=1)&&(P_CS_21_4>=1)))||((y_1>=1)&&(P_CS_21_4>=1)))||((y_2>=1)&&(P_CS_21_4>=1)))||((y_3>=1)&&(P_CS_21_4>=1)))||((y_4>=1)&&(P_CS_21_4>=1)))||((y_5>=1)&&(P_CS_21_4>=1)))||((y_0>=1)&&(P_CS_21_5>=1)))||((y_1>=1)&&(P_CS_21_5>=1)))||((y_2>=1)&&(P_CS_21_5>=1)))||((y_3>=1)&&(P_CS_21_5>=1)))||((y_4>=1)&&(P_CS_21_5>=1)))||((y_5>=1)&&(P_CS_21_5>=1))))||(((((((((((((((((((((((((((((((y_1>=1)&&(P_ify0_4_0>=1))||((y_2>=1)&&(P_ify0_4_0>=1)))||((y_3>=1)&&(P_ify0_4_0>=1)))||((y_4>=1)&&(P_ify0_4_0>=1)))||((y_5>=1)&&(P_ify0_4_0>=1)))||((y_1>=1)&&(P_ify0_4_1>=1)))||((y_2>=1)&&(P_ify0_4_1>=1)))||((y_3>=1)&&(P_ify0_4_1>=1)))||((y_4>=1)&&(P_ify0_4_1>=1)))||((y_5>=1)&&(P_ify0_4_1>=1)))||((y_1>=1)&&(P_ify0_4_2>=1)))||((y_2>=1)&&(P_ify0_4_2>=1)))||((y_3>=1)&&(P_ify0_4_2>=1)))||((y_4>=1)&&(P_ify0_4_2>=1)))||((y_5>=1)&&(P_ify0_4_2>=1)))||((y_1>=1)&&(P_ify0_4_3>=1)))||((y_2>=1)&&(P_ify0_4_3>=1)))||((y_3>=1)&&(P_ify0_4_3>=1)))||((y_4>=1)&&(P_ify0_4_3>=1)))||((y_5>=1)&&(P_ify0_4_3>=1)))||((y_1>=1)&&(P_ify0_4_4>=1)))||((y_2>=1)&&(P_ify0_4_4>=1)))||((y_3>=1)&&(P_ify0_4_4>=1)))||((y_4>=1)&&(P_ify0_4_4>=1)))||((y_5>=1)&&(P_ify0_4_4>=1)))||((y_1>=1)&&(P_ify0_4_5>=1)))||((y_2>=1)&&(P_ify0_4_5>=1)))||((y_3>=1)&&(P_ify0_4_5>=1)))||((y_4>=1)&&(P_ify0_4_5>=1)))||((y_5>=1)&&(P_ify0_4_5>=1))))||((!(((((((((((((((((((((((((((((((y_1>=1)&&(P_ify0_4_0>=1))||((y_2>=1)&&(P_ify0_4_0>=1)))||((y_3>=1)&&(P_ify0_4_0>=1)))||((y_4>=1)&&(P_ify0_4_0>=1)))||((y_5>=1)&&(P_ify0_4_0>=1)))||((y_1>=1)&&(P_ify0_4_1>=1)))||((y_2>=1)&&(P_ify0_4_1>=1)))||((y_3>=1)&&(P_ify0_4_1>=1)))||((y_4>=1)&&(P_ify0_4_1>=1)))||((y_5>=1)&&(P_ify0_4_1>=1)))||((y_1>=1)&&(P_ify0_4_2>=1)))||((y_2>=1)&&(P_ify0_4_2>=1)))||((y_3>=1)&&(P_ify0_4_2>=1)))||((y_4>=1)&&(P_ify0_4_2>=1)))||((y_5>=1)&&(P_ify0_4_2>=1)))||((y_1>=1)&&(P_ify0_4_3>=1)))||((y_2>=1)&&(P_ify0_4_3>=1)))||((y_3>=1)&&(P_ify0_4_3>=1)))||((y_4>=1)&&(P_ify0_4_3>=1)))||((y_5>=1)&&(P_ify0_4_3>=1)))||((y_1>=1)&&(P_ify0_4_4>=1)))||((y_2>=1)&&(P_ify0_4_4>=1)))||((y_3>=1)&&(P_ify0_4_4>=1)))||((y_4>=1)&&(P_ify0_4_4>=1)))||((y_5>=1)&&(P_ify0_4_4>=1)))||((y_1>=1)&&(P_ify0_4_5>=1)))||((y_2>=1)&&(P_ify0_4_5>=1)))||((y_3>=1)&&(P_ify0_4_5>=1)))||((y_4>=1)&&(P_ify0_4_5>=1)))||((y_5>=1)&&(P_ify0_4_5>=1))))||(!(((((((((((((((((((((((((((((((y_1>=1)&&(P_ifyi_15_0>=1))||((y_2>=1)&&(P_ifyi_15_0>=1)))||((y_3>=1)&&(P_ifyi_15_0>=1)))||((y_4>=1)&&(P_ifyi_15_0>=1)))||((y_5>=1)&&(P_ifyi_15_0>=1)))||((y_0>=1)&&(P_ifyi_15_1>=1)))||((y_2>=1)&&(P_ifyi_15_1>=1)))||((y_3>=1)&&(P_ifyi_15_1>=1)))||((y_4>=1)&&(P_ifyi_15_1>=1)))||((y_5>=1)&&(P_ifyi_15_1>=1)))||((y_0>=1)&&(P_ifyi_15_2>=1)))||((y_1>=1)&&(P_ifyi_15_2>=1)))||((y_3>=1)&&(P_ifyi_15_2>=1)))||((y_4>=1)&&(P_ifyi_15_2>=1)))||((y_5>=1)&&(P_ifyi_15_2>=1)))||((y_0>=1)&&(P_ifyi_15_3>=1)))||((y_1>=1)&&(P_ifyi_15_3>=1)))||((y_2>=1)&&(P_ifyi_15_3>=1)))||((y_4>=1)&&(P_ifyi_15_3>=1)))||((y_5>=1)&&(P_ifyi_15_3>=1)))||((y_0>=1)&&(P_ifyi_15_4>=1)))||((y_1>=1)&&(P_ifyi_15_4>=1)))||((y_2>=1)&&(P_ifyi_15_4>=1)))||((y_3>=1)&&(P_ifyi_15_4>=1)))||((y_5>=1)&&(P_ifyi_15_4>=1)))||((y_0>=1)&&(P_ifyi_15_5>=1)))||((y_1>=1)&&(P_ifyi_15_5>=1)))||((y_2>=1)&&(P_ifyi_15_5>=1)))||((y_3>=1)&&(P_ifyi_15_5>=1)))||((y_4>=1)&&(P_ifyi_15_5>=1)))))))
Read [reachable] property : LamportFastMutEx-PT-5-ReachabilityFireability-07 with value :(((((((((((((((((((((((((((((((((((y_1>=1)&&(P_ify0_4_0>=1))||((y_2>=1)&&(P_ify0_4_0>=1)))||((y_3>=1)&&(P_ify0_4_0>=1)))||((y_4>=1)&&(P_ify0_4_0>=1)))||((y_5>=1)&&(P_ify0_4_0>=1)))||((y_1>=1)&&(P_ify0_4_1>=1)))||((y_2>=1)&&(P_ify0_4_1>=1)))||((y_3>=1)&&(P_ify0_4_1>=1)))||((y_4>=1)&&(P_ify0_4_1>=1)))||((y_5>=1)&&(P_ify0_4_1>=1)))||((y_1>=1)&&(P_ify0_4_2>=1)))||((y_2>=1)&&(P_ify0_4_2>=1)))||((y_3>=1)&&(P_ify0_4_2>=1)))||((y_4>=1)&&(P_ify0_4_2>=1)))||((y_5>=1)&&(P_ify0_4_2>=1)))||((y_1>=1)&&(P_ify0_4_3>=1)))||((y_2>=1)&&(P_ify0_4_3>=1)))||((y_3>=1)&&(P_ify0_4_3>=1)))||((y_4>=1)&&(P_ify0_4_3>=1)))||((y_5>=1)&&(P_ify0_4_3>=1)))||((y_1>=1)&&(P_ify0_4_4>=1)))||((y_2>=1)&&(P_ify0_4_4>=1)))||((y_3>=1)&&(P_ify0_4_4>=1)))||((y_4>=1)&&(P_ify0_4_4>=1)))||((y_5>=1)&&(P_ify0_4_4>=1)))||((y_1>=1)&&(P_ify0_4_5>=1)))||((y_2>=1)&&(P_ify0_4_5>=1)))||((y_3>=1)&&(P_ify0_4_5>=1)))||((y_4>=1)&&(P_ify0_4_5>=1)))||((y_5>=1)&&(P_ify0_4_5>=1)))||(((((((((((((((((((((((((((((((y_1>=1)&&(P_ifyi_15_0>=1))||((y_2>=1)&&(P_ifyi_15_0>=1)))||((y_3>=1)&&(P_ifyi_15_0>=1)))||((y_4>=1)&&(P_ifyi_15_0>=1)))||((y_5>=1)&&(P_ifyi_15_0>=1)))||((y_0>=1)&&(P_ifyi_15_1>=1)))||((y_2>=1)&&(P_ifyi_15_1>=1)))||((y_3>=1)&&(P_ifyi_15_1>=1)))||((y_4>=1)&&(P_ifyi_15_1>=1)))||((y_5>=1)&&(P_ifyi_15_1>=1)))||((y_0>=1)&&(P_ifyi_15_2>=1)))||((y_1>=1)&&(P_ifyi_15_2>=1)))||((y_3>=1)&&(P_ifyi_15_2>=1)))||((y_4>=1)&&(P_ifyi_15_2>=1)))||((y_5>=1)&&(P_ifyi_15_2>=1)))||((y_0>=1)&&(P_ifyi_15_3>=1)))||((y_1>=1)&&(P_ifyi_15_3>=1)))||((y_2>=1)&&(P_ifyi_15_3>=1)))||((y_4>=1)&&(P_ifyi_15_3>=1)))||((y_5>=1)&&(P_ifyi_15_3>=1)))||((y_0>=1)&&(P_ifyi_15_4>=1)))||((y_1>=1)&&(P_ifyi_15_4>=1)))||((y_2>=1)&&(P_ifyi_15_4>=1)))||((y_3>=1)&&(P_ifyi_15_4>=1)))||((y_5>=1)&&(P_ifyi_15_4>=1)))||((y_0>=1)&&(P_ifyi_15_5>=1)))||((y_1>=1)&&(P_ifyi_15_5>=1)))||((y_2>=1)&&(P_ifyi_15_5>=1)))||((y_3>=1)&&(P_ifyi_15_5>=1)))||((y_4>=1)&&(P_ifyi_15_5>=1))))||((((((((y_0>=1)&&(P_ifyi_15_0>=1))||((y_1>=1)&&(P_ifyi_15_1>=1)))||((y_2>=1)&&(P_ifyi_15_2>=1)))||((y_3>=1)&&(P_ifyi_15_3>=1)))||((y_4>=1)&&(P_ifyi_15_4>=1)))||((y_5>=1)&&(P_ifyi_15_5>=1)))||(((((((((((((((((((((((((((((((y_1>=1)&&(P_ify0_4_0>=1))||((y_2>=1)&&(P_ify0_4_0>=1)))||((y_3>=1)&&(P_ify0_4_0>=1)))||((y_4>=1)&&(P_ify0_4_0>=1)))||((y_5>=1)&&(P_ify0_4_0>=1)))||((y_1>=1)&&(P_ify0_4_1>=1)))||((y_2>=1)&&(P_ify0_4_1>=1)))||((y_3>=1)&&(P_ify0_4_1>=1)))||((y_4>=1)&&(P_ify0_4_1>=1)))||((y_5>=1)&&(P_ify0_4_1>=1)))||((y_1>=1)&&(P_ify0_4_2>=1)))||((y_2>=1)&&(P_ify0_4_2>=1)))||((y_3>=1)&&(P_ify0_4_2>=1)))||((y_4>=1)&&(P_ify0_4_2>=1)))||((y_5>=1)&&(P_ify0_4_2>=1)))||((y_1>=1)&&(P_ify0_4_3>=1)))||((y_2>=1)&&(P_ify0_4_3>=1)))||((y_3>=1)&&(P_ify0_4_3>=1)))||((y_4>=1)&&(P_ify0_4_3>=1)))||((y_5>=1)&&(P_ify0_4_3>=1)))||((y_1>=1)&&(P_ify0_4_4>=1)))||((y_2>=1)&&(P_ify0_4_4>=1)))||((y_3>=1)&&(P_ify0_4_4>=1)))||((y_4>=1)&&(P_ify0_4_4>=1)))||((y_5>=1)&&(P_ify0_4_4>=1)))||((y_1>=1)&&(P_ify0_4_5>=1)))||((y_2>=1)&&(P_ify0_4_5>=1)))||((y_3>=1)&&(P_ify0_4_5>=1)))||((y_4>=1)&&(P_ify0_4_5>=1)))||((y_5>=1)&&(P_ify0_4_5>=1)))))&&(((((((((((((((P_b_0_false>=1)&&(P_setbi_5_0>=1))||((P_b_0_true>=1)&&(P_setbi_5_0>=1)))||((P_b_1_false>=1)&&(P_setbi_5_1>=1)))||((P_b_1_true>=1)&&(P_setbi_5_1>=1)))||((P_b_2_false>=1)&&(P_setbi_5_2>=1)))||((P_b_2_true>=1)&&(P_setbi_5_2>=1)))||((P_b_3_false>=1)&&(P_setbi_5_3>=1)))||((P_b_3_true>=1)&&(P_setbi_5_3>=1)))||((P_b_4_false>=1)&&(P_setbi_5_4>=1)))||((P_b_4_true>=1)&&(P_setbi_5_4>=1)))||((P_b_5_false>=1)&&(P_setbi_5_5>=1)))||((P_b_5_true>=1)&&(P_setbi_5_5>=1)))||((((((P_fordo_12_0>=1)||(P_fordo_12_1>=1))||(P_fordo_12_2>=1))||(P_fordo_12_3>=1))||(P_fordo_12_4>=1))||(P_fordo_12_5>=1)))&&(((((((((((((((((((((((((((((((((((((((P_b_0_false>=1)&&(P_wait_0_0>=1))&&(P_await_13_0>=1))||(((P_b_1_false>=1)&&(P_wait_0_1>=1))&&(P_await_13_0>=1)))||(((P_b_2_false>=1)&&(P_wait_0_2>=1))&&(P_await_13_0>=1)))||(((P_b_3_false>=1)&&(P_wait_0_3>=1))&&(P_await_13_0>=1)))||(((P_b_4_false>=1)&&(P_wait_0_4>=1))&&(P_await_13_0>=1)))||(((P_b_5_false>=1)&&(P_wait_0_5>=1))&&(P_await_13_0>=1)))||(((P_b_0_false>=1)&&(P_wait_1_0>=1))&&(P_await_13_1>=1)))||(((P_b_1_false>=1)&&(P_wait_1_1>=1))&&(P_await_13_1>=1)))||(((P_b_2_false>=1)&&(P_wait_1_2>=1))&&(P_await_13_1>=1)))||(((P_b_3_false>=1)&&(P_wait_1_3>=1))&&(P_await_13_1>=1)))||(((P_b_4_false>=1)&&(P_wait_1_4>=1))&&(P_await_13_1>=1)))||(((P_b_5_false>=1)&&(P_wait_1_5>=1))&&(P_await_13_1>=1)))||(((P_b_0_false>=1)&&(P_wait_2_0>=1))&&(P_await_13_2>=1)))||(((P_b_1_false>=1)&&(P_wait_2_1>=1))&&(P_await_13_2>=1)))||(((P_b_2_false>=1)&&(P_wait_2_2>=1))&&(P_await_13_2>=1)))||(((P_b_3_false>=1)&&(P_wait_2_3>=1))&&(P_await_13_2>=1)))||(((P_b_4_false>=1)&&(P_wait_2_4>=1))&&(P_await_13_2>=1)))||(((P_b_5_false>=1)&&(P_wait_2_5>=1))&&(P_await_13_2>=1)))||(((P_b_0_false>=1)&&(P_wait_3_0>=1))&&(P_await_13_3>=1)))||(((P_b_1_false>=1)&&(P_wait_3_1>=1))&&(P_await_13_3>=1)))||(((P_b_2_false>=1)&&(P_wait_3_2>=1))&&(P_await_13_3>=1)))||(((P_b_3_false>=1)&&(P_wait_3_3>=1))&&(P_await_13_3>=1)))||(((P_b_4_false>=1)&&(P_wait_3_4>=1))&&(P_await_13_3>=1)))||(((P_b_5_false>=1)&&(P_wait_3_5>=1))&&(P_await_13_3>=1)))||(((P_b_0_false>=1)&&(P_wait_4_0>=1))&&(P_await_13_4>=1)))||(((P_b_1_false>=1)&&(P_wait_4_1>=1))&&(P_await_13_4>=1)))||(((P_b_2_false>=1)&&(P_wait_4_2>=1))&&(P_await_13_4>=1)))||(((P_b_3_false>=1)&&(P_wait_4_3>=1))&&(P_await_13_4>=1)))||(((P_b_4_false>=1)&&(P_wait_4_4>=1))&&(P_await_13_4>=1)))||(((P_b_5_false>=1)&&(P_wait_4_5>=1))&&(P_await_13_4>=1)))||(((P_b_0_false>=1)&&(P_wait_5_0>=1))&&(P_await_13_5>=1)))||(((P_b_1_false>=1)&&(P_wait_5_1>=1))&&(P_await_13_5>=1)))||(((P_b_2_false>=1)&&(P_wait_5_2>=1))&&(P_await_13_5>=1)))||(((P_b_3_false>=1)&&(P_wait_5_3>=1))&&(P_await_13_5>=1)))||(((P_b_4_false>=1)&&(P_wait_5_4>=1))&&(P_await_13_5>=1)))||(((P_b_5_false>=1)&&(P_wait_5_5>=1))&&(P_await_13_5>=1)))||(((((((x_0>=1)&&(P_ifxi_10_0>=1))||((x_1>=1)&&(P_ifxi_10_1>=1)))||((x_2>=1)&&(P_ifxi_10_2>=1)))||((x_3>=1)&&(P_ifxi_10_3>=1)))||((x_4>=1)&&(P_ifxi_10_4>=1)))||((x_5>=1)&&(P_ifxi_10_5>=1))))))||(((((((((x_0>=1)&&(P_ifxi_10_0>=1))||((x_1>=1)&&(P_ifxi_10_1>=1)))||((x_2>=1)&&(P_ifxi_10_2>=1)))||((x_3>=1)&&(P_ifxi_10_3>=1)))||((x_4>=1)&&(P_ifxi_10_4>=1)))||((x_5>=1)&&(P_ifxi_10_5>=1)))&&(((((((((((((((((((((((((((((((((((((x_0>=1)&&(P_setx_3_0>=1))||((x_1>=1)&&(P_setx_3_0>=1)))||((x_2>=1)&&(P_setx_3_0>=1)))||((x_3>=1)&&(P_setx_3_0>=1)))||((x_4>=1)&&(P_setx_3_0>=1)))||((x_5>=1)&&(P_setx_3_0>=1)))||((x_0>=1)&&(P_setx_3_1>=1)))||((x_1>=1)&&(P_setx_3_1>=1)))||((x_2>=1)&&(P_setx_3_1>=1)))||((x_3>=1)&&(P_setx_3_1>=1)))||((x_4>=1)&&(P_setx_3_1>=1)))||((x_5>=1)&&(P_setx_3_1>=1)))||((x_0>=1)&&(P_setx_3_2>=1)))||((x_1>=1)&&(P_setx_3_2>=1)))||((x_2>=1)&&(P_setx_3_2>=1)))||((x_3>=1)&&(P_setx_3_2>=1)))||((x_4>=1)&&(P_setx_3_2>=1)))||((x_5>=1)&&(P_setx_3_2>=1)))||((x_0>=1)&&(P_setx_3_3>=1)))||((x_1>=1)&&(P_setx_3_3>=1)))||((x_2>=1)&&(P_setx_3_3>=1)))||((x_3>=1)&&(P_setx_3_3>=1)))||((x_4>=1)&&(P_setx_3_3>=1)))||((x_5>=1)&&(P_setx_3_3>=1)))||((x_0>=1)&&(P_setx_3_4>=1)))||((x_1>=1)&&(P_setx_3_4>=1)))||((x_2>=1)&&(P_setx_3_4>=1)))||((x_3>=1)&&(P_setx_3_4>=1)))||((x_4>=1)&&(P_setx_3_4>=1)))||((x_5>=1)&&(P_setx_3_4>=1)))||((x_0>=1)&&(P_setx_3_5>=1)))||((x_1>=1)&&(P_setx_3_5>=1)))||((x_2>=1)&&(P_setx_3_5>=1)))||((x_3>=1)&&(P_setx_3_5>=1)))||((x_4>=1)&&(P_setx_3_5>=1)))||((x_5>=1)&&(P_setx_3_5>=1))))&&((((((((P_fordo_12_0>=1)||(P_fordo_12_1>=1))||(P_fordo_12_2>=1))||(P_fordo_12_3>=1))||(P_fordo_12_4>=1))||(P_fordo_12_5>=1))||(((((((((((((((((((((((((((((((((((((x_0>=1)&&(P_setx_3_0>=1))||((x_1>=1)&&(P_setx_3_0>=1)))||((x_2>=1)&&(P_setx_3_0>=1)))||((x_3>=1)&&(P_setx_3_0>=1)))||((x_4>=1)&&(P_setx_3_0>=1)))||((x_5>=1)&&(P_setx_3_0>=1)))||((x_0>=1)&&(P_setx_3_1>=1)))||((x_1>=1)&&(P_setx_3_1>=1)))||((x_2>=1)&&(P_setx_3_1>=1)))||((x_3>=1)&&(P_setx_3_1>=1)))||((x_4>=1)&&(P_setx_3_1>=1)))||((x_5>=1)&&(P_setx_3_1>=1)))||((x_0>=1)&&(P_setx_3_2>=1)))||((x_1>=1)&&(P_setx_3_2>=1)))||((x_2>=1)&&(P_setx_3_2>=1)))||((x_3>=1)&&(P_setx_3_2>=1)))||((x_4>=1)&&(P_setx_3_2>=1)))||((x_5>=1)&&(P_setx_3_2>=1)))||((x_0>=1)&&(P_setx_3_3>=1)))||((x_1>=1)&&(P_setx_3_3>=1)))||((x_2>=1)&&(P_setx_3_3>=1)))||((x_3>=1)&&(P_setx_3_3>=1)))||((x_4>=1)&&(P_setx_3_3>=1)))||((x_5>=1)&&(P_setx_3_3>=1)))||((x_0>=1)&&(P_setx_3_4>=1)))||((x_1>=1)&&(P_setx_3_4>=1)))||((x_2>=1)&&(P_setx_3_4>=1)))||((x_3>=1)&&(P_setx_3_4>=1)))||((x_4>=1)&&(P_setx_3_4>=1)))||((x_5>=1)&&(P_setx_3_4>=1)))||((x_0>=1)&&(P_setx_3_5>=1)))||((x_1>=1)&&(P_setx_3_5>=1)))||((x_2>=1)&&(P_setx_3_5>=1)))||((x_3>=1)&&(P_setx_3_5>=1)))||((x_4>=1)&&(P_setx_3_5>=1)))||((x_5>=1)&&(P_setx_3_5>=1))))&&((((((((((((((((((((((((((((((((((((((y_0>=1)&&(P_CS_21_0>=1))||((y_1>=1)&&(P_CS_21_0>=1)))||((y_2>=1)&&(P_CS_21_0>=1)))||((y_3>=1)&&(P_CS_21_0>=1)))||((y_4>=1)&&(P_CS_21_0>=1)))||((y_5>=1)&&(P_CS_21_0>=1)))||((y_0>=1)&&(P_CS_21_1>=1)))||((y_1>=1)&&(P_CS_21_1>=1)))||((y_2>=1)&&(P_CS_21_1>=1)))||((y_3>=1)&&(P_CS_21_1>=1)))||((y_4>=1)&&(P_CS_21_1>=1)))||((y_5>=1)&&(P_CS_21_1>=1)))||((y_0>=1)&&(P_CS_21_2>=1)))||((y_1>=1)&&(P_CS_21_2>=1)))||((y_2>=1)&&(P_CS_21_2>=1)))||((y_3>=1)&&(P_CS_21_2>=1)))||((y_4>=1)&&(P_CS_21_2>=1)))||((y_5>=1)&&(P_CS_21_2>=1)))||((y_0>=1)&&(P_CS_21_3>=1)))||((y_1>=1)&&(P_CS_21_3>=1)))||((y_2>=1)&&(P_CS_21_3>=1)))||((y_3>=1)&&(P_CS_21_3>=1)))||((y_4>=1)&&(P_CS_21_3>=1)))||((y_5>=1)&&(P_CS_21_3>=1)))||((y_0>=1)&&(P_CS_21_4>=1)))||((y_1>=1)&&(P_CS_21_4>=1)))||((y_2>=1)&&(P_CS_21_4>=1)))||((y_3>=1)&&(P_CS_21_4>=1)))||((y_4>=1)&&(P_CS_21_4>=1)))||((y_5>=1)&&(P_CS_21_4>=1)))||((y_0>=1)&&(P_CS_21_5>=1)))||((y_1>=1)&&(P_CS_21_5>=1)))||((y_2>=1)&&(P_CS_21_5>=1)))||((y_3>=1)&&(P_CS_21_5>=1)))||((y_4>=1)&&(P_CS_21_5>=1)))||((y_5>=1)&&(P_CS_21_5>=1)))&&(((((((y_0>=1)&&(P_awaity_0>=1))||((y_0>=1)&&(P_awaity_1>=1)))||((y_0>=1)&&(P_awaity_2>=1)))||((y_0>=1)&&(P_awaity_3>=1)))||((y_0>=1)&&(P_awaity_4>=1)))||((y_0>=1)&&(P_awaity_5>=1)))))))
Read [invariant] property : LamportFastMutEx-PT-5-ReachabilityFireability-08 with value :(!((((y_4>=1)&&(P_ifyi_15_4>=1))||(((P_b_1_false>=1)&&(P_wait_1_1>=1))&&(P_await_13_1>=1)))&&((x_5>=1)&&(P_ifxi_10_3>=1))))
Read [reachable] property : LamportFastMutEx-PT-5-ReachabilityFireability-09 with value :(((P_b_0_false>=1)&&(P_wait_4_0>=1))&&(P_await_13_4>=1))
Read [reachable] property : LamportFastMutEx-PT-5-ReachabilityFireability-10 with value :(!(((x_1>=1)&&(P_ifxi_10_4>=1))||(!(((x_0>=1)&&(P_ifxi_10_2>=1))||((y_0>=1)&&(P_ifyi_15_0>=1))))))
Read [reachable] property : LamportFastMutEx-PT-5-ReachabilityFireability-11 with value :((((((((P_await_13_2>=1)&&(P_done_2_1>=1))&&(P_done_2_2>=1))&&(P_done_2_3>=1))&&(P_done_2_4>=1))&&(P_done_2_5>=1))&&((((y_2>=1)&&(P_ify0_4_1>=1))&&((P_b_0_false>=1)&&(P_setbi_24_0>=1)))||(((y_5>=1)&&(P_ify0_4_3>=1))||((P_b_4_true>=1)&&(P_setbi_24_4>=1)))))||(((P_b_0_false>=1)&&(P_wait_2_0>=1))&&(P_await_13_2>=1)))
Read [reachable] property : LamportFastMutEx-PT-5-ReachabilityFireability-12 with value :(((!((y_0>=1)&&(P_sety_9_2>=1)))&&((((P_b_0_false>=1)&&(P_wait_3_0>=1))&&(P_await_13_3>=1))&&((((P_b_0_false>=1)&&(P_wait_0_0>=1))&&(P_await_13_0>=1))&&((y_3>=1)&&(P_sety_9_5>=1)))))&&((((((P_b_1_false>=1)&&(P_wait_5_1>=1))&&(P_await_13_5>=1))||((x_0>=1)&&(P_setx_3_5>=1)))||(((y_2>=1)&&(P_sety_9_4>=1))||((y_5>=1)&&(P_ifyi_15_0>=1))))||(((P_b_5_false>=1)&&(P_setbi_5_5>=1))&&((P_start_1_1>=1)&&(P_b_1_true>=1)))))
Read [invariant] property : LamportFastMutEx-PT-5-ReachabilityFireability-13 with value :(((((y_1>=1)&&(P_ify0_4_0>=1))&&(((y_1>=1)&&(P_sety_9_4>=1))||(((P_b_3_false>=1)&&(P_wait_4_3>=1))&&(P_await_13_4>=1))))||((((y_4>=1)&&(P_ifyi_15_4>=1))||(((P_b_3_false>=1)&&(P_wait_2_3>=1))&&(P_await_13_2>=1)))||(((P_b_4_false>=1)&&(P_setbi_24_4>=1))&&((y_5>=1)&&(P_CS_21_5>=1)))))||(!(((((((P_await_13_4>=1)&&(P_done_4_1>=1))&&(P_done_4_2>=1))&&(P_done_4_3>=1))&&(P_done_4_4>=1))&&(P_done_4_5>=1))||(((y_4>=1)&&(P_ifyi_15_0>=1))&&((y_0>=1)&&(P_ifyi_15_2>=1))))))
Read [invariant] property : LamportFastMutEx-PT-5-ReachabilityFireability-14 with value :(((!(((x_5>=1)&&(P_ifxi_10_4>=1))||((x_0>=1)&&(P_setx_3_1>=1))))&&(((x_5>=1)&&(P_setx_3_1>=1))||(((x_3>=1)&&(P_ifxi_10_5>=1))||((((((P_await_13_1>=1)&&(P_done_1_1>=1))&&(P_done_1_2>=1))&&(P_done_1_3>=1))&&(P_done_1_4>=1))&&(P_done_1_5>=1)))))||(!((((y_2>=1)&&(P_ify0_4_5>=1))||((x_0>=1)&&(P_ifxi_10_5>=1)))&&((x_5>=1)&&(P_setx_3_5>=1)))))
Read [reachable] property : LamportFastMutEx-PT-5-ReachabilityFireability-15 with value :((!((((y_4>=1)&&(P_sety_9_4>=1))||((x_0>=1)&&(P_setx_3_1>=1)))||(((P_b_0_false>=1)&&(P_setbi_24_0>=1))||((y_1>=1)&&(P_ify0_4_2>=1)))))&&((((y_0>=1)&&(P_ifyi_15_1>=1))&&((y_4>=1)&&(P_sety_9_2>=1)))||(((P_start_1_4>=1)&&(P_b_4_true>=1))&&((y_2>=1)&&(P_sety_9_4>=1)))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 246
// Phase 1: matrix 246 rows 174 cols
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 = 1
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_wait_3_0 + P_done_3_0 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-06 FALSE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 246
// Phase 1: matrix 246 rows 174 cols
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 = 1
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_wait_3_0 + P_done_3_0 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-09 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-12 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-14 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-15 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx\_PT\_5\_flat\_flat,5.30682e+08,53.593,638344,2,90039,5,1.48601e+06,6,0,993,2.14125e+06,0
Total reachable state count : 530682432
Verifying 15 reachability properties.
Invariant property LamportFastMutEx-PT-5-ReachabilityFireability-00 does not hold.
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-00,593155,64.7407,638620,2,84690,6,1.48601e+06,7,0,1299,2.14125e+06,0
Invariant property LamportFastMutEx-PT-5-ReachabilityFireability-02 does not hold.
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-02,3.06851e+08,77.2206,640572,2,210658,7,1.7288e+06,8,0,1702,2.14125e+06,0
Reachability property LamportFastMutEx-PT-5-ReachabilityFireability-03 is true.
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-03,193,77.3668,640652,2,402,8,1.72889e+06,9,0,1735,2.14125e+06,0
Reachability property LamportFastMutEx-PT-5-ReachabilityFireability-04 is true.
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-04,193,77.5187,640652,2,402,8,1.72889e+06,9,0,1735,2.14125e+06,0
Reachability property LamportFastMutEx-PT-5-ReachabilityFireability-05 is true.
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-05,10920,81.0799,641968,2,11583,9,1.89935e+06,10,0,1892,2.14125e+06,0
Reachability property LamportFastMutEx-PT-5-ReachabilityFireability-06 does not hold.
No reachable states exhibit your property : LamportFastMutEx-PT-5-ReachabilityFireability-06
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-06,0,86.3721,643576,1,0,9,2.10786e+06,11,0,1982,2.14125e+06,0
Reachability property LamportFastMutEx-PT-5-ReachabilityFireability-07 is true.
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-07,2,86.532,643656,2,183,10,2.108e+06,12,0,2060,2.14125e+06,0
Invariant property LamportFastMutEx-PT-5-ReachabilityFireability-08 does not hold.
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-08,4284,86.5368,643660,2,604,11,2.10839e+06,13,0,2065,2.14125e+06,0
Reachability property LamportFastMutEx-PT-5-ReachabilityFireability-09 does not hold.
No reachable states exhibit your property : LamportFastMutEx-PT-5-ReachabilityFireability-09
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-09,0,86.7027,643660,1,0,11,2.10839e+06,14,0,2065,2.14125e+06,0
Reachability property LamportFastMutEx-PT-5-ReachabilityFireability-10 does not hold.
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : LamportFastMutEx-PT-5-ReachabilityFireability-10
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-10,0,87.1752,643660,1,0,11,2.10897e+06,15,0,2072,2.14125e+06,0
Reachability property LamportFastMutEx-PT-5-ReachabilityFireability-11 is true.
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-11,17516,87.3239,643668,2,1880,12,2.12076e+06,16,0,2082,2.14125e+06,0
Reachability property LamportFastMutEx-PT-5-ReachabilityFireability-12 does not hold.
No reachable states exhibit your property : LamportFastMutEx-PT-5-ReachabilityFireability-12
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-12,0,87.5983,643760,1,0,12,2.12151e+06,17,0,2090,2.14125e+06,0
Invariant property LamportFastMutEx-PT-5-ReachabilityFireability-13 does not hold.
FORMULA LamportFastMutEx-PT-5-ReachabilityFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-13,2.73639e+06,89.0922,644288,2,11940,13,2.18975e+06,18,0,2105,2.14125e+06,0
Invariant property LamportFastMutEx-PT-5-ReachabilityFireability-14 is true.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-14,0,89.453,644296,1,0,13,2.21778e+06,19,0,2138,2.14125e+06,0
Reachability property LamportFastMutEx-PT-5-ReachabilityFireability-15 does not hold.
No reachable states exhibit your property : LamportFastMutEx-PT-5-ReachabilityFireability-15
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-5-ReachabilityFireability-15,0,89.8743,644516,1,0,13,2.22088e+06,20,0,2145,2.14125e+06,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1527165599686
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 12:38:23 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 12:38:23 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 12:38:24 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 154 ms
May 24, 2018 12:38:24 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 174 places.
May 24, 2018 12:38:24 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 318 transitions.
May 24, 2018 12:38:24 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 53 ms
May 24, 2018 12:38:25 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property LamportFastMutEx-PT-5-ReachabilityFireability-01 is trivially true : it is verified in initial state.
May 24, 2018 12:38:25 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 139 ms
May 24, 2018 12:38:25 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 322 ms
May 24, 2018 12:38:25 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityFireability.pnml.gal : 7 ms
May 24, 2018 12:38:25 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 272 ms
May 24, 2018 12:38:25 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityFireability.prop : 6 ms
May 24, 2018 12:38:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 318 transitions.
May 24, 2018 12:38:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 318 transitions.
May 24, 2018 12:38:26 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 50 place invariants in 57 ms
May 24, 2018 12:38:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, reachability predicate is unrealizable LamportFastMutEx-PT-5-ReachabilityFireability-06
May 24, 2018 12:38:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 1 / 15 in 1193 ms.
May 24, 2018 12:38:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-00(UNSAT) depth K=0 took 44 ms
May 24, 2018 12:38:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-02(UNSAT) depth K=0 took 19 ms
May 24, 2018 12:38:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-03(UNSAT) depth K=0 took 11 ms
May 24, 2018 12:38:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 318 transitions.
May 24, 2018 12:38:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-04(UNSAT) depth K=0 took 15 ms
May 24, 2018 12:38:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-05(UNSAT) depth K=0 took 15 ms
May 24, 2018 12:38:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-07(UNSAT) depth K=0 took 15 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-08(UNSAT) depth K=0 took 15 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-09(UNSAT) depth K=0 took 15 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-10(UNSAT) depth K=0 took 16 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-11(UNSAT) depth K=0 took 14 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-12(UNSAT) depth K=0 took 11 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 50 place invariants in 27 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-13(UNSAT) depth K=0 took 11 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-14(UNSAT) depth K=0 took 7 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-15(UNSAT) depth K=0 took 7 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-00(UNSAT) depth K=1 took 20 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-02(UNSAT) depth K=1 took 20 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-03(UNSAT) depth K=1 took 15 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-04(UNSAT) depth K=1 took 6 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-05(UNSAT) depth K=1 took 49 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-07(UNSAT) depth K=1 took 33 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-08(UNSAT) depth K=1 took 37 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-09(UNSAT) depth K=1 took 12 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-10(UNSAT) depth K=1 took 31 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-11(UNSAT) depth K=1 took 6 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-12(UNSAT) depth K=1 took 8 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-13(UNSAT) depth K=1 took 15 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-14(UNSAT) depth K=1 took 13 ms
May 24, 2018 12:38:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-15(UNSAT) depth K=1 took 18 ms
May 24, 2018 12:38:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-00(UNSAT) depth K=2 took 968 ms
May 24, 2018 12:38:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-02(UNSAT) depth K=2 took 470 ms
May 24, 2018 12:38:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-03(UNSAT) depth K=2 took 424 ms
May 24, 2018 12:38:29 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 174 variables to be positive in 2771 ms
May 24, 2018 12:38:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 318 transitions.
May 24, 2018 12:38:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/318 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:38:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 45 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:38:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 318 transitions.
May 24, 2018 12:38:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 27 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:38:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-04(UNSAT) depth K=2 took 412 ms
May 24, 2018 12:38:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-05(UNSAT) depth K=2 took 282 ms
May 24, 2018 12:38:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-07(UNSAT) depth K=2 took 610 ms
May 24, 2018 12:38:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-08(UNSAT) depth K=2 took 76 ms
May 24, 2018 12:38:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-09(UNSAT) depth K=2 took 179 ms
May 24, 2018 12:38:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-10(UNSAT) depth K=2 took 104 ms
May 24, 2018 12:38:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-11(UNSAT) depth K=2 took 157 ms
May 24, 2018 12:38:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-12(UNSAT) depth K=2 took 200 ms
May 24, 2018 12:38:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-13(UNSAT) depth K=2 took 49 ms
May 24, 2018 12:38:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-14(UNSAT) depth K=2 took 140 ms
May 24, 2018 12:38:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-15(UNSAT) depth K=2 took 125 ms
May 24, 2018 12:38:32 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 174 variables to be positive in 5090 ms
May 24, 2018 12:38:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-00
May 24, 2018 12:38:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-00(SAT) depth K=0 took 713 ms
May 24, 2018 12:38:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-02
May 24, 2018 12:38:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-02(SAT) depth K=0 took 719 ms
May 24, 2018 12:38:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-03
May 24, 2018 12:38:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-03(SAT) depth K=0 took 384 ms
May 24, 2018 12:38:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-04
May 24, 2018 12:38:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-04(SAT) depth K=0 took 197 ms
May 24, 2018 12:38:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-00(UNSAT) depth K=3 took 3146 ms
May 24, 2018 12:38:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-05
May 24, 2018 12:38:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-05(SAT) depth K=0 took 1411 ms
May 24, 2018 12:38:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-07
May 24, 2018 12:38:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-07(SAT) depth K=0 took 759 ms
May 24, 2018 12:38:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-08
May 24, 2018 12:38:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-08(SAT) depth K=0 took 530 ms
May 24, 2018 12:38:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-5-ReachabilityFireability-09
May 24, 2018 12:38:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-5-ReachabilityFireability-09
May 24, 2018 12:38:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-09(FALSE) depth K=0 took 373 ms
May 24, 2018 12:38:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-10
May 24, 2018 12:38:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-10(SAT) depth K=0 took 429 ms
May 24, 2018 12:38:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-02(UNSAT) depth K=3 took 3469 ms
May 24, 2018 12:38:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-11
May 24, 2018 12:38:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-11(SAT) depth K=0 took 913 ms
May 24, 2018 12:38:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-5-ReachabilityFireability-12
May 24, 2018 12:38:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-5-ReachabilityFireability-12
May 24, 2018 12:38:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-12(FALSE) depth K=0 took 447 ms
May 24, 2018 12:38:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-13
May 24, 2018 12:38:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-13(SAT) depth K=0 took 778 ms
May 24, 2018 12:38:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-PT-5-ReachabilityFireability-14
May 24, 2018 12:38:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-5-ReachabilityFireability-14
May 24, 2018 12:38:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-14(TRUE) depth K=0 took 723 ms
May 24, 2018 12:38:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-PT-5-ReachabilityFireability-15
May 24, 2018 12:38:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-PT-5-ReachabilityFireability-15
May 24, 2018 12:38:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-15(FALSE) depth K=0 took 665 ms
May 24, 2018 12:38:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-03(UNSAT) depth K=3 took 5042 ms
May 24, 2018 12:38:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-04(UNSAT) depth K=3 took 3312 ms
May 24, 2018 12:38:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-05(UNSAT) depth K=3 took 1744 ms
May 24, 2018 12:38:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-00
May 24, 2018 12:38:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-00(SAT) depth K=1 took 8855 ms
May 24, 2018 12:38:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-02
May 24, 2018 12:38:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-02(SAT) depth K=1 took 3825 ms
May 24, 2018 12:38:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-03
May 24, 2018 12:38:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-03(SAT) depth K=1 took 995 ms
May 24, 2018 12:38:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-07(UNSAT) depth K=3 took 6636 ms
May 24, 2018 12:38:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-08(UNSAT) depth K=3 took 1673 ms
May 24, 2018 12:38:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-09(UNSAT) depth K=3 took 1468 ms
May 24, 2018 12:39:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-10(UNSAT) depth K=3 took 2656 ms
May 24, 2018 12:39:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-04
May 24, 2018 12:39:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-04(SAT) depth K=1 took 6105 ms
May 24, 2018 12:39:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-11(UNSAT) depth K=3 took 4333 ms
May 24, 2018 12:39:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-12(UNSAT) depth K=3 took 2322 ms
May 24, 2018 12:39:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-13(UNSAT) depth K=3 took 1814 ms
May 24, 2018 12:39:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-14(UNSAT) depth K=3 took 1413 ms
May 24, 2018 12:39:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-PT-5-ReachabilityFireability-15(UNSAT) depth K=3 took 2694 ms
May 24, 2018 12:39:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-PT-5-ReachabilityFireability-05
May 24, 2018 12:39:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-PT-5-ReachabilityFireability-05(SAT) depth K=1 took 37281 ms
May 24, 2018 12:39:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeAblingForPredicate(NecessaryEnablingsolver.java:755)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:512)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 12:39:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying LamportFastMutEx-PT-5-ReachabilityFireability-00 SMT depth 4
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 24, 2018 12:39:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 4
May 24, 2018 12:39:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 4
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 12:39:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying LamportFastMutEx-PT-5-ReachabilityFireability-07 K-induction depth 1
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
May 24, 2018 12:39:58 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 5/ 15 properties. Interrupting other analysis methods.
May 24, 2018 12:39:58 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 92518ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-5"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-5.tgz
mv LamportFastMutEx-PT-5 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-PT-5, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r116-csrt-152666475000133"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;