About the Execution of ITS-Tools for LamportFastMutEx-PT-3
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15755.210 | 2731.00 | 4654.00 | 70.90 | TTTTFFTFFTFFFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 312K
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 36K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 28K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 29K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.1K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 75K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is LamportFastMutEx-PT-3, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r116-csrt-152666475000117
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1527165263396
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : LamportFastMutEx-PT-3-ReachabilityCardinality-00 with value :((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)>=1)
Read [invariant] property : LamportFastMutEx-PT-3-ReachabilityCardinality-01 with value :(((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)>=3)||((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)<=(((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3))&&((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)<=(((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)))||(((((((((((((((((P_wait_0_0+P_wait_0_1)+P_wait_0_2)+P_wait_0_3)+P_wait_1_0)+P_wait_1_1)+P_wait_1_2)+P_wait_1_3)+P_wait_2_0)+P_wait_2_1)+P_wait_2_2)+P_wait_2_3)+P_wait_3_0)+P_wait_3_1)+P_wait_3_2)+P_wait_3_3)<=(((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true))||((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)<=(((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)))))
Read [invariant] property : LamportFastMutEx-PT-3-ReachabilityCardinality-03 with value :(((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)>=1)||((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)>=1))||(!((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)<=(((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true))))&&((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)<=(((y_0+y_1)+y_2)+y_3))&&((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)>=1))||(((((x_0+x_1)+x_2)+x_3)<=(((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true))||((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)>=2))))
Read [reachable] property : LamportFastMutEx-PT-3-ReachabilityCardinality-04 with value :(((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)>=3)&&((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)<=(((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)))
Read [invariant] property : LamportFastMutEx-PT-3-ReachabilityCardinality-05 with value :((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)<=(((((((((((((((P_wait_0_0+P_wait_0_1)+P_wait_0_2)+P_wait_0_3)+P_wait_1_0)+P_wait_1_1)+P_wait_1_2)+P_wait_1_3)+P_wait_2_0)+P_wait_2_1)+P_wait_2_2)+P_wait_2_3)+P_wait_3_0)+P_wait_3_1)+P_wait_3_2)+P_wait_3_3))
Read [invariant] property : LamportFastMutEx-PT-3-ReachabilityCardinality-06 with value :((!(((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)>=1)&&((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)>=3)))||((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)>=1)&&((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)<=(((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)))||(((((((((((((((((P_done_0_0+P_done_0_1)+P_done_0_2)+P_done_0_3)+P_done_1_0)+P_done_1_1)+P_done_1_2)+P_done_1_3)+P_done_2_0)+P_done_2_1)+P_done_2_2)+P_done_2_3)+P_done_3_0)+P_done_3_1)+P_done_3_2)+P_done_3_3)<=(((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3))&&((((((((P_b_0_false+P_b_0_true)+P_b_1_false)+P_b_1_true)+P_b_2_false)+P_b_2_true)+P_b_3_false)+P_b_3_true)>=3))))
Read [reachable] property : LamportFastMutEx-PT-3-ReachabilityCardinality-07 with value :((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)>=2)
Read [reachable] property : LamportFastMutEx-PT-3-ReachabilityCardinality-08 with value :((!((P_setbi_11_0<=P_wait_0_1)&&(P_setx_3_0<=P_sety_9_3)))&&((!(P_wait_2_1>=1))&&((P_ifxi_10_2>=3)&&(P_start_1_1<=P_setbi_5_0))))
Read [invariant] property : LamportFastMutEx-PT-3-ReachabilityCardinality-09 with value :(((!(P_sety_9_0<=P_wait_1_0))||(!(P_setx_3_2<=P_wait_2_2)))||(!(P_start_1_2>=3)))
Read [reachable] property : LamportFastMutEx-PT-3-ReachabilityCardinality-10 with value :(P_done_3_0>=1)
Read [reachable] property : LamportFastMutEx-PT-3-ReachabilityCardinality-11 with value :(!(((P_setbi_24_2<=P_done_3_1)&&(P_ifyi_15_0<=x_3))||(P_CS_21_2<=P_setbi_5_3)))
Read [reachable] property : LamportFastMutEx-PT-3-ReachabilityCardinality-12 with value :(!((!(P_await_13_0<=P_setbi_11_2))||(!(P_done_3_1>=3))))
Read [invariant] property : LamportFastMutEx-PT-3-ReachabilityCardinality-13 with value :(P_b_0_false<=y_2)
Read [reachable] property : LamportFastMutEx-PT-3-ReachabilityCardinality-14 with value :(((P_done_0_0>=3)&&((P_done_1_3>=3)&&(P_CS_21_3>=2)))&&((!(P_sety_9_0>=3))||(P_setbi_11_2>=3)))
Read [reachable] property : LamportFastMutEx-PT-3-ReachabilityCardinality-15 with value :((((P_done_0_0>=2)||(P_wait_3_0>=1))||((P_setbi_24_0>=3)&&(y_2<=P_wait_1_1)))&&(((P_setbi_24_1>=3)&&(P_wait_1_2<=P_sety_9_0))&&((y_1>=1)||(P_setbi_11_3<=P_wait_1_2))))
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx\_PT\_3\_flat\_flat,19742,0.268683,11888,2,2608,5,21084,6,0,543,29612,0
Total reachable state count : 19742
Verifying 15 reachability properties.
Reachability property LamportFastMutEx-PT-3-ReachabilityCardinality-00 is true.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-00,1,0.269445,11928,2,101,6,21084,7,0,549,29612,0
Invariant property LamportFastMutEx-PT-3-ReachabilityCardinality-01 is true.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-01,0,0.275144,11988,1,0,6,21084,8,0,599,29612,0
Invariant property LamportFastMutEx-PT-3-ReachabilityCardinality-03 is true.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-03,0,0.2825,12296,1,0,6,21084,9,0,673,29612,0
Reachability property LamportFastMutEx-PT-3-ReachabilityCardinality-04 does not hold.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : LamportFastMutEx-PT-3-ReachabilityCardinality-04
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-04,0,0.287174,12296,1,0,6,21084,10,0,700,29612,0
Invariant property LamportFastMutEx-PT-3-ReachabilityCardinality-05 does not hold.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-05,1,0.289192,12296,2,101,7,21084,11,0,749,29612,0
Invariant property LamportFastMutEx-PT-3-ReachabilityCardinality-06 is true.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-06,0,0.296226,12296,1,0,7,21084,12,0,866,29612,0
Reachability property LamportFastMutEx-PT-3-ReachabilityCardinality-07 does not hold.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : LamportFastMutEx-PT-3-ReachabilityCardinality-07
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-07,0,0.298137,12296,1,0,7,21084,13,0,873,29612,0
Reachability property LamportFastMutEx-PT-3-ReachabilityCardinality-08 does not hold.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : LamportFastMutEx-PT-3-ReachabilityCardinality-08
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-08,0,0.300327,12296,1,0,7,21084,14,0,886,29612,0
Invariant property LamportFastMutEx-PT-3-ReachabilityCardinality-09 is true.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-09,0,0.301408,12296,1,0,7,21084,15,0,896,29612,0
Reachability property LamportFastMutEx-PT-3-ReachabilityCardinality-10 does not hold.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : LamportFastMutEx-PT-3-ReachabilityCardinality-10
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-10,0,0.30524,12296,1,0,7,21084,16,0,897,29612,0
Reachability property LamportFastMutEx-PT-3-ReachabilityCardinality-11 does not hold.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : LamportFastMutEx-PT-3-ReachabilityCardinality-11
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-11,0,0.307309,12296,1,0,7,21084,17,0,915,29612,0
Reachability property LamportFastMutEx-PT-3-ReachabilityCardinality-12 does not hold.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : LamportFastMutEx-PT-3-ReachabilityCardinality-12
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-12,0,0.307628,12296,1,0,7,21084,18,0,918,29612,0
Invariant property LamportFastMutEx-PT-3-ReachabilityCardinality-13 is true.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-13,0,0.308781,12296,1,0,7,21084,19,0,923,29612,0
Reachability property LamportFastMutEx-PT-3-ReachabilityCardinality-14 does not hold.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : LamportFastMutEx-PT-3-ReachabilityCardinality-14
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-14,0,0.309745,12296,1,0,7,21084,20,0,930,29612,0
Reachability property LamportFastMutEx-PT-3-ReachabilityCardinality-15 does not hold.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : LamportFastMutEx-PT-3-ReachabilityCardinality-15
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-15,0,0.311697,12296,1,0,7,21084,21,0,941,29612,0
ITS tools runner thread asked to quit. Dying gracefully.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1527165266127
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 12:34:25 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 12:34:25 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 12:34:25 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 52 ms
May 24, 2018 12:34:25 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 100 places.
May 24, 2018 12:34:25 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 156 transitions.
May 24, 2018 12:34:25 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 19 ms
May 24, 2018 12:34:25 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 74 ms
May 24, 2018 12:34:25 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 29 ms
May 24, 2018 12:34:25 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 11 ms
May 24, 2018 12:34:25 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 24, 2018 12:34:25 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 45 ms
May 24, 2018 12:34:25 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 156 transitions.
May 24, 2018 12:34:25 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 156 transitions.
May 24, 2018 12:34:25 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (define-fun tr86 ((step Int)) Bool (trsrc86 (select s step) (select s (+ step 1)))) with error (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
Skipping mayMatrices nes/nds Error when declaring system variables to SMT solver.(error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
May 24, 2018 12:34:25 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (define-fun tr77 ((step Int)) Bool (trsrc77 (select s step) (select s (+ step 1)))) with error (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
java.lang.RuntimeException: Error when declaring system variables to SMT solver.(error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.init(NextBMCSolver.java:93)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:59)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: Error when declaring system variables to SMT solver.(error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.init(NextBMCSolver.java:93)
at fr.lip6.move.gal.gal2smt.smt.ISMTSolver.init(ISMTSolver.java:17)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.checkProperties(Gal2SMTFrontEnd.java:94)
at fr.lip6.move.gal.application.SMTRunner$2.run(SMTRunner.java:110)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 12:34:25 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 393ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-3"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-3.tgz
mv LamportFastMutEx-PT-3 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-PT-3, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r116-csrt-152666475000117"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;