fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r115-csrt-152666474100483
Last Updated
June 26, 2018

About the Execution of Irma.struct for PermAdmissibility-PT-02

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
6837.800 915407.00 1303490.00 286.90 T??TFTFF?TTFTTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
........................
/home/mcc/execution
total 892K
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 80K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 10K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 37K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 26K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 96K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 481K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-structural
Input is PermAdmissibility-PT-02, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r115-csrt-152666474100483
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-00
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-01
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-02
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-03
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-04
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-05
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-06
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-07
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-08
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-09
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-10
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-11
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-12
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-13
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-14
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-15

=== Now, execution of the tool begins

BK_START 1527153981788


BK_STOP 1527154897195

--------------------
content from stderr:

Prefix is 75f5f979.
Reading known information in /usr/share/mcc4mcc/75f5f979-known.json.
Reading learned information in /usr/share/mcc4mcc/75f5f979-learned.json.
Reading value translations in /usr/share/mcc4mcc/75f5f979-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using PermAdmissibility-PT-02 as instance name.
Using PermAdmissibility as model name.
Using algorithm or tool decision-tree.
Model characteristics are: {'Examination': 'ReachabilityFireability', 'Place/Transition': True, 'Colored': True, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': False, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': True, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': True, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': False, 'Safe': False, 'Deadlock': True, 'Reversible': False, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 35829, 'Memory': 947.36, 'Tool': 'lola'}, {'Time': 36007, 'Memory': 939.91, 'Tool': 'lola'}].
Learned tools are: [{'Tool': 'lola'}].
Learned tool lola is 1.0x far from the best tool lola.
ReachabilityFireability lola PermAdmissibility-PT-02...
----- Start make prepare stderr -----

Time: 3600 - MCC
----- Start make prepare stdout -----
===========================================================================================
PermAdmissibility-PT-02: translating PT Petri net model.pnml into LoLA format
===========================================================================================
translating PT Petri net complete


checking for too many tokens
===========================================================================================
PermAdmissibility-PT-02: translating PT formula ReachabilityFireability into LoLA format
===========================================================================================
translating formula complete
touch formulae;
----- Start make result stdout -----
----- Start make result stderr -----
ReachabilityFireability @ PermAdmissibility-PT-02 @ 3540 seconds
----- Start make result stderr -----
----- Start make result stdout -----
lola: LoLA will run for 3540 seconds at most (--timelimit)
lola: NET
lola: reading net from model.pnml.lola
lola: finished parsing
lola: closed net file model.pnml.lola
lola: 760/65536 symbol table entries, 0 collisions
lola: preprocessing...
lola: finding significant places
lola: 168 places, 592 transitions, 136 significant places
lola: computing forward-conflicting sets
lola: computing back-conflicting sets
lola: 820 transition conflict sets
lola: TASK
lola: reading formula from PermAdmissibility-PT-02-ReachabilityFireability.task
lola: E (F ((NOT FIREABLE(switch9_1_0) AND NOT FIREABLE(switch9_2_0) AND NOT FIREABLE(switch9_3_0) AND NOT FIREABLE(switch9_4_0) AND NOT FIREABLE(switch9_0_0) AND NOT FIREABLE(switch9_3_5) AND NOT FIREABLE(switch9_4_5) AND NOT FIREABLE(switch9_1_5) AND NOT FIREABLE(switch9_2_5) AND NOT FIREABLE(switch9_7_4) AND NOT FIREABLE(switch9_0_5) AND NOT FIREABLE(switch9_5_4) AND NOT FIREABLE(switch9_6_4) AND NOT FIREABLE(switch9_3_6) AND NOT FIREABLE(switch9_4_6) AND NOT FIREABLE(switch9_1_6) AND NOT FIREABLE(switch9_2_6) AND NOT FIREABLE(switch9_7_5) AND NOT FIREABLE(switch9_0_6) AND NOT FIREABLE(switch9_5_5) AND NOT FIREABLE(switch9_6_5) AND NOT FIREABLE(switch9_4_7) AND NOT FIREABLE(switch9_3_7) AND NOT FIREABLE(switch9_2_7) AND NOT FIREABLE(switch9_1_7) AND NOT FIREABLE(switch9_0_7) AND NOT FIREABLE(switch9_7_6) AND NOT FIREABLE(switch9_6_6) AND NOT FIREABLE(switch9_5_6) AND NOT FIREABLE(switch9_7_7) AND NOT FIREABLE(switch9_6_7) AND NOT FIREABLE(switch9_5_7) AND NOT FIREABLE(switch9_1_1) AND NOT FIREABLE(switch9_2_1) AND NOT FIREABLE(switch9_3_1) AND NOT FIREABLE(switch9_4_1) AND NOT FIREABLE(switch9_5_0) AND NOT FIREABLE(switch9_6_0) AND NOT FIREABLE(switch9_7_0) AND NOT FIREABLE(switch9_0_1) AND NOT FIREABLE(switch9_1_2) AND NOT FIREABLE(switch9_2_2) AND NOT FIREABLE(switch9_3_2) AND NOT FIREABLE(switch9_4_2) AND NOT FIREABLE(switch9_5_1) AND NOT FIREABLE(switch9_6_1) AND NOT FIREABLE(switch9_7_1) AND NOT FIREABLE(switch9_0_2) AND NOT FIREABLE(switch9_2_3) AND NOT FIREABLE(switch9_1_3) AND NOT FIREABLE(switch9_4_3) AND NOT FIREABLE(switch9_3_3) AND NOT FIREABLE(switch9_6_2) AND NOT FIREABLE(switch9_5_2) AND NOT FIREABLE(switch9_0_3) AND NOT FIREABLE(switch9_7_2) AND NOT FIREABLE(switch9_2_4) AND NOT FIREABLE(switch9_1_4) AND NOT FIREABLE(switch9_4_4) AND NOT FIREABLE(switch9_3_4) AND NOT FIREABLE(switch9_6_3) AND NOT FIREABLE(switch9_5_3) AND NOT FIREABLE(switch9_0_4) AND NOT FIREABLE(switch9_7_3) AND (FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7) OR FIREABLE(switch4_2_7) OR FIREABLE(switch4_3_6) OR FIREABLE(switch4_3_7) OR FIREABLE(switch4_2_6)) AND (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3)) AND (FIREABLE(switch3_3_6) OR FIREABLE(switch3_2_7) OR FIREABLE(switch3_3_7) OR FIREABLE(switch3_2_6) OR (NOT FIREABLE(display1_2_1) AND NOT FIREABLE(display1_1_1) AND NOT FIREABLE(display1_4_1) AND NOT FIREABLE(display1_3_1) AND NOT FIREABLE(display1_6_0) AND NOT FIREABLE(display1_5_0) AND NOT FIREABLE(display1_0_1) AND NOT FIREABLE(display1_7_0) AND NOT FIREABLE(display1_2_2) AND NOT FIREABLE(display1_1_2) AND NOT FIREABLE(display1_4_2) AND NOT FIREABLE(display1_3_2) AND NOT FIREABLE(display1_6_1) AND NOT FIREABLE(display1_5_1) AND NOT FIREABLE(display1_0_2) AND NOT FIREABLE(display1_7_1) AND NOT FIREABLE(display1_1_0) AND NOT FIREABLE(display1_2_0) AND NOT FIREABLE(display1_3_0) AND NOT FIREABLE(display1_4_0) AND NOT FIREABLE(display1_0_0) AND NOT FIREABLE(display1_7_5) AND NOT FIREABLE(display1_0_6) AND NOT FIREABLE(display1_5_5) AND NOT FIREABLE(display1_6_5) AND NOT FIREABLE(display1_3_6) AND NOT FIREABLE(display1_4_6) AND NOT FIREABLE(display1_1_6) AND NOT FIREABLE(display1_2_6) AND NOT FIREABLE(display1_7_4) AND NOT FIREABLE(display1_0_5) AND NOT FIREABLE(display1_5_4) AND NOT FIREABLE(display1_6_4) AND NOT FIREABLE(display1_3_5) AND NOT FIREABLE(display1_4_5) AND NOT FIREABLE(display1_1_5) AND NOT FIREABLE(display1_2_5) AND NOT FIREABLE(display1_0_4) AND NOT FIREABLE(display1_7_3) AND NOT FIREABLE(display1_6_3) AND NOT FIREABLE(display1_5_3) AND NOT FIREABLE(display1_4_4) AND NOT FIREABLE(display1_3_4) AND NOT FIREABLE(display1_2_4) AND NOT FIREABLE(display1_1_4) AND NOT FIREABLE(display1_0_3) AND NOT FIREABLE(display1_7_2) AND NOT FIREABLE(display1_6_2) AND NOT FIREABLE(display1_5_2) AND NOT FIREABLE(display1_4_3) AND NOT FIREABLE(display1_3_3) AND NOT FIREABLE(display1_2_3) AND NOT FIREABLE(display1_1_3) AND NOT FIREABLE(display1_6_7) AND NOT FIREABLE(display1_5_7) AND NOT FIREABLE(display1_7_7) AND NOT FIREABLE(display1_6_6) AND NOT FIREABLE(display1_5_6) AND NOT FIREABLE(display1_0_7) AND NOT FIREABLE(display1_7_6) AND NOT FIREABLE(display1_2_7) AND NOT FIREABLE(display1_1_7) AND NOT FIREABLE(display1_4_7) AND NOT FIREABLE(display1_3_7) AND NOT FIREABLE(switch6_5_7) AND NOT FIREABLE(switch6_1_7) AND NOT FIREABLE(switch6_4_7) AND NOT FIREABLE(switch6_5_6) AND NOT FIREABLE(switch6_0_7) AND NOT FIREABLE(switch6_1_6) AND NOT FIREABLE(switch6_4_6) AND NOT FIREABLE(switch6_5_3) AND NOT FIREABLE(switch6_0_6) AND NOT FIREABLE(switch6_1_3) AND NOT FIREABLE(switch6_4_3) AND NOT FIREABLE(switch6_0_3) AND NOT FIREABLE(switch6_5_2) AND NOT FIREABLE(switch6_4_2) AND NOT FIREABLE(switch6_1_2) AND NOT FIREABLE(switch6_0_2)))))) : E (F (((FIREABLE(switch9_1_0) OR FIREABLE(switch9_2_0) OR FIREABLE(switch9_3_0) OR FIREABLE(switch9_4_0) OR FIREABLE(switch9_0_0) OR FIREABLE(switch9_3_5) OR FIREABLE(switch9_4_5) OR FIREABLE(switch9_1_5) OR FIREABLE(switch9_2_5) OR FIREABLE(switch9_7_4) OR FIREABLE(switch9_0_5) OR FIREABLE(switch9_5_4) OR FIREABLE(switch9_6_4) OR FIREABLE(switch9_3_6) OR FIREABLE(switch9_4_6) OR FIREABLE(switch9_1_6) OR FIREABLE(switch9_2_6) OR FIREABLE(switch9_7_5) OR FIREABLE(switch9_0_6) OR FIREABLE(switch9_5_5) OR FIREABLE(switch9_6_5) OR FIREABLE(switch9_4_7) OR FIREABLE(switch9_3_7) OR FIREABLE(switch9_2_7) OR FIREABLE(switch9_1_7) OR FIREABLE(switch9_0_7) OR FIREABLE(switch9_7_6) OR FIREABLE(switch9_6_6) OR FIREABLE(switch9_5_6) OR FIREABLE(switch9_7_7) OR FIREABLE(switch9_6_7) OR FIREABLE(switch9_5_7) OR FIREABLE(switch9_1_1) OR FIREABLE(switch9_2_1) OR FIREABLE(switch9_3_1) OR FIREABLE(switch9_4_1) OR FIREABLE(switch9_5_0) OR FIREABLE(switch9_6_0) OR FIREABLE(switch9_7_0) OR FIREABLE(switch9_0_1) OR FIREABLE(switch9_1_2) OR FIREABLE(switch9_2_2) OR FIREABLE(switch9_3_2) OR FIREABLE(switch9_4_2) OR FIREABLE(switch9_5_1) OR FIREABLE(switch9_6_1) OR FIREABLE(switch9_7_1) OR FIREABLE(switch9_0_2) OR FIREABLE(switch9_2_3) OR FIREABLE(switch9_1_3) OR FIREABLE(switch9_4_3) OR FIREABLE(switch9_3_3) OR FIREABLE(switch9_6_2) OR FIREABLE(switch9_5_2) OR FIREABLE(switch9_0_3) OR FIREABLE(switch9_7_2) OR FIREABLE(switch9_2_4) OR FIREABLE(switch9_1_4) OR FIREABLE(switch9_4_4) OR FIREABLE(switch9_3_4) OR FIREABLE(switch9_6_3) OR FIREABLE(switch9_5_3) OR FIREABLE(switch9_0_4) OR FIREABLE(switch9_7_3)) AND (FIREABLE(switch1_1_4) OR FIREABLE(switch1_0_5) OR FIREABLE(switch1_1_5) OR FIREABLE(switch1_0_4)) AND (FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(display2_4_2) OR FIREABLE(display2_3_2) OR FIREABLE(display2_0_0) OR FIREABLE(display2_1_0) OR FIREABLE(display2_2_0) OR FIREABLE(display2_3_0) OR FIREABLE(display2_4_0) OR FIREABLE(display2_4_5) OR FIREABLE(display2_3_5) OR FIREABLE(display2_2_5) OR FIREABLE(display2_1_5) OR FIREABLE(display2_0_5) OR FIREABLE(display2_7_4) OR FIREABLE(display2_6_4) OR FIREABLE(display2_5_4) OR FIREABLE(display2_4_6) OR FIREABLE(display2_3_6) OR FIREABLE(display2_2_6) OR FIREABLE(display2_1_6) OR FIREABLE(display2_0_6) OR FIREABLE(display2_7_5) OR FIREABLE(display2_6_5) OR FIREABLE(display2_5_5) OR FIREABLE(display2_3_3) OR FIREABLE(display2_4_3) OR FIREABLE(display2_1_3) OR FIREABLE(display2_2_3) OR FIREABLE(display2_7_2) OR FIREABLE(display2_0_3) OR FIREABLE(display2_5_2) OR FIREABLE(display2_6_2) OR FIREABLE(display2_3_4) OR FIREABLE(display2_4_4) OR FIREABLE(display2_1_4) OR FIREABLE(display2_2_4) OR FIREABLE(display2_7_3) OR FIREABLE(display2_0_4) OR FIREABLE(display2_5_3) OR FIREABLE(display2_6_3) OR FIREABLE(display2_1_7) OR FIREABLE(display2_2_7) OR FIREABLE(display2_3_7) OR FIREABLE(display2_4_7) OR FIREABLE(display2_5_6) OR FIREABLE(display2_6_6) OR FIREABLE(display2_7_6) OR FIREABLE(display2_0_7) OR FIREABLE(display2_5_7) OR FIREABLE(display2_6_7) OR FIREABLE(display2_7_7)) AND (FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7) OR FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3) OR FIREABLE(switch9_1_0) OR FIREABLE(switch9_2_0) OR FIREABLE(switch9_3_0) OR FIREABLE(switch9_4_0) OR FIREABLE(switch9_0_0) OR FIREABLE(switch9_3_5) OR FIREABLE(switch9_4_5) OR FIREABLE(switch9_1_5) OR FIREABLE(switch9_2_5) OR FIREABLE(switch9_7_4) OR FIREABLE(switch9_0_5) OR FIREABLE(switch9_5_4) OR FIREABLE(switch9_6_4) OR FIREABLE(switch9_3_6) OR FIREABLE(switch9_4_6) OR FIREABLE(switch9_1_6) OR FIREABLE(switch9_2_6) OR FIREABLE(switch9_7_5) OR FIREABLE(switch9_0_6) OR FIREABLE(switch9_5_5) OR FIREABLE(switch9_6_5) OR FIREABLE(switch9_4_7) OR FIREABLE(switch9_3_7) OR FIREABLE(switch9_2_7) OR FIREABLE(switch9_1_7) OR FIREABLE(switch9_0_7) OR FIREABLE(switch9_7_6) OR FIREABLE(switch9_6_6) OR FIREABLE(switch9_5_6) OR FIREABLE(switch9_7_7) OR FIREABLE(switch9_6_7) OR FIREABLE(switch9_5_7) OR FIREABLE(switch9_1_1) OR FIREABLE(switch9_2_1) OR FIREABLE(switch9_3_1) OR FIREABLE(switch9_4_1) OR FIREABLE(switch9_5_0) OR FIREABLE(switch9_6_0) OR FIREABLE(switch9_7_0) OR FIREABLE(switch9_0_1) OR FIREABLE(switch9_1_2) OR FIREABLE(switch9_2_2) OR FIREABLE(switch9_3_2) OR FIREABLE(switch9_4_2) OR FIREABLE(switch9_5_1) OR FIREABLE(switch9_6_1) OR FIREABLE(switch9_7_1) OR FIREABLE(switch9_0_2) OR FIREABLE(switch9_2_3) OR FIREABLE(switch9_1_3) OR FIREABLE(switch9_4_3) OR FIREABLE(switch9_3_3) OR FIREABLE(switch9_6_2) OR FIREABLE(switch9_5_2) OR FIREABLE(switch9_0_3) OR FIREABLE(switch9_7_2) OR FIREABLE(switch9_2_4) OR FIREABLE(switch9_1_4) OR FIREABLE(switch9_4_4) OR FIREABLE(switch9_3_4) OR FIREABLE(switch9_6_3) OR FIREABLE(switch9_5_3) OR FIREABLE(switch9_0_4) OR FIREABLE(switch9_7_3) OR FIREABLE(switch1_1_4) OR FIREABLE(switch1_0_5) OR FIREABLE(switch1_1_5) OR FIREABLE(switch1_0_4))))) : A (G (((NOT FIREABLE(switch10_4_0) AND NOT FIREABLE(switch10_3_0) AND NOT FIREABLE(switch10_2_0) AND NOT FIREABLE(switch10_1_0) AND NOT FIREABLE(switch10_0_0) AND NOT FIREABLE(switch10_7_4) AND NOT FIREABLE(switch10_0_5) AND NOT FIREABLE(switch10_5_4) AND NOT FIREABLE(switch10_6_4) AND NOT FIREABLE(switch10_3_5) AND NOT FIREABLE(switch10_4_5) AND NOT FIREABLE(switch10_1_5) AND NOT FIREABLE(switch10_2_5) AND NOT FIREABLE(switch10_7_5) AND NOT FIREABLE(switch10_0_6) AND NOT FIREABLE(switch10_5_5) AND NOT FIREABLE(switch10_6_5) AND NOT FIREABLE(switch10_3_6) AND NOT FIREABLE(switch10_4_6) AND NOT FIREABLE(switch10_1_6) AND NOT FIREABLE(switch10_2_6) AND NOT FIREABLE(switch10_0_7) AND NOT FIREABLE(switch10_7_6) AND NOT FIREABLE(switch10_6_6) AND NOT FIREABLE(switch10_5_6) AND NOT FIREABLE(switch10_4_7) AND NOT FIREABLE(switch10_3_7) AND NOT FIREABLE(switch10_2_7) AND NOT FIREABLE
(switch10_1_7) AND NOT FIREABLE(switch10_7_7) AND NOT FIREABLE(switch10_6_7) AND NOT FIREABLE(switch10_5_7) AND NOT FIREABLE(switch10_5_0) AND NOT FIREABLE(switch10_6_0) AND NOT FIREABLE(switch10_7_0) AND NOT FIREABLE(switch10_0_1) AND NOT FIREABLE(switch10_1_1) AND NOT FIREABLE(switch10_2_1) AND NOT FIREABLE(switch10_3_1) AND NOT FIREABLE(switch10_4_1) AND NOT FIREABLE(switch10_5_1) AND NOT FIREABLE(switch10_6_1) AND NOT FIREABLE(switch10_7_1) AND NOT FIREABLE(switch10_0_2) AND NOT FIREABLE(switch10_1_2) AND NOT FIREABLE(switch10_2_2) AND NOT FIREABLE(switch10_3_2) AND NOT FIREABLE(switch10_4_2) AND NOT FIREABLE(switch10_6_2) AND NOT FIREABLE(switch10_5_2) AND NOT FIREABLE(switch10_0_3) AND NOT FIREABLE(switch10_7_2) AND NOT FIREABLE(switch10_2_3) AND NOT FIREABLE(switch10_1_3) AND NOT FIREABLE(switch10_4_3) AND NOT FIREABLE(switch10_3_3) AND NOT FIREABLE(switch10_6_3) AND NOT FIREABLE(switch10_5_3) AND NOT FIREABLE(switch10_0_4) AND NOT FIREABLE(switch10_7_3) AND NOT FIREABLE(switch10_2_4) AND NOT FIREABLE(switch10_1_4) AND NOT FIREABLE(switch10_4_4) AND NOT FIREABLE(switch10_3_4)) OR (NOT FIREABLE(display1_2_1) AND NOT FIREABLE(display1_1_1) AND NOT FIREABLE(display1_4_1) AND NOT FIREABLE(display1_3_1) AND NOT FIREABLE(display1_6_0) AND NOT FIREABLE(display1_5_0) AND NOT FIREABLE(display1_0_1) AND NOT FIREABLE(display1_7_0) AND NOT FIREABLE(display1_2_2) AND NOT FIREABLE(display1_1_2) AND NOT FIREABLE(display1_4_2) AND NOT FIREABLE(display1_3_2) AND NOT FIREABLE(display1_6_1) AND NOT FIREABLE(display1_5_1) AND NOT FIREABLE(display1_0_2) AND NOT FIREABLE(display1_7_1) AND NOT FIREABLE(display1_1_0) AND NOT FIREABLE(display1_2_0) AND NOT FIREABLE(display1_3_0) AND NOT FIREABLE(display1_4_0) AND NOT FIREABLE(display1_0_0) AND NOT FIREABLE(display1_7_5) AND NOT FIREABLE(display1_0_6) AND NOT FIREABLE(display1_5_5) AND NOT FIREABLE(display1_6_5) AND NOT FIREABLE(display1_3_6) AND NOT FIREABLE(display1_4_6) AND NOT FIREABLE(display1_1_6) AND NOT FIREABLE(display1_2_6) AND NOT FIREABLE(display1_7_4) AND NOT FIREABLE(display1_0_5) AND NOT FIREABLE(display1_5_4) AND NOT FIREABLE(display1_6_4) AND NOT FIREABLE(display1_3_5) AND NOT FIREABLE(display1_4_5) AND NOT FIREABLE(display1_1_5) AND NOT FIREABLE(display1_2_5) AND NOT FIREABLE(display1_0_4) AND NOT FIREABLE(display1_7_3) AND NOT FIREABLE(display1_6_3) AND NOT FIREABLE(display1_5_3) AND NOT FIREABLE(display1_4_4) AND NOT FIREABLE(display1_3_4) AND NOT FIREABLE(display1_2_4) AND NOT FIREABLE(display1_1_4) AND NOT FIREABLE(display1_0_3) AND NOT FIREABLE(display1_7_2) AND NOT FIREABLE(display1_6_2) AND NOT FIREABLE(display1_5_2) AND NOT FIREABLE(display1_4_3) AND NOT FIREABLE(display1_3_3) AND NOT FIREABLE(display1_2_3) AND NOT FIREABLE(display1_1_3) AND NOT FIREABLE(display1_6_7) AND NOT FIREABLE(display1_5_7) AND NOT FIREABLE(display1_7_7) AND NOT FIREABLE(display1_6_6) AND NOT FIREABLE(display1_5_6) AND NOT FIREABLE(display1_0_7) AND NOT FIREABLE(display1_7_6) AND NOT FIREABLE(display1_2_7) AND NOT FIREABLE(display1_1_7) AND NOT FIREABLE(display1_4_7) AND NOT FIREABLE(display1_3_7)) OR (NOT FIREABLE(display2_6_0) AND NOT FIREABLE(display2_5_0) AND NOT FIREABLE(display2_0_1) AND NOT FIREABLE(display2_7_0) AND NOT FIREABLE(display2_2_1) AND NOT FIREABLE(display2_1_1) AND NOT FIREABLE(display2_4_1) AND NOT FIREABLE(display2_3_1) AND NOT FIREABLE(display2_6_1) AND NOT FIREABLE(display2_5_1) AND NOT FIREABLE(display2_0_2) AND NOT FIREABLE(display2_7_1) AND NOT FIREABLE(display2_2_2) AND NOT FIREABLE(display2_1_2) AND NOT FIREABLE(display2_4_2) AND NOT FIREABLE(display2_3_2) AND NOT FIREABLE(display2_0_0) AND NOT FIREABLE(display2_1_0) AND NOT FIREABLE(display2_2_0) AND NOT FIREABLE(display2_3_0) AND NOT FIREABLE(display2_4_0) AND NOT FIREABLE(display2_4_5) AND NOT FIREABLE(display2_3_5) AND NOT FIREABLE(display2_2_5) AND NOT FIREABLE(display2_1_5) AND NOT FIREABLE(display2_0_5) AND NOT FIREABLE(display2_7_4) AND NOT FIREABLE(display2_6_4) AND NOT FIREABLE(display2_5_4) AND NOT FIREABLE(display2_4_6) AND NOT FIREABLE(display2_3_6) AND NOT FIREABLE(display2_2_6) AND NOT FIREABLE(display2_1_6) AND NOT FIREABLE(display2_0_6) AND NOT FIREABLE(display2_7_5) AND NOT FIREABLE(display2_6_5) AND NOT FIREABLE(display2_5_5) AND NOT FIREABLE(display2_3_3) AND NOT FIREABLE(display2_4_3) AND NOT FIREABLE(display2_1_3) AND NOT FIREABLE(display2_2_3) AND NOT FIREABLE(display2_7_2) AND NOT FIREABLE(display2_0_3) AND NOT FIREABLE(display2_5_2) AND NOT FIREABLE(display2_6_2) AND NOT FIREABLE(display2_3_4) AND NOT FIREABLE(display2_4_4) AND NOT FIREABLE(display2_1_4) AND NOT FIREABLE(display2_2_4) AND NOT FIREABLE(display2_7_3) AND NOT FIREABLE(display2_0_4) AND NOT FIREABLE(display2_5_3) AND NOT FIREABLE(display2_6_3) AND NOT FIREABLE(display2_1_7) AND NOT FIREABLE(display2_2_7) AND NOT FIREABLE(display2_3_7) AND NOT FIREABLE(display2_4_7) AND NOT FIREABLE(display2_5_6) AND NOT FIREABLE(display2_6_6) AND NOT FIREABLE(display2_7_6) AND NOT FIREABLE(display2_0_7) AND NOT FIREABLE(display2_5_7) AND NOT FIREABLE(display2_6_7) AND NOT FIREABLE(display2_7_7) AND NOT FIREABLE(switch6_5_7) AND NOT FIREABLE(switch6_1_7) AND NOT FIREABLE(switch6_4_7) AND NOT FIREABLE(switch6_5_6) AND NOT FIREABLE(switch6_0_7) AND NOT FIREABLE(switch6_1_6) AND NOT FIREABLE(switch6_4_6) AND NOT FIREABLE(switch6_5_3) AND NOT FIREABLE(switch6_0_6) AND NOT FIREABLE(switch6_1_3) AND NOT FIREABLE(switch6_4_3) AND NOT FIREABLE(switch6_0_3) AND NOT FIREABLE(switch6_5_2) AND NOT FIREABLE(switch6_4_2) AND NOT FIREABLE(switch6_1_2) AND NOT FIREABLE(switch6_0_2) AND NOT FIREABLE(switch11_0_0) AND NOT FIREABLE(switch11_4_0) AND NOT FIREABLE(switch11_3_0) AND NOT FIREABLE(switch11_2_0) AND NOT FIREABLE(switch11_1_0) AND NOT FIREABLE(switch11_4_6) AND NOT FIREABLE(switch11_3_6) AND NOT FIREABLE(switch11_2_6) AND NOT FIREABLE(switch11_1_6) AND NOT FIREABLE(switch11_0_6) AND NOT FIREABLE(switch11_7_5) AND NOT FIREABLE(switch11_6_5) AND NOT FIREABLE(switch11_5_5) AND NOT FIREABLE(switch11_4_5) AND NOT FIREABLE(switch11_3_5) AND NOT FIREABLE(switch11_2_5) AND NOT FIREABLE(switch11_1_5) AND NOT FIREABLE(switch11_0_5) AND NOT FIREABLE(switch11_7_4) AND NOT FIREABLE(switch11_6_4) AND NOT FIREABLE(switch11_5_4) AND NOT FIREABLE(switch11_7_7) AND NOT FIREABLE(switch11_5_7) AND NOT FIREABLE(switch11_6_7) AND NOT FIREABLE(switch11_3_7) AND NOT FIREABLE(switch11_4_7) AND NOT FIREABLE(switch11_1_7) AND NOT FIREABLE(switch11_2_7) AND NOT FIREABLE(switch11_7_6) AND NOT FIREABLE(switch11_0_7) AND NOT FIREABLE(switch11_5_6) AND NOT FIREABLE(switch11_6_6) AND NOT FIREABLE(switch11_2_2) AND NOT FIREABLE(switch11_1_2) AND NOT FIREABLE(switch11_4_2) AND NOT FIREABLE(switch11_3_2) AND NOT FIREABLE(switch11_6_1) AND NOT FIREABLE(switch11_5_1) AND NOT FIREABLE(switch11_0_2) AND NOT FIREABLE(switch11_7_1) AND NOT FIREABLE(switch11_2_1) AND NOT FIREABLE(switch11_1_1) AND NOT FIREABLE(switch11_4_1) AND NOT FIREABLE(switch11_3_1) AND NOT FIREABLE(switch11_6_0) AND NOT FIREABLE(switch11_5_0) AND NOT FIREABLE(switch11_0_1) AND NOT FIREABLE(switch11_7_0) AND NOT FIREABLE(switch11_1_4) AND NOT FIREABLE(switch11_2_4) AND NOT FIREABLE(switch11_3_4) AND NOT FIREABLE(switch11_4_4) AND NOT FIREABLE(switch11_5_3) AND NOT FIREABLE(switch11_6_3) AND NOT FIREABLE(switch11_7_3) AND NOT FIREABLE(switch11_0_4) AND NOT FIREABLE(switch11_1_3) AND NOT FIREABLE(switch11_2_3) AND NOT FIREABLE(switch11_3_3) AND NOT FIREABLE(switch11_4_3) AND NOT FIREABLE(switch11_5_2) AND NOT FIREABLE(switch11_6_2) AND NOT FIREABLE(switch11_7_2) AND NOT FIREABLE(switch11_0_3))))) : E (F ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3)))) : A (G ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FIREABLE(switch6_0_2) OR FIREABLE(switch1_1_4) OR FIREABLE(switch1_0_5) OR FIREABLE(switch1_1_5) OR FIREABLE(switch1_0_4) OR (NOT FIREABLE(display3_4_0) AND NOT FIREABLE(display3_3_0) AND NOT FIREABLE(display3_2_0) AND NOT FIREABLE(display3_1_0) AND NOT FIREABLE(display3_0_0) AND NOT FIREABLE(display3_3_2) AND NOT FIREABLE(display3_4_2) AND NOT FIREABLE(display3_1_2) AND NOT FIREABLE(display3_2_2) AND NOT FIREABLE(display3_7_1) AND NOT FIREABLE(display3_0_2) AND NOT FIREABLE(display3_5_1) AND NOT FIREABLE(display3_6_1) AND NOT FIREABLE(display3_3_1) AND NOT FIREABLE(display3_4_1) AND NOT FIREABLE(display3_1_1) AND NOT FIREABLE(display3_2_1) AND NOT FIREABLE(display3_7_0) AND NOT FIREABLE(display3_0_1) AND NOT FIREABLE(display3_5_0) AND NOT FIREABLE(display3_6_0) AND NOT FIREABLE(display3_0_5) AND NOT FIREABLE(display3_7_4) AND NOT FIREABLE(display3_6_4) AND NOT FIREABLE(display3_5_4) AND NOT FIREABLE(display3_4_5) AND NOT FIREABLE(display3_3_5) AND NOT FIREABLE(display3_2_5) AND NOT FIREABLE(display3_1_5) AND NOT FIREABLE(display3_0_6) AND NOT FIREABLE(display3_7_5) AND NOT FIREABLE(display3_6_5) AND NOT FIREABLE(display3_5_5) AND NOT FIREABLE(display3_4_6) AND NOT FIREABLE(display3_3_6) AND NOT FIREABLE(display3_2_6) AND NOT FIREABLE(display3_1_6) AND NOT FIREABLE(display3_7_2) AND NOT FIREABLE(display3_0_3) AND NOT FIREABLE(display3_5_2) AND NOT FIREABLE(display3_6_2) AND NOT FIREABLE(display3_3_3) AND NOT FIREABLE(display3_4_3) AND NOT FIREABLE(display3_1_3) AND NOT FIREABLE(display3_2_3) AND NOT FIREABLE(display3_7_3) AND NOT FIREABLE(display3_0_4) AND NOT FIREABLE(display3_5_3) AND NOT FIREABLE(display3_6_3) AND NOT FIREABLE(display3_3_4) AND NOT FIREABLE(display3_4_4) AND NOT FIREABLE(display3_1_4) AND NOT FIREABLE(display3_2_4) AND NOT FIREABLE(display3_5_6) AND NOT FIREABLE(display3_6_6) AND NOT FIREABLE(display3_7_6) AND NOT FIREABLE(display3_0_7) AND NOT FIREABLE(display3_1_7) AND NOT FIREABLE(display3_2_7) AND NOT FIREABLE(display3_3_7) AND NOT FIREABLE(display3_4_7) AND NOT FIREABLE(display3_5_7) AND NOT FIREABLE(display3_6_7) AND NOT FIREABLE(display3_7_7))))) : E (F ((FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(display2_4_2) OR FIREABLE(display2_3_2) OR FIREABLE(display2_0_0) OR FIREABLE(display2_1_0) OR FIREABLE(display2_2_0) OR FIREABLE(display2_3_0) OR FIREABLE(display2_4_0) OR FIREABLE(display2_4_5) OR FIREABLE(display2_3_5) OR FIREABLE(display2_2_5) OR FIREABLE(display2_1_5) OR FIREABLE(display2_0_5) OR FIREABLE(display2_7_4) OR FIREABLE(display2_6_4) OR FIREABLE(display2_5_4) OR FIREABLE(display2_4_6) OR FIREABLE(display2_3_6) OR FIREABLE(display2_2_6) OR FIREABLE(display2_1_6) OR FIREABLE(display2_0_6) OR FIREABLE(display2_7_5) OR FIREABLE(display2_6_5) OR FIREABLE(display2_5_5) OR FIREABLE(display2_3_3) OR FIREABLE(display2_4_3) OR FIREABLE(display2_1_3) OR FIREABLE(display2_2_3) OR FIREABLE(display2_7_2) OR FIREABLE(display2_0_3) OR FIREABLE(display2_5_2) OR FIREABLE(display2_6_2) OR FIREABLE(display2_3_4) OR FIREABLE(display2_4_4) OR FIREABLE(display2_1_4) OR FIREABLE(display2_2_4) OR FIREABLE(display2_7_3) OR FIREABLE(display2_0_4) OR FIREABLE(display2_5_3) OR FIREABLE(display2_6_3) OR FIREABLE(display2_1_7) OR FIREABLE(display2_2_7) OR FIREABLE(display2_3_7) OR FIREABLE(display2_4_7) OR FIREABLE(display2_5_6) OR FIREABLE(display2_6_6) OR FIREABLE(display2_7_6) OR FIREABLE(display2_0_7) OR FIREABLE(display2_5_7) OR FIREABLE(display2_6_7) OR FIREABLE(display2_7_7)))) : E (F (((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch10_0_6) OR FIREABLE(switch10_5_5) OR FIREABLE(switch10_6_5) OR FIREABLE(switch10_3_6) OR FIREABLE(switch10_4_6) OR FIREABLE(switch10_1_6) OR FIREABLE(switch10_2_6) OR FIREABLE(switch10_0_7) OR FIREABLE(switch10_7_6) OR FIREABLE(switch10_6_6) OR FIREABLE(switch10_5_6) OR FIREABLE(switch10_4_7) OR FIREABLE(switch10_3_7) OR FIREABLE(switch10_2_7) OR FIREABLE(switch10_1_7) OR FIREABLE(switch10_7_7) OR FIREABLE(switch10_6_7) OR FIREABLE(switch10_5_7) OR FIREABLE(switch10_5_0) OR FIREABLE(switch10_6_0) OR FIREABLE(switch10_7_0) OR FIREABLE(switch10_0_1) OR FIREABLE(switch10_1_1) OR FIREABLE(switch10_2_1) OR FIREABLE(switch10_3_1) OR FIREABLE(switch10_4_1) OR FIREABLE(switch10_5_1) OR FIREABLE(switch10_6_1) OR FIREABLE(switch10_7_1) OR FIREABLE(switch10_0_2) OR FIREABLE(switch10_1_2) OR FIREABLE(switch10_2_2) OR FIREABLE(switch10_3_2) OR FIREABLE(switch10_4_2) OR FIREABLE(switch10_6_2) OR FIREABLE(switch10_5_2) OR FIREABLE(switch10_0_3) OR FIREABLE(switch10_7_2) OR FIREABLE(switch10_2_3) OR FIREABLE(switch10_1_3) OR FIREABLE(switch10_4_3) OR FIREABLE(switch10_3_3) OR FIREABLE(switch10_6_3) OR FIREABLE(switch10_5_3) OR FIREABLE(switch10_0_4) OR FIREABLE(switch10_7_3) OR FIREABLE(switch10_2_4) OR FIREABLE(switch10_1_4) OR FIREABLE(switch10_4_4) OR FIREABLE(switch10_3_4)) AND (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3)) AND NOT FIREABLE(switch7_0_2) AND NOT FIREABLE(switch7_1_2) AND NOT FIREABLE(switch7_4_2) AND NOT FIREABLE(switch7_5_2) AND NOT FIREABLE(switch7_0_3) AND NOT FIREABLE(switch7_5_7) AND NOT FIREABLE(switch7_4_7) AND NOT FIREABLE(switch7_1_7) AND NOT FIREABLE(switch7_0_7) AND NOT FIREABLE(switch7_5_6) AND NOT FIREABLE(switch7_4_6) AND NOT FIREABLE(switch7_1_6) AND NOT FIREABLE(switch7_0_6) AND NOT FIREABLE(switch7_5_3) AND NOT FIREABLE(switch7_4_3) AND NOT FIREABLE(switch7_1_3)))) : A (G ((NOT FIREABLE(switch11_0_0) AND NOT FIREABLE(switch11_4_0) AND NOT FIREABLE(switch11_3_0) AND NOT FIREABLE(switch11_2_0) AND NOT FIREABLE(switch11_1_0) AND NOT FIREABLE(switch11_4_6) AND NOT FIREABLE(switch11_3_6)
AND NOT FIREABLE(switch11_2_6) AND NOT FIREABLE(switch11_1_6) AND NOT FIREABLE(switch11_0_6) AND NOT FIREABLE(switch11_7_5) AND NOT FIREABLE(switch11_6_5) AND NOT FIREABLE(switch11_5_5) AND NOT FIREABLE(switch11_4_5) AND NOT FIREABLE(switch11_3_5) AND NOT FIREABLE(switch11_2_5) AND NOT FIREABLE(switch11_1_5) AND NOT FIREABLE(switch11_0_5) AND NOT FIREABLE(switch11_7_4) AND NOT FIREABLE(switch11_6_4) AND NOT FIREABLE(switch11_5_4) AND NOT FIREABLE(switch11_7_7) AND NOT FIREABLE(switch11_5_7) AND NOT FIREABLE(switch11_6_7) AND NOT FIREABLE(switch11_3_7) AND NOT FIREABLE(switch11_4_7) AND NOT FIREABLE(switch11_1_7) AND NOT FIREABLE(switch11_2_7) AND NOT FIREABLE(switch11_7_6) AND NOT FIREABLE(switch11_0_7) AND NOT FIREABLE(switch11_5_6) AND NOT FIREABLE(switch11_6_6) AND NOT FIREABLE(switch11_2_2) AND NOT FIREABLE(switch11_1_2) AND NOT FIREABLE(switch11_4_2) AND NOT FIREABLE(switch11_3_2) AND NOT FIREABLE(switch11_6_1) AND NOT FIREABLE(switch11_5_1) AND NOT FIREABLE(switch11_0_2) AND NOT FIREABLE(switch11_7_1) AND NOT FIREABLE(switch11_2_1) AND NOT FIREABLE(switch11_1_1) AND NOT FIREABLE(switch11_4_1) AND NOT FIREABLE(switch11_3_1) AND NOT FIREABLE(switch11_6_0) AND NOT FIREABLE(switch11_5_0) AND NOT FIREABLE(switch11_0_1) AND NOT FIREABLE(switch11_7_0) AND NOT FIREABLE(switch11_1_4) AND NOT FIREABLE(switch11_2_4) AND NOT FIREABLE(switch11_3_4) AND NOT FIREABLE(switch11_4_4) AND NOT FIREABLE(switch11_5_3) AND NOT FIREABLE(switch11_6_3) AND NOT FIREABLE(switch11_7_3) AND NOT FIREABLE(switch11_0_4) AND NOT FIREABLE(switch11_1_3) AND NOT FIREABLE(switch11_2_3) AND NOT FIREABLE(switch11_3_3) AND NOT FIREABLE(switch11_4_3) AND NOT FIREABLE(switch11_5_2) AND NOT FIREABLE(switch11_6_2) AND NOT FIREABLE(switch11_7_2) AND NOT FIREABLE(switch11_0_3) AND ((NOT FIREABLE(display1_2_1) AND NOT FIREABLE(display1_1_1) AND NOT FIREABLE(display1_4_1) AND NOT FIREABLE(display1_3_1) AND NOT FIREABLE(display1_6_0) AND NOT FIREABLE(display1_5_0) AND NOT FIREABLE(display1_0_1) AND NOT FIREABLE(display1_7_0) AND NOT FIREABLE(display1_2_2) AND NOT FIREABLE(display1_1_2) AND NOT FIREABLE(display1_4_2) AND NOT FIREABLE(display1_3_2) AND NOT FIREABLE(display1_6_1) AND NOT FIREABLE(display1_5_1) AND NOT FIREABLE(display1_0_2) AND NOT FIREABLE(display1_7_1) AND NOT FIREABLE(display1_1_0) AND NOT FIREABLE(display1_2_0) AND NOT FIREABLE(display1_3_0) AND NOT FIREABLE(display1_4_0) AND NOT FIREABLE(display1_0_0) AND NOT FIREABLE(display1_7_5) AND NOT FIREABLE(display1_0_6) AND NOT FIREABLE(display1_5_5) AND NOT FIREABLE(display1_6_5) AND NOT FIREABLE(display1_3_6) AND NOT FIREABLE(display1_4_6) AND NOT FIREABLE(display1_1_6) AND NOT FIREABLE(display1_2_6) AND NOT FIREABLE(display1_7_4) AND NOT FIREABLE(display1_0_5) AND NOT FIREABLE(display1_5_4) AND NOT FIREABLE(display1_6_4) AND NOT FIREABLE(display1_3_5) AND NOT FIREABLE(display1_4_5) AND NOT FIREABLE(display1_1_5) AND NOT FIREABLE(display1_2_5) AND NOT FIREABLE(display1_0_4) AND NOT FIREABLE(display1_7_3) AND NOT FIREABLE(display1_6_3) AND NOT FIREABLE(display1_5_3) AND NOT FIREABLE(display1_4_4) AND NOT FIREABLE(display1_3_4) AND NOT FIREABLE(display1_2_4) AND NOT FIREABLE(display1_1_4) AND NOT FIREABLE(display1_0_3) AND NOT FIREABLE(display1_7_2) AND NOT FIREABLE(display1_6_2) AND NOT FIREABLE(display1_5_2) AND NOT FIREABLE(display1_4_3) AND NOT FIREABLE(display1_3_3) AND NOT FIREABLE(display1_2_3) AND NOT FIREABLE(display1_1_3) AND NOT FIREABLE(display1_6_7) AND NOT FIREABLE(display1_5_7) AND NOT FIREABLE(display1_7_7) AND NOT FIREABLE(display1_6_6) AND NOT FIREABLE(display1_5_6) AND NOT FIREABLE(display1_0_7) AND NOT FIREABLE(display1_7_6) AND NOT FIREABLE(display1_2_7) AND NOT FIREABLE(display1_1_7) AND NOT FIREABLE(display1_4_7) AND NOT FIREABLE(display1_3_7)) OR (NOT FIREABLE(switch7_0_2) AND NOT FIREABLE(switch7_1_2) AND NOT FIREABLE(switch7_4_2) AND NOT FIREABLE(switch7_5_2) AND NOT FIREABLE(switch7_0_3) AND NOT FIREABLE(switch7_5_7) AND NOT FIREABLE(switch7_4_7) AND NOT FIREABLE(switch7_1_7) AND NOT FIREABLE(switch7_0_7) AND NOT FIREABLE(switch7_5_6) AND NOT FIREABLE(switch7_4_6) AND NOT FIREABLE(switch7_1_6) AND NOT FIREABLE(switch7_0_6) AND NOT FIREABLE(switch7_5_3) AND NOT FIREABLE(switch7_4_3) AND NOT FIREABLE(switch7_1_3)) OR FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7) OR FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7) OR ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7)) AND (FIREABLE(switch8_1_7) OR FIREABLE(switch8_4_7) OR FIREABLE(switch8_5_7) OR FIREABLE(switch8_1_3) OR FIREABLE(switch8_4_3) OR FIREABLE(switch8_5_3) OR FIREABLE(switch8_0_6) OR FIREABLE(switch8_1_6) OR FIREABLE(switch8_4_6) OR FIREABLE(switch8_5_6) OR FIREABLE(switch8_0_7) OR FIREABLE(switch8_0_2) OR FIREABLE(switch8_4_2) OR FIREABLE(switch8_1_2) OR FIREABLE(switch8_0_3) OR FIREABLE(switch8_5_2))))))) : E (F ((FIREABLE(switch11_3_1) AND FIREABLE(display2_3_0) AND (FIREABLE(display1_7_2) OR FIREABLE(switch11_5_1)) AND (FIREABLE(switch3_2_6) OR FIREABLE(display1_2_4) OR (FIREABLE(switch9_3_4) AND FIREABLE(switch10_4_2))) AND FIREABLE(display1_4_1) AND FIREABLE(display4_6_6)))) : E (F ((FIREABLE(switch12_1_1) AND FIREABLE(switch11_0_4)))) : E (F ((FIREABLE(display3_4_5) OR FIREABLE(display2_5_6)))) : E (F ((FIREABLE(display3_1_4) AND FIREABLE(switch10_7_1) AND FIREABLE(display4_2_4) AND FIREABLE(switch10_2_4) AND (FIREABLE(switch5_1_2) OR FIREABLE(display1_4_2))))) : E (F (FIREABLE(switch10_2_7))) : E (F ((FIREABLE(display3_3_2) AND FIREABLE(display4_0_4) AND (FIREABLE(switch9_3_7) OR FIREABLE(display3_7_2) OR FIREABLE(switch11_7_5) OR FIREABLE(switch10_3_0)) AND (FIREABLE(switch6_0_2) OR NOT FIREABLE(display3_0_6) OR NOT FIREABLE(switch10_0_2) OR NOT FIREABLE(display3_0_3))))) : E (F (FIREABLE(display4_0_7))) : E (F ((FIREABLE(switch9_1_4) AND FIREABLE(switch6_5_7) AND FIREABLE(switch12_5_5))))
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 221 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((NOT FIREABLE(switch9_1_0) AND NOT FIREABLE(switch9_2_0) AND NOT FIREABLE(switch9_3_0) AND NOT FIREABLE(switch9_4_0) AND NOT FIREABLE(switch9_0_0) AND NOT FIREABLE(switch9_3_5) AND NOT FIREABLE(switch9_4_5) AND NOT FIREABLE(switch9_1_5) AND NOT FIREABLE(switch9_2_5) AND NOT FIREABLE(switch9_7_4) AND NOT FIREABLE(switch9_0_5) AND NOT FIREABLE(switch9_5_4) AND NOT FIREABLE(switch9_6_4) AND NOT... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 10 markings, 9 edges
lola: ========================================
lola: subprocess 1 will run for 236 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F (((FIREABLE(switch9_1_0) OR FIREABLE(switch9_2_0) OR FIREABLE(switch9_3_0) OR FIREABLE(switch9_4_0) OR FIREABLE(switch9_0_0) OR FIREABLE(switch9_3_5) OR FIREABLE(switch9_4_5) OR FIREABLE(switch9_1_5) OR FIREABLE(switch9_2_5) OR FIREABLE(switch9_7_4) OR FIREABLE(switch9_0_5) OR FIREABLE(switch9_5_4) OR FIREABLE(switch9_6_4) OR FIREABLE(switch9_3_6) OR FIREABLE(switch9_4_6) OR FI... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Could not create input for sara: DNF too long or DEADLOCK predicate contained
lola: sara not yet started (preprocessing) || 506692 markings, 778112 edges, 101338 markings/sec, 0 secs
lola: sara not yet started (preprocessing) || 959855 markings, 1622317 edges, 90633 markings/sec, 5 secs
lola: sara not yet started (preprocessing) || 1418091 markings, 2478425 edges, 91647 markings/sec, 10 secs
lola: sara not yet started (preprocessing) || 1871526 markings, 3327814 edges, 90687 markings/sec, 15 secs
lola: sara not yet started (preprocessing) || 2343639 markings, 4140918 edges, 94423 markings/sec, 20 secs
lola: sara not yet started (preprocessing) || 2777970 markings, 4961652 edges, 86866 markings/sec, 25 secs
lola: sara not yet started (preprocessing) || 3212501 markings, 5728391 edges, 86906 markings/sec, 30 secs
lola: sara not yet started (preprocessing) || 3658761 markings, 6510796 edges, 89252 markings/sec, 35 secs
lola: sara not yet started (preprocessing) || 4109793 markings, 7308369 edges, 90206 markings/sec, 40 secs
lola: sara not yet started (preprocessing) || 4583294 markings, 8056813 edges, 94700 markings/sec, 45 secs
lola: sara not yet started (preprocessing) || 5038525 markings, 8821133 edges, 91046 markings/sec, 50 secs
lola: sara not yet started (preprocessing) || 5471115 markings, 9616306 edges, 86518 markings/sec, 55 secs
lola: sara not yet started (preprocessing) || 5908002 markings, 10420071 edges, 87377 markings/sec, 60 secs
lola: sara not yet started (preprocessing) || 6345553 markings, 11208322 edges, 87510 markings/sec, 65 secs
lola: sara not yet started (preprocessing) || 6806847 markings, 12024956 edges, 92259 markings/sec, 70 secs
lola: sara not yet started (preprocessing) || 7271569 markings, 12828209 edges, 92944 markings/sec, 75 secs
lola: sara not yet started (preprocessing) || 7718266 markings, 13634740 edges, 89339 markings/sec, 80 secs
lola: sara not yet started (preprocessing) || 8153539 markings, 14437822 edges, 87055 markings/sec, 85 secs
lola: sara not yet started (preprocessing) || 8596377 markings, 15233154 edges, 88568 markings/sec, 90 secs
lola: sara not yet started (preprocessing) || 9022195 markings, 16012137 edges, 85164 markings/sec, 95 secs
lola: sara not yet started (preprocessing) || 9448332 markings, 16785522 edges, 85227 markings/sec, 100 secs
lola: sara not yet started (preprocessing) || 9870777 markings, 17551032 edges, 84489 markings/sec, 105 secs
lola: sara not yet started (preprocessing) || 10303702 markings, 18323681 edges, 86585 markings/sec, 110 secs
lola: sara not yet started (preprocessing) || 10729395 markings, 19129710 edges, 85139 markings/sec, 115 secs
lola: sara not yet started (preprocessing) || 11165651 markings, 19926020 edges, 87251 markings/sec, 120 secs
lola: sara not yet started (preprocessing) || 11634154 markings, 20699577 edges, 93701 markings/sec, 125 secs
lola: sara not yet started (preprocessing) || 12066841 markings, 21506356 edges, 86537 markings/sec, 130 secs
lola: sara not yet started (preprocessing) || 12502376 markings, 22275755 edges, 87107 markings/sec, 135 secs
lola: sara not yet started (preprocessing) || 12930880 markings, 23051395 edges, 85701 markings/sec, 140 secs
lola: sara not yet started (preprocessing) || 13367295 markings, 23778896 edges, 87283 markings/sec, 145 secs
lola: sara not yet started (preprocessing) || 13784039 markings, 24552114 edges, 83349 markings/sec, 150 secs
lola: sara not yet started (preprocessing) || 14208187 markings, 25331314 edges, 84830 markings/sec, 155 secs
lola: sara not yet started (preprocessing) || 14644793 markings, 26100637 edges, 87321 markings/sec, 160 secs
lola: sara not yet started (preprocessing) || 15081964 markings, 26880316 edges, 87434 markings/sec, 165 secs
lola: sara not yet started (preprocessing) || 15490657 markings, 27626308 edges, 81739 markings/sec, 170 secs
lola: sara not yet started (preprocessing) || 15914726 markings, 28390146 edges, 84814 markings/sec, 175 secs
lola: sara not yet started (preprocessing) || 16357041 markings, 29185051 edges, 88463 markings/sec, 180 secs
lola: sara not yet started (preprocessing) || 16794958 markings, 29965200 edges, 87583 markings/sec, 185 secs
lola: sara not yet started (preprocessing) || 17266793 markings, 30777626 edges, 94367 markings/sec, 190 secs
lola: sara not yet started (preprocessing) || 17718161 markings, 31632524 edges, 90274 markings/sec, 195 secs
lola: sara not yet started (preprocessing) || 18176309 markings, 32467669 edges, 91630 markings/sec, 200 secs
lola: sara not yet started (preprocessing) || 18633652 markings, 33278937 edges, 91469 markings/sec, 205 secs
lola: sara not yet started (preprocessing) || 19090642 markings, 34042570 edges, 91398 markings/sec, 210 secs
lola: sara not yet started (preprocessing) || 19524033 markings, 34819019 edges, 86678 markings/sec, 215 secs
lola: sara not yet started (preprocessing) || 19951999 markings, 35576672 edges, 85593 markings/sec, 220 secs
lola: sara not yet started (preprocessing) || 20379471 markings, 36345873 edges, 85494 markings/sec, 225 secs
lola: sara not yet started (preprocessing) || 20800610 markings, 37113650 edges, 84228 markings/sec, 230 secs
lola: local time limit reached - aborting
lola: Child process aborted or communication problem between parent and child process
lola: subprocess 2 will run for 235 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G (((NOT FIREABLE(switch10_4_0) AND NOT FIREABLE(switch10_3_0) AND NOT FIREABLE(switch10_2_0) AND NOT FIREABLE(switch10_1_0) AND NOT FIREABLE(switch10_0_0) AND NOT FIREABLE(switch10_7_4) AND NOT FIREABLE(switch10_0_5) AND NOT FIREABLE(switch10_5_4) AND NOT FIREABLE(switch10_6_4) AND NOT FIREABLE(switch10_3_5) AND NOT FIREABLE(switch10_4_5) AND NOT FIREABLE(switch10_1_5) AND NOT FIREABLE(switch1... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Could not create input for sara: DNF too long or DEADLOCK predicate contained
lola: sara not yet started (preprocessing) || 332305 markings, 421792 edges, 66461 markings/sec, 0 secs
lola: sara not yet started (preprocessing) || 579134 markings, 851018 edges, 49366 markings/sec, 5 secs
lola: sara not yet started (preprocessing) || 825173 markings, 1288449 edges, 49208 markings/sec, 10 secs
lola: sara not yet started (preprocessing) || 1061496 markings, 1706751 edges, 47265 markings/sec, 15 secs
lola: sara not yet started (preprocessing) || 1331477 markings, 2107622 edges, 53996 markings/sec, 20 secs
lola: sara not yet started (preprocessing) || 1582370 markings, 2536680 edges, 50179 markings/sec, 25 secs
lola: sara not yet started (preprocessing) || 1812891 markings, 2961864 edges, 46104 markings/sec, 30 secs
lola: sara not yet started (preprocessing) || 2112487 markings, 3350854 edges, 59919 markings/sec, 35 secs
lola: sara not yet started (preprocessing) || 2339182 markings, 3784723 edges, 45339 markings/sec, 40 secs
lola: sara not yet started (preprocessing) || 2553350 markings, 4207691 edges, 42834 markings/sec, 45 secs
lola: sara not yet started (preprocessing) || 2848490 markings, 4596451 edges, 59028 markings/sec, 50 secs
lola: sara not yet started (preprocessing) || 3070031 markings, 5041089 edges, 44308 markings/sec, 55 secs
lola: sara not yet started (preprocessing) || 3315300 markings, 5484367 edges, 49054 markings/sec, 60 secs
lola: sara not yet started (preprocessing) || 3576334 markings, 5914754 edges, 52207 markings/sec, 65 secs
lola: sara not yet started (preprocessing) || 3832860 markings, 6339811 edges, 51305 markings/sec, 70 secs
lola: sara not yet started (preprocessing) || 4069356 markings, 6753561 edges, 47299 markings/sec, 75 secs
lola: sara not yet started (preprocessing) || 4308158 markings, 7167781 edges, 47760 markings/sec, 80 secs
lola: sara not yet started (preprocessing) || 4565034 markings, 7593630 edges, 51375 markings/sec, 85 secs
lola: sara not yet started (preprocessing) || 4823608 markings, 8021636 edges, 51715 markings/sec, 90 secs
lola: sara not yet started (preprocessing) || 5090591 markings, 8467096 edges, 53397 markings/sec, 95 secs
lola: sara not yet started (preprocessing) || 5354636 markings, 8910456 edges, 52809 markings/sec, 100 secs
lola: sara not yet started (preprocessing) || 5622674 markings, 9348262 edges, 53608 markings/sec, 105 secs
lola: sara not yet started (preprocessing) || 5889575 markings, 9778853 edges, 53380 markings/sec, 110 secs
lola: sara not yet started (preprocessing) || 6148612 markings, 10191087 edges, 51807 markings/sec, 115 secs
lola: sara not yet started (preprocessing) || 6410839 markings, 10616569 edges, 52445 markings/sec, 120 secs
lola: sara not yet started (preprocessing) || 6674214 markings, 11035262 edges, 52675 markings/sec, 125 secs
lola: sara not yet started (preprocessing) || 6934817 markings, 11457488 edges, 52121 markings/sec, 130 secs
lola: sara not yet started (preprocessing) || 7200271 markings, 11875655 edges, 53091 markings/sec, 135 secs
lola: sara not yet started (preprocessing) || 7444701 markings, 12295887 edges, 48886 markings/sec, 140 secs
lola: sara not yet started (preprocessing) || 7694273 markings, 12702921 edges, 49914 markings/sec, 145 secs
lola: sara not yet started (preprocessing) || 7921538 markings, 13119316 edges, 45453 markings/sec, 150 secs
lola: sara not yet started (preprocessing) || 8154431 markings, 13525885 edges, 46579 markings/sec, 155 secs
lola: sara not yet started (preprocessing) || 8401740 markings, 13938757 edges, 49462 markings/sec, 160 secs
lola: sara not yet started (preprocessing) || 8640493 markings, 14328068 edges, 47751 markings/sec, 165 secs
lola: sara not yet started (preprocessing) || 8870523 markings, 14712965 edges, 46006 markings/sec, 170 secs
lola: sara not yet started (preprocessing) || 9097669 markings, 15102581 edges, 45429 markings/sec, 175 secs
lola: sara not yet started (preprocessing) || 9328581 markings, 15492577 edges, 46182 markings/sec, 180 secs
lola: sara not yet started (preprocessing) || 9586258 markings, 15900211 edges, 51535 markings/sec, 185 secs
lola: sara not yet started (preprocessing) || 9820774 markings, 16306965 edges, 46903 markings/sec, 190 secs
lola: sara not yet started (preprocessing) || 10083770 markings, 16721538 edges, 52599 markings/sec, 195 secs
lola: sara not yet started (preprocessing) || 10373527 markings, 17108651 edges, 57951 markings/sec, 200 secs
lola: sara not yet started (preprocessing) || 10604073 markings, 17508716 edges, 46109 markings/sec, 205 secs
lola: sara not yet started (preprocessing) || 10828730 markings, 17898117 edges, 44931 markings/sec, 210 secs
lola: sara not yet started (preprocessing) || 11057100 markings, 18291309 edges, 45674 markings/sec, 215 secs
lola: sara not yet started (preprocessing) || 11277249 markings, 18684054 edges, 44030 markings/sec, 220 secs
lola: sara not yet started (preprocessing) || 11528648 markings, 19067648 edges, 50280 markings/sec, 225 secs
lola: local time limit reached - aborting
lola: Child process aborted or communication problem between parent and child process
lola: subprocess 3 will run for 236 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 192 literals and 64 conjunctive subformulas
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-3.sara
lola: 13 markings, 12 edges
lola: ========================================
lola: subprocess 4 will run for 255 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FIR... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 16 markings, 15 edges
lola: ========================================
lola: subprocess 5 will run for 278 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(displa... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 192 literals and 64 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-5.sara
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 16 markings, 15 edges
lola: subprocess 6 will run for 306 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F (((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switc... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: ========================================
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is unreachable.
lola: 285423 markings, 647150 edges
lola: ========================================
lola: subprocess 7 will run for 340 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G ((NOT FIREABLE(switch11_0_0) AND NOT FIREABLE(switch11_4_0) AND NOT FIREABLE(switch11_3_0) AND NOT FIREABLE(switch11_2_0) AND NOT FIREABLE(switch11_1_0) AND NOT FIREABLE(switch11_4_6) AND NOT FIREABLE(switch11_3_6) AND NOT FIREABLE(switch11_2_6) AND NOT FIREABLE(switch11_1_6) AND NOT FIREABLE(switch11_0_6) AND NOT FIREABLE(switch11_7_5) AND NOT FIREABLE(switch11_6_5) AND NOT FIREABLE(switch11... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 11 markings, 10 edges
lola: ========================================
lola: subprocess 8 will run for 383 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(switch11_3_1) AND FIREABLE(display2_3_0) AND (FIREABLE(display1_7_2) OR FIREABLE(switch11_5_1)) AND (FIREABLE(switch3_2_6) OR FIREABLE(display1_2_4) OR (FIREABLE(switch9_3_4) AND FIREABLE(switch10_4_2))) AND FIREABLE(display1_4_1) AND FIREABLE(display4_6_6))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 114 literals and 6 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-8.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-8.sara.
sara: place or transition ordering is non-deterministic
lola: sara is running 0 secs || 534849 markings, 1308333 edges, 106970 markings/sec, 0 secs
lola: sara is running 5 secs || 1040450 markings, 2508037 edges, 101120 markings/sec, 5 secs
lola: sara is running 10 secs || 1553979 markings, 3709664 edges, 102706 markings/sec, 10 secs
lola: sara is running 15 secs || 2121538 markings, 4962697 edges, 113512 markings/sec, 15 secs
lola: sara is running 20 secs || 2693019 markings, 6224622 edges, 114296 markings/sec, 20 secs
lola: sara is running 25 secs || 3192058 markings, 7414197 edges, 99808 markings/sec, 25 secs
lola: sara is running 30 secs || 3676539 markings, 8552542 edges, 96896 markings/sec, 30 secs
lola: sara is running 35 secs || 4221234 markings, 9748433 edges, 108939 markings/sec, 35 secs
lola: sara is running 40 secs || 4721039 markings, 10876433 edges, 99961 markings/sec, 40 secs
lola: sara is running 45 secs || 5217307 markings, 11972591 edges, 99254 markings/sec, 45 secs
lola: sara is running 50 secs || 5749653 markings, 13185622 edges, 106469 markings/sec, 50 secs
lola: sara is running 55 secs || 6218369 markings, 14336026 edges, 93743 markings/sec, 55 secs
lola: sara is running 60 secs || 6721108 markings, 15464793 edges, 100548 markings/sec, 60 secs
lola: sara is running 65 secs || 7206546 markings, 16648965 edges, 97088 markings/sec, 65 secs
lola: sara is running 70 secs || 7688073 markings, 17758735 edges, 96305 markings/sec, 70 secs
lola: sara is running 75 secs || 8234321 markings, 18850666 edges, 109250 markings/sec, 75 secs
lola: sara is running 80 secs || 8745472 markings, 20025892 edges, 102230 markings/sec, 80 secs
lola: sara is running 85 secs || 9294168 markings, 21183001 edges, 109739 markings/sec, 85 secs
lola: sara is running 90 secs || 9869877 markings, 22381072 edges, 115142 markings/sec, 90 secs
lola: sara is running 95 secs || 10418342 markings, 23539083 edges, 109693 markings/sec, 95 secs
lola: sara is running 100 secs || 10931355 markings, 24677864 edges, 102603 markings/sec, 100 secs
lola: sara is running 105 secs || 11387150 markings, 25726457 edges, 91159 markings/sec, 105 secs
lola: sara is running 110 secs || 11901165 markings, 26835727 edges, 102803 markings/sec, 110 secs
lola: sara is running 115 secs || 12405797 markings, 28002993 edges, 100926 markings/sec, 115 secs
lola: sara is running 120 secs || 12913879 markings, 29154703 edges, 101616 markings/sec, 120 secs
lola: sara is running 125 secs || 13389131 markings, 30254812 edges, 95050 markings/sec, 125 secs
lola: sara is running 130 secs || 13848114 markings, 31328360 edges, 91797 markings/sec, 130 secs
lola: sara is running 135 secs || 14339495 markings, 32493403 edges, 98276 markings/sec, 135 secs
lola: sara is running 140 secs || 14823284 markings, 33596864 edges, 96758 markings/sec, 140 secs
lola: sara is running 145 secs || 15277158 markings, 34722500 edges, 90775 markings/sec, 145 secs
lola: sara is running 150 secs || 15766694 markings, 35855280 edges, 97907 markings/sec, 150 secs
lola: sara is running 155 secs || 16228325 markings, 36949656 edges, 92326 markings/sec, 155 secs
lola: sara is running 160 secs || 16641175 markings, 38017781 edges, 82570 markings/sec, 160 secs
lola: sara is running 165 secs || 17083133 markings, 39076968 edges, 88392 markings/sec, 165 secs
lola: sara is running 170 secs || 17533275 markings, 40143839 edges, 90028 markings/sec, 170 secs
lola: sara is running 175 secs || 17976151 markings, 41265486 edges, 88575 markings/sec, 175 secs
lola: sara is running 180 secs || 18437838 markings, 42343100 edges, 92337 markings/sec, 180 secs
lola: sara is running 185 secs || 18871831 markings, 43432187 edges, 86799 markings/sec, 185 secs
lola: sara is running 190 secs || 19332400 markings, 44564780 edges, 92114 markings/sec, 190 secs
lola: sara is running 195 secs || 19744176 markings, 45628188 edges, 82355 markings/sec, 195 secs
lola: sara is running 200 secs || 20212834 markings, 46765359 edges, 93732 markings/sec, 200 secs
lola: sara is running 205 secs || 20666931 markings, 47869906 edges, 90819 markings/sec, 205 secs
lola: sara is running 210 secs || 21096794 markings, 48985758 edges, 85973 markings/sec, 210 secs
lola: sara is running 215 secs || 21553021 markings, 50078104 edges, 91245 markings/sec, 215 secs
lola: sara is running 220 secs || 21976383 markings, 51176195 edges, 84672 markings/sec, 220 secs
lola: sara is running 225 secs || 22399092 markings, 52239873 edges, 84542 markings/sec, 225 secs
lola: sara is running 230 secs || 22852488 markings, 53326425 edges, 90679 markings/sec, 230 secs
lola: sara is running 235 secs || 23278871 markings, 54389299 edges, 85277 markings/sec, 235 secs
lola: sara is running 240 secs || 23703136 markings, 55451447 edges, 84853 markings/sec, 240 secs
lola: sara is running 245 secs || 24113579 markings, 56522807 edges, 82089 markings/sec, 245 secs
lola: sara is running 250 secs || 24567115 markings, 57659399 edges, 90707 markings/sec, 250 secs
lola: sara is running 255 secs || 25014818 markings, 58791202 edges, 89541 markings/sec, 255 secs
lola: sara is running 260 secs || 25446062 markings, 59897297 edges, 86249 markings/sec, 260 secs
lola: sara is running 265 secs || 25863449 markings, 60960755 edges, 83477 markings/sec, 265 secs
lola: sara is running 270 secs || 26293286 markings, 62043940 edges, 85967 markings/sec, 270 secs
lola: sara is running 275 secs || 26698415 markings, 63086608 edges, 81026 markings/sec, 275 secs
lola: sara is running 280 secs || 27134374 markings, 64207209 edges, 87192 markings/sec, 280 secs
lola: sara is running 285 secs || 27598135 markings, 65292991 edges, 92752 markings/sec, 285 secs
lola: sara is running 290 secs || 28025983 markings, 66368351 edges, 85570 markings/sec, 290 secs
lola: sara is running 295 secs || 28435186 markings, 67416219 edges, 81841 markings/sec, 295 secs
lola: sara is running 300 secs || 28816387 markings, 68455272 edges, 76240 markings/sec, 300 secs
lola: sara is running 305 secs || 29215047 markings, 69470620 edges, 79732 markings/sec, 305 secs
lola: sara is running 310 secs || 29666284 markings, 70524632 edges, 90247 markings/sec, 310 secs
lola: sara is running 315 secs || 30086338 markings, 71588456 edges, 84011 markings/sec, 315 secs
lola: sara is running 320 secs || 30496319 markings, 72697294 edges, 81996 markings/sec, 320 secs
lola: sara is running 325 secs || 30925252 markings, 73765488 edges, 85787 markings/sec, 325 secs
lola: sara is running 330 secs || 31334455 markings, 74843236 edges, 81841 markings/sec, 330 secs
lola: sara is running 335 secs || 31764447 markings, 75934467 edges, 85998 markings/sec, 335 secs
lola: sara is running 340 secs || 32167220 markings, 76986497 edges, 80555 markings/sec, 340 secs
lola: sara is running 345 secs || 32574945 markings, 78057404 edges, 81545 markings/sec, 345 secs
lola: sara is running 350 secs || 33033628 markings, 79117385 edges, 91737 markings/sec, 350 secs
lola: sara is running 355 secs || 33457758 markings, 80158933 edges, 84826 markings/sec, 355 secs
lola: sara is running 360 secs || 33878770 markings, 81231706 edges, 84202 markings/sec, 360 secs
lola: sara is running 365 secs || 34296010 markings, 82310770 edges, 83448 markings/sec, 365 secs
lola: sara is running 370 secs || 34709457 markings, 83369081 edges, 82689 markings/sec, 370 secs
lola: sara is running 375 secs || 35120969 markings, 84479882 edges, 82302 markings/sec, 375 secs
lola: local time limit reached - aborting
lola: Child process aborted or communication problem between parent and child process
lola: subprocess 9 will run for 383 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(switch12_1_1) AND FIREABLE(switch11_0_4))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 6 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-9.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-9.sara.
sara: place or transition ordering is non-deterministic

lola: state equation: solution produced
lola: SUBRESULT
lola: result: yes
lola: produced by: state equation
lola: The predicate is reachable.
lola: ========================================
lola: subprocess 10 will run for 447 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(display3_4_5) OR FIREABLE(display2_5_6))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 6 literals and 2 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-10.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-10.sara.
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 23 markings, 22 edges
lola: ========================================
lola: subprocess 11 will run for 536 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(display3_1_4) AND FIREABLE(switch10_7_1) AND FIREABLE(display4_2_4) AND FIREABLE(switch10_2_4) AND (FIREABLE(switch5_1_2) OR FIREABLE(display1_4_2)))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 30 literals and 2 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-11.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-11.sara.
sara: place or transition ordering is non-deterministic

lola: state equation: solution impossible
lola: SUBRESULT
lola: result: no
lola: produced by: state equation
lola: The predicate is unreachable.
lola: subprocess 12 will run for 670 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F (FIREABLE(switch10_2_7)))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 3 literals and 1 conjunctive subformulas
lola: ========================================
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 21 markings, 20 edges
lola: ========================================
lola: subprocess 13 will run for 894 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(display3_3_2) AND FIREABLE(display4_0_4) AND (FIREABLE(switch9_3_7) OR FIREABLE(display3_7_2) OR FIREABLE(switch11_7_5) OR FIREABLE(switch10_3_0)) AND (FIREABLE(switch6_0_2) OR NOT FIREABLE(display3_0_6) OR NOT FIREABLE(switch10_0_2) OR NOT FIREABLE(display3_0_3)))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 238 literals and 23 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-13.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-13.sara.
sara: place or transition ordering is non-deterministic
lola: sara is running 0 secs || 671062 markings, 959351 edges, 134212 markings/sec, 0 secs
lola: sara is running 5 secs || 1290900 markings, 1971912 edges, 123968 markings/sec, 5 secs
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 1799345 markings, 2802304 edges
lola: ========================================
lola: subprocess 14 will run for 1334 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F (FIREABLE(display4_0_7)))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 3 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-14.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-14.sara.
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 63 markings, 62 edges
lola: subprocess 15 will run for 2668 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(switch9_1_4) AND FIREABLE(switch6_5_7) AND FIREABLE(switch12_5_5))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: ========================================
lola: state equation: Generated DNF with 9 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-15.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-15.sara.
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is unreachable.
lola: 10899 markings, 18139 edges
lola: RESULT
lola:
SUMMARY: yes unknown unknown yes no yes no no unknown yes yes no yes yes yes no
lola: ========================================
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-0 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-1 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-2 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-3 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-4 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-5 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-6 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-7 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-8 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-9 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
----- Kill lola and sara stderr -----
----- Kill lola and sara stdout -----
----- Finished stderr -----
----- Finished stdout -----

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-02"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="irma4mcc-structural"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-02.tgz
mv PermAdmissibility-PT-02 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-structural"
echo " Input is PermAdmissibility-PT-02, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r115-csrt-152666474100483"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;