About the Execution of Irma.full for Peterson-PT-6
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 6114.820 | 1067817.00 | 2173235.00 | 336.20 | ???????????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 3.0M
-rw-r--r-- 1 mcc users 67K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 190K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 61K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 198K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 56K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 144K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 35K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 114K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 66K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 180K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 66K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 219K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 14K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 29K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 1.5M May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-full
Input is Peterson-PT-6, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r114-csrt-152666472900586
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-00
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-01
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-02
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-03
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-04
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-05
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-06
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-07
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-08
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-09
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-10
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-11
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-12
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-13
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-14
FORMULA_NAME Peterson-PT-6-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1527143148834
BK_STOP 1527144216651
--------------------
content from stderr:
Prefix is 65b80f64.
Reading known information in /usr/share/mcc4mcc/65b80f64-known.json.
Reading learned information in /usr/share/mcc4mcc/65b80f64-learned.json.
Reading value translations in /usr/share/mcc4mcc/65b80f64-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using Peterson-PT-6 as instance name.
Using Peterson as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'ReachabilityCardinality', 'Place/Transition': True, 'Colored': True, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': True, 'Source Place': False, 'Sink Place': False, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': False, 'Conservative': True, 'Sub-Conservative': True, 'Nested Units': False, 'Safe': True, 'Deadlock': False, 'Reversible': True, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 3272, 'Memory': 141.45, 'Tool': 'lola'}, {'Time': 3839, 'Memory': 162, 'Tool': 'lola'}].
Learned tools are: [{'Tool': 'gspn'}].
ReachabilityCardinality lola Peterson-PT-6...
Time: 3600 - MCC
----- Start make prepare stdout -----
----- Start make prepare stderr -----
===========================================================================================
Peterson-PT-6: translating PT Petri net model.pnml into LoLA format
===========================================================================================
translating PT Petri net complete
checking for too many tokens
===========================================================================================
Peterson-PT-6: translating PT formula ReachabilityCardinality into LoLA format
===========================================================================================
translating formula complete
touch formulae;
----- Start make result stdout -----
----- Start make result stderr -----
ReachabilityCardinality @ Peterson-PT-6 @ 3540 seconds
make: [verify] Error 134 (ignored)
Makefile:222: recipe for target 'verify' failed
----- Start make result stderr -----
----- Start make result stdout -----
lola: LoLA will run for 3540 seconds at most (--timelimit)
lola: NET
lola: reading net from model.pnml.lola
lola: finished parsing
lola: closed net file model.pnml.lola
lola: 3360/65536 symbol table entries, 1 collisions
lola: preprocessing...
lola: finding significant places
lola: 1330 places, 2030 transitions, 1303 significant places
lola: computing forward-conflicting sets
lola: computing back-conflicting sets
lola: 3129 transition conflict sets
lola: TASK
lola: reading formula from Peterson-PT-6-ReachabilityCardinality.task
lola: E (F ((Turn_2_0 + Turn_2_1 + Turn_2_2 + Turn_2_3 + Turn_2_4 + Turn_2_5 + Turn_3_0 + Turn_3_1 + Turn_3_2 + Turn_3_3 + Turn_3_4 + Turn_3_5 + Turn_4_0 + Turn_4_1 + Turn_4_2 + Turn_4_3 + Turn_4_4 + Turn_4_5 + Turn_5_0 + Turn_5_1 + Turn_5_2 + Turn_5_3 + Turn_5_4 + Turn_5_5 + Turn_0_0 + Turn_0_1 + Turn_0_2 + Turn_0_3 + Turn_0_4 + Turn_0_5 + Turn_1_0 + Turn_1_1 + Turn_1_2 + Turn_1_3 + Turn_1_4 + Turn_1_5 + Turn_1_6 + Turn_0_6 + Turn_5_6 + Turn_4_6 + Turn_3_6 + Turn_2_6 <= 1))) : E (F ((((3 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4 + Idle_5 + Idle_6) OR (1 <= TestIdentity_1_0_0 + TestIdentity_1_0_1 + TestIdentity_1_0_2 + TestIdentity_1_0_3 + TestIdentity_1_0_4 + TestIdentity_1_0_5 + TestIdentity_1_0_6 + TestIdentity_3_4_5 + TestIdentity_6_3_0 + TestIdentity_6_3_1 + TestIdentity_6_3_2 + TestIdentity_6_3_3 + TestIdentity_6_3_4 + TestIdentity_6_3_5 + TestIdentity_6_3_6 + TestIdentity_3_5_0 + TestIdentity_3_5_1 + TestIdentity_3_5_2 + TestIdentity_3_5_3 + TestIdentity_3_5_4 + TestIdentity_3_5_5 + TestIdentity_3_5_6 + TestIdentity_1_1_0 + TestIdentity_1_1_1 + TestIdentity_1_1_2 + TestIdentity_1_1_3 + TestIdentity_1_1_4 + TestIdentity_1_1_5 + TestIdentity_1_1_6 + TestIdentity_3_4_4 + TestIdentity_6_4_0 + TestIdentity_6_4_1 + TestIdentity_6_4_2 + TestIdentity_6_4_3 + TestIdentity_6_4_4 + TestIdentity_6_4_5 + TestIdentity_6_4_6 + TestIdentity_4_0_0 + TestIdentity_4_0_1 + TestIdentity_4_0_2 + TestIdentity_4_0_3 + TestIdentity_4_0_4 + TestIdentity_4_0_5 + TestIdentity_4_0_6 + TestIdentity_1_2_0 + TestIdentity_1_2_1 + TestIdentity_1_2_2 + TestIdentity_1_2_3 + TestIdentity_1_2_4 + TestIdentity_1_2_5 + TestIdentity_1_2_6 + TestIdentity_3_4_3 + TestIdentity_6_5_0 + TestIdentity_6_5_1 + TestIdentity_6_5_2 + TestIdentity_6_5_3 + TestIdentity_6_5_4 + TestIdentity_6_5_5 + TestIdentity_6_5_6 + TestIdentity_4_1_0 + TestIdentity_4_1_1 + TestIdentity_4_1_2 + TestIdentity_4_1_3 + TestIdentity_4_1_4 + TestIdentity_4_1_5 + TestIdentity_4_1_6 + TestIdentity_1_3_0 + TestIdentity_1_3_1 + TestIdentity_1_3_2 + TestIdentity_1_3_3 + TestIdentity_1_3_4 + TestIdentity_1_3_5 + TestIdentity_1_3_6 + TestIdentity_3_4_2 + TestIdentity_4_2_0 + TestIdentity_4_2_1 + TestIdentity_4_2_2 + TestIdentity_4_2_3 + TestIdentity_4_2_4 + TestIdentity_4_2_5 + TestIdentity_4_2_6 + TestIdentity_1_4_0 + TestIdentity_1_4_1 + TestIdentity_1_4_2 + TestIdentity_1_4_3 + TestIdentity_1_4_4 + TestIdentity_1_4_5 + TestIdentity_1_4_6 + TestIdentity_4_3_0 + TestIdentity_4_3_1 + TestIdentity_4_3_2 + TestIdentity_4_3_3 + TestIdentity_4_3_4 + TestIdentity_4_3_5 + TestIdentity_4_3_6 + TestIdentity_1_5_0 + TestIdentity_1_5_1 + TestIdentity_1_5_2 + TestIdentity_1_5_3 + TestIdentity_1_5_4 + TestIdentity_1_5_5 + TestIdentity_1_5_6 + TestIdentity_4_4_0 + TestIdentity_4_4_1 + TestIdentity_4_4_2 + TestIdentity_4_4_3 + TestIdentity_4_4_4 + TestIdentity_4_4_5 + TestIdentity_4_4_6 + TestIdentity_2_0_0 + TestIdentity_2_0_1 + TestIdentity_2_0_2 + TestIdentity_2_0_3 + TestIdentity_2_0_4 + TestIdentity_2_0_5 + TestIdentity_2_0_6 + TestIdentity_4_5_0 + TestIdentity_4_5_1 + TestIdentity_4_5_2 + TestIdentity_4_5_3 + TestIdentity_4_5_4 + TestIdentity_4_5_5 + TestIdentity_4_5_6 + TestIdentity_2_1_0 + TestIdentity_2_1_1 + TestIdentity_2_1_2 + TestIdentity_2_1_3 + TestIdentity_2_1_4 + TestIdentity_2_1_5 + TestIdentity_2_1_6 + TestIdentity_3_4_1 + TestIdentity_3_4_0 + TestIdentity_5_0_0 + TestIdentity_5_0_1 + TestIdentity_5_0_2 + TestIdentity_5_0_3 + TestIdentity_5_0_4 + TestIdentity_5_0_5 + TestIdentity_5_0_6 + TestIdentity_2_2_0 + TestIdentity_2_2_1 + TestIdentity_2_2_2 + TestIdentity_2_2_3 + TestIdentity_2_2_4 + TestIdentity_2_2_5 + TestIdentity_2_2_6 + TestIdentity_5_1_0 + TestIdentity_5_1_1 + TestIdentity_5_1_2 + TestIdentity_5_1_3 + TestIdentity_5_1_4 + TestIdentity_5_1_5 + TestIdentity_5_1_6 + TestIdentity_2_3_0 + TestIdentity_2_3_1 + TestIdentity_2_3_2 + TestIdentity_2_3_3 + TestIdentity_2_3_4 + TestIdentity_2_3_5 + TestIdentity_2_3_6 + TestIdentity_5_2_0 + TestIdentity_5_2_1 + TestIdentity_5_2_2 + TestIdentity_5_2_3 + TestIdentity_5_2_4 + TestIdentity_5_2_5 + TestIdentity_5_2_6 + TestIdentity_2_4_0 + TestIdentity_2_4_1 + TestIdentity_2_4_2 + TestIdentity_2_4_3 + TestIdentity_2_4_4 + TestIdentity_2_4_5 + TestIdentity_2_4_6 + TestIdentity_0_0_0 + TestIdentity_0_0_1 + TestIdentity_0_0_2 + TestIdentity_0_0_3 + TestIdentity_0_0_4 + TestIdentity_0_0_5 + TestIdentity_0_0_6 + TestIdentity_5_3_0 + TestIdentity_5_3_1 + TestIdentity_5_3_2 + TestIdentity_5_3_3 + TestIdentity_5_3_4 + TestIdentity_5_3_5 + TestIdentity_5_3_6 + TestIdentity_2_5_0 + TestIdentity_2_5_1 + TestIdentity_2_5_2 + TestIdentity_2_5_3 + TestIdentity_2_5_4 + TestIdentity_2_5_5 + TestIdentity_2_5_6 + TestIdentity_0_1_0 + TestIdentity_0_1_1 + TestIdentity_0_1_2 + TestIdentity_0_1_3 + TestIdentity_0_1_4 + TestIdentity_0_1_5 + TestIdentity_0_1_6 + TestIdentity_5_4_0 + TestIdentity_5_4_1 + TestIdentity_5_4_2 + TestIdentity_5_4_3 + TestIdentity_5_4_4 + TestIdentity_5_4_5 + TestIdentity_5_4_6 + TestIdentity_3_0_0 + TestIdentity_3_0_1 + TestIdentity_3_0_2 + TestIdentity_3_0_3 + TestIdentity_3_0_4 + TestIdentity_3_0_5 + TestIdentity_3_0_6 + TestIdentity_0_2_0 + TestIdentity_0_2_1 + TestIdentity_0_2_2 + TestIdentity_0_2_3 + TestIdentity_0_2_4 + TestIdentity_0_2_5 + TestIdentity_0_2_6 + TestIdentity_5_5_0 + TestIdentity_5_5_1 + TestIdentity_5_5_2 + TestIdentity_5_5_3 + TestIdentity_5_5_4 + TestIdentity_5_5_5 + TestIdentity_5_5_6 + TestIdentity_3_1_0 + TestIdentity_3_1_1 + TestIdentity_3_1_2 + TestIdentity_3_1_3 + TestIdentity_3_1_4 + TestIdentity_3_1_5 + TestIdentity_3_1_6 + TestIdentity_0_3_0 + TestIdentity_0_3_1 + TestIdentity_0_3_2 + TestIdentity_0_3_3 + TestIdentity_0_3_4 + TestIdentity_0_3_5 + TestIdentity_0_3_6 + TestIdentity_6_2_5 + TestIdentity_6_2_4 + TestIdentity_6_0_0 + TestIdentity_6_0_1 + TestIdentity_6_0_2 + TestIdentity_6_0_3 + TestIdentity_6_0_4 + TestIdentity_6_0_5 + TestIdentity_6_0_6 + TestIdentity_3_2_0 + TestIdentity_3_2_1 + TestIdentity_3_2_2 + TestIdentity_3_2_3 + TestIdentity_3_2_4 + TestIdentity_3_2_5 + TestIdentity_3_2_6 + TestIdentity_0_4_0 + TestIdentity_0_4_1 + TestIdentity_0_4_2 + TestIdentity_0_4_3 + TestIdentity_0_4_4 + TestIdentity_0_4_5 + TestIdentity_0_4_6 + TestIdentity_6_2_3 + TestIdentity_6_1_0 + TestIdentity_6_1_1 + TestIdentity_6_1_2 + TestIdentity_6_1_3 + TestIdentity_6_1_4 + TestIdentity_6_1_5 + TestIdentity_6_1_6 + TestIdentity_3_3_0 + TestIdentity_3_3_1 + TestIdentity_3_3_2 + TestIdentity_3_3_3 + TestIdentity_3_3_4 + TestIdentity_3_3_5 + TestIdentity_3_3_6 + TestIdentity_0_5_0 + TestIdentity_0_5_1 + TestIdentity_0_5_2 + TestIdentity_0_5_3 + TestIdentity_0_5_4 + TestIdentity_0_5_5 + TestIdentity_0_5_6 + TestIdentity_6_2_2 + TestIdentity_6_2_1 + TestIdentity_6_2_0 + TestIdentity_6_2_6 + TestIdentity_3_4_6) OR ((1 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4 + Idle_5 + Idle_6) AND (CS_0 + CS_1 + CS_2 + CS_3 + CS_4 + CS_5 + CS_6 <= TestTurn_0_0 + TestTurn_0_1 + TestTurn_0_2 + TestTurn_0_3 + TestTurn_0_4 + TestTurn_0_5 + TestTurn_1_0 + TestTurn_1_1 + TestTurn_1_2 + TestTurn_1_3 + TestTurn_1_4 + TestTurn_1_5 + TestTurn_2_0 + TestTurn_2_1 + TestTurn_2_2 + TestTurn_2_3 + TestTurn_2_4 + TestTurn_2_5 + TestTurn_3_0 + TestTurn_3_1 + TestTurn_3_2 + TestTurn_3_3 + TestTurn_3_4 + TestTurn_3_5 + TestTurn_4_0 + TestTurn_4_1 + TestTurn_4_2 + TestTurn_4_3 + TestTurn_4_4 + TestTurn_4_5 + TestTurn_5_0 + TestTurn_5_1 + TestTurn_5_2 + TestTurn_5_3 + TestTurn_5_4 + TestTurn_5_5 + TestTurn_6_0 + TestTurn_6_1 + TestTurn_6_2 + TestTurn_6_3 + TestTurn_6_4 + TestTurn_6_5))) AND (3 <= TestIdentity_1_0_0 + TestIdentity_1_0_1 + TestIdentity_1_0_2 + TestIdentity_1_0_3 + TestIdentity_1_0_4 + TestIdentity_1_0_5 + TestIdentity_1_0_6 + TestIdentity_3_4_5 + TestIdentity_6_3_0 + TestIdentity_6_3_1 + TestIdentity_6_3_2 + TestIdentity_6_3_3 + TestIdentity_6_3_4 + TestIdentity_6_3_5 + TestIdentity_6_3_6 + TestIdentity_3_5_0 + TestIdentity_3_5_1 + TestIdentity_3_5_2 + TestIdentity_3_5_3 + TestIdentity_3_5_4 + TestIdentity_3_5_5 + TestIdentity_3_5_6 + TestIdentity_1_1_0 + TestIdentity_1_1_1 + TestIdentity_1_1_2 + TestIdentity_1_1_3 + TestIdentity_1_1_4 + TestIdentity_1_1_5 + TestIdentity_1_1_6 + TestIdentity_3_4_4 + TestIdentity_6_4_0 + TestIdentity_6_4_1 + TestIdentity_6_4_2 + TestIdentity_6_4_3 + TestIdentity_6_4_4 + TestIdentity_6_4_5 + TestIdentity_6_4_6 + TestIdentity_4_0_0 + TestIdentity_4_0_1 + TestIdentity_4_0_2 + TestIdentity_4_0_3 + TestIdentity_4_0_4 + TestIdentity_4_0_5 + TestIdentity_4_0_6 + TestIdentity_1_2_0 + TestIdentity_1_2_1 + TestIdentity_1_2_2 + TestIdentity_1_2_3 + TestIdentity_1_2_4 + TestIdentity_1_2_5 + TestIdentity_1_2_6 + TestIdentity_3_4_3 + TestIdentity_6_5_0 + TestIdentity_6_5_1 + TestIdentity_6_5_2 + TestIdentity_6_5_3 + TestIdentity_6_5_4 + TestIdentity_6_5_5 + TestIdentity_6_5_6 + TestIdentity_4_1_0 + TestIdentity_4_1_1 + TestIdentity_4_1_2 + TestIdentity_4_1_3 + TestIdentity_4_1_4 + TestIdentity_4_1_5 + TestIdentity_4_1_6 + TestIdentity_1_3_0 + TestIdentity_1_3_1 + TestIdentity_1_3_2 + TestIdentity_1_3_3 + TestIdentity_1_3_4 + TestIdentity_1_3_5 + TestIdentity_1_3_6 + TestIdentity_3_4_2 + TestIdentity_4_2_0 + TestIdentity_4_2_1 + TestIdentity_4_2_2 + TestIdentity_4_2_3 + TestIdentity_4_2_4 + TestIdentity_4_2_5 + TestIdentity_4_2_6 + TestIdentity_1_4_0 + TestIdentity_1_4_1 + TestIdentity_1_4_2 + TestIdentity_1_4_3 + TestIdentity_1_4_4 + TestIdentity_1_4_5 + TestIdentity_1_4_6 + TestIdentity_4_3_0 + TestIdentity_4_3_1 + TestIdentity_4_3_2 + TestIdentity_4_3_3 + TestIdentity_4_3_4 + TestIdentity_4_3_5 + TestIdentity_4_3_6 + TestIdentity_1_5_0 + TestIdentity_1_5_1 + TestIdentity_1_5_2 + TestIdentity_1_5_3 + TestIdentity_1_5_4 + TestIdentity_1_5_5 + TestIdentity_1_5_6 + TestIdentity_4_4_0 + TestIdentity_4_4_1 + TestIdentity_4_4_2 + TestIdentity_4_4_3 + TestIdentity_4_4_4 + TestIdentity_4_4_5 + TestIdentity_4_4_6 + TestIdentity_2_0_0 + TestIdentity_2_0_1 + TestIdentity_2_0_2 + TestIdentity_2_0_3 + TestIdentity_2_0_4 + TestIdentity_2_0_5 + TestIdentity_2_0_6 + TestIdentity_4_5_0 + TestIdentity_4_5_1 + TestIdentity_4_5_2 + TestIdentity_4_5_3 + TestIdentity_4_5_4 + TestIdentity_4_5_5 + TestIdentity_4_5_6 + TestIdentity_2_1_0 + TestIdentity_2_1_1 + TestIdentity_2_1_2 + TestIdentity_2_1_3 + TestIdentity_2_1_4 + TestIdentity_2_1_5 + TestIdentity_2_1_6 + TestIdentity_3_4_1 + TestIdentity_3_4_0 + TestIdentity_5_0_0 + TestIdentity_5_0_1 + TestIdentity_5_0_2 + TestIdentity_5_0_3 + TestIdentity_5_0_4 + TestIdentity_5_0_5 + TestIdentity_5_0_6 + TestIdentity_2_2_0 + TestIdentity_2_2_1 + TestIdentity_2_2_2 + TestIdentity_2_2_3 + TestIdentity_2_2_4 + TestIdentity_2_2_5 + TestIdentity_2_2_6 + TestIdentity_5_1_0 + TestIdentity_5_1_1 + TestIdentity_5_1_2 + TestIdentity_5_1_3 + TestIdentity_5_1_4 + TestIdentity_5_1_5 + TestIdentity_5_1_6 + TestIdentity_2_3_0 + TestIdentity_2_3_1 + TestIdentity_2_3_2 + TestIdentity_2_3_3 + TestIdentity_2_3_4 + TestIdentity_2_3_5 + TestIdentity_2_3_6 + TestIdentity_5_2_0 + TestIdentity_5_2_1 + TestIdentity_5_2_2 + TestIdentity_5_2_3 + TestIdentity_5_2_4 + TestIdentity_5_2_5 + TestIdentity_5_2_6 + TestIdentity_2_4_0 + TestIdentity_2_4_1 + TestIdentity_2_4_2 + TestIdentity_2_4_3 + TestIdentity_2_4_4 + TestIdentity_2_4_5 + TestIdentity_2_4_6 + TestIdentity_0_0_0 + TestIdentity_0_0_1 + TestIdentity_0_0_2 + TestIdentity_0_0_3 + TestIdentity_0_0_4 + TestIdentity_0_0_5 + TestIdentity_0_0_6 + TestIdentity_5_3_0 + TestIdentity_5_3_1 + TestIdentity_5_3_2 + TestIdentity_5_3_3 + TestIdentity_5_3_4 + TestIdentity_5_3_5 + TestIdentity_5_3_6 + TestIdentity_2_5_0 + TestIdentity_2_5_1 + TestIdentity_2_5_2 + TestIdentity_2_5_3 + TestIdentity_2_5_4 + TestIdentity_2_5_5 + TestIdentity_2_5_6 + TestIdentity_0_1_0 + TestIdentity_0_1_1 + TestIdentity_0_1_2 + TestIdentity_0_1_3 + TestIdentity_0_1_4 + TestIdentity_0_1_5 + TestIdentity_0_1_6 + TestIdentity_5_4_0 + TestIdentity_5_4_1 + TestIdentity_5_4_2 + TestIdentity_5_4_3 + TestIdentity_5_4_4 + TestIdentity_5_4_5 + TestIdentity_5_4_6 + TestIdentity_3_0_0 + TestIdentity_3_0_1 + TestIdentity_3_0_2 + TestIdentity_3_0_3 + TestIdentity_3_0_4 + TestIdentity_3_0_5 + TestIdentity_3_0_6 + TestIdentity_0_2_0 + TestIdentity_0_2_1 + TestIdentity_0_2_2 + TestIdentity_0_2_3 + TestIdentity_0_2_4 + TestIdentity_0_2_5 + TestIdentity_0_2_6 + TestIdentity_5_5_0 + TestIdentity_5_5_1 + TestIdentity_5_5_2 + TestIdentity_5_5_3 + TestIdentity_5_5_4 + TestIdentity_5_5_5 + TestIdentity_5_5_6 + TestIdentity_3_1_0 + TestIdentity_3_1_1 + TestIdentity_3_1_2 + TestIdentity_3_1_3 + TestIdentity_3_1_4 + TestIdentity_3_1_5 + TestIdentity_3_1_6 + TestIdentity_0_3_0 + TestIdentity_0_3_1 + TestIdentity_0_3_2 + TestIdentity_0_3_3 + TestIdentity_0_3_4 + TestIdentity_0_3_5 + TestIdentity_0_3_6 + TestIdentity_6_2_5 + TestIdentity_6_2_4 + TestIdentity_6_0_0 + TestIdentity_6_0_1 + TestIdentity_6_0_2 + TestIdentity_6_0_3 + TestIdentity_6_0_4 + TestIdentity_6_0_5 + TestIdentity_6_0_6 + TestIdentity_3_2_0 + TestIdentity_3_2_1 + TestIdentity_3_2_2 + TestIdentity_3_2_3 + TestIdentity_3_2_4 + TestIdentity_3_2_5 + TestIdentity_3_2_6 + TestIdentity_0_4_0 + TestIdentity_0_4_1 + TestIdentity_0_4_2 + TestIdentity_0_4_3 + TestIdentity_0_4_4 + TestIdentity_0_4_5 + TestIdentity_0_4_6 + TestIdentity_6_2_3 + TestIdentity_6_1_0 + TestIdentity_6_1_1 + TestIdentity_6_1_2 + TestIdentity_6_1_3 + TestIdentity_6_1_4 + TestIdentity_6_1_5 + TestIdentity_6_1_6 + TestIdentity_3_3_0 + TestIdentity_3_3_1 + TestIdentity_3_3_2 + TestIdentity_3_3_3 + TestIdentity_3_3_4 + TestIdentity_3_3_5 + TestIdentity_3_3_6 + TestIdentity_0_5_0 + TestIdentity_0_5_1 + TestIdentity_0_5_2 + TestIdentity_0_5_3 + TestIdentity_0_5_4 + TestIdentity_0_5_5 + TestIdentity_0_5_6 + TestIdentity_6_2_2 + TestIdentity_6_2_1 + TestIdentity_6_2_0 + TestIdentity_6_2_6 + TestIdentity_3_4_6)))) : A (G (((1 <= EndTurn_1_0 + EndTurn_1_1 + EndTurn_1_2 + EndTurn_1_3 + EndTurn_1_4 + EndTurn_1_5 + EndTurn_2_0 + EndTurn_2_1 + EndTurn_2_2 + EndTurn_2_3 + EndTurn_2_4 + EndTurn_2_5 + EndTurn_3_0 + EndTurn_3_1 + EndTurn_3_2 + EndTurn_3_3 + EndTurn_3_4 + EndTurn_3_5 + EndTurn_4_0 + EndTurn_4_1 + EndTurn_4_2 + EndTurn_4_3 + EndTurn_4_4 + EndTurn_4_5 + EndTurn_5_0 + EndTurn_5_1 + EndTurn_5_2 + EndTurn_5_3 + EndTurn_5_4 + EndTurn_5_5 + EndTurn_6_0 + EndTurn_6_1 + EndTurn_6_2 + EndTurn_6_3 + EndTurn_6_4 + EndTurn_6_5 + EndTurn_0_4 + EndTurn_0_3 + EndTurn_0_2 + EndTurn_0_1 + EndTurn_0_0 + EndTurn_0_5) OR (2 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4 + Idle_5 + Idle_6) OR ((IsEndLoop_0_0_0 + IsEndLoop_0_0_1 + IsEndLoop_0_0_2 + IsEndLoop_0_0_3 + IsEndLoop_0_0_4 + IsEndLoop_0_0_5 + IsEndLoop_0_0_6 + IsEndLoop_5_3_0 + IsEndLoop_5_3_1 + IsEndLoop_5_3_2 + IsEndLoop_5_3_3 + IsEndLoop_5_3_4 + IsEndLoop_5_3_5 + IsEndLoop_5_3_6 + IsEndLoop_2_5_0 + IsEndLoop_2_5_1 + IsEndLoop_2_5_2 + IsEndLoop_2_5_3 + IsEndLoop_2_5_4 + IsEndLoop_2_5_5 + IsEndLoop_2_5_6 + IsEndLoop_0_1_0 + IsEndLoop_0_1_1 + IsEndLoop_0_1_2 + IsEndLoop_0_1_3 + IsEndLoop_0_1_4 + IsEndLoop_0_1_5 + IsEndLoop_0_1_6 + IsEndLoop_5_4_0 + IsEndLoop_5_4_1 + IsEndLoop_5_4_2 + IsEndLoop_5_4_3 + IsEndLoop_5_4_4 + IsEndLoop_5_4_5 + IsEndLoop_5_4_6 + IsEndLoop_3_0_0 + IsEndLoop_3_0_1 + IsEndLoop_3_0_2 + IsEndLoop_3_0_3 + IsEndLoop_3_0_4 + IsEndLoop_3_0_5 + IsEndLoop_3_0_6 + IsEndLoop_0_2_0 + IsEndLoop_0_2_1 + IsEndLoop_0_2_2 + IsEndLoop_0_2_3 + IsEndLoop_0_2_4 + IsEndLoop_0_2_5 + IsEndLoop_0_2_6 + IsEndLoop_5_5_0 + IsEndLoop_5_5_1 + IsEndLoop_5_5_2 + IsEndLoop_5_5_3 + IsEndLoop_5_5_4 + IsEndLoop_5_5_5 + IsEndLoop_5_5_6 + IsEndLoop_3_1_0 + IsEndLoop_3_1_1 + IsEndLoop_3_1_2 + IsEndLoop_3_1_3 + IsEndLoop_3_1_4 + IsEndLoop_3_1_5 + IsEndLoop_3_1_6 + IsEndLoop_0_3_0 + IsEndLoop_0_3_1 + IsEndLoop_0_3_2 + IsEndLoop_0_3_3 + IsEndLoop_0_3_4 + IsEndLoop_0_3_5 + IsEndLoop_0_3_6 + IsEndLoop_6_0_0 + IsEndLoop_6_0_1 + IsEndLoop_6_0_2 + IsEndLoop_6_0_3 + IsEndLoop_6_0_4 + IsEndLoop_6_0_5 + IsEndLoop_6_0_6 + IsEndLoop_3_2_0 + IsEndLoop_3_2_1 + IsEndLoop_3_2_2 + IsEndLoop_3_2_3 + IsEndLoop_3_2_4 + IsEndLoop_3_2_5 + IsEndLoop_3_2_6 + IsEndLoop_0_4_0 + IsEndLoop_0_4_1 + IsEndLoop_0_4_2 + IsEndLoop_0_4_3 + IsEndLoop_0_4_4 + IsEndLoop_0_4_5 + IsEndLoop_0_4_6 + IsEndLoop_6_1_0 + IsEndLoop_6_1_1 + IsEndLoop_6_1_2 + IsEndLoop_6_1_3 + IsEndLoop_6_1_4 + IsEndLoop_6_1_5 + IsEndLoop_6_1_6 + IsEndLoop_3_3_0 + IsEndLoop_3_3_1 + IsEndLoop_3_3_2 + IsEndLoop_3_3_3 + IsEndLoop_3_3_4 + IsEndLoop_3_3_5 + IsEndLoop_3_3_6 + IsEndLoop_0_5_0 + IsEndLoop_0_5_1 + IsEndLoop_0_5_2 + IsEndLoop_0_5_3 + IsEndLoop_0_5_4 + IsEndLoop_0_5_5 + IsEndLoop_0_5_6 +
IsEndLoop_6_2_0 + IsEndLoop_6_2_1 + IsEndLoop_6_2_2 + IsEndLoop_6_2_3 + IsEndLoop_6_2_4 + IsEndLoop_6_2_5 + IsEndLoop_6_2_6 + IsEndLoop_3_4_0 + IsEndLoop_3_4_1 + IsEndLoop_3_4_2 + IsEndLoop_3_4_3 + IsEndLoop_3_4_4 + IsEndLoop_3_4_5 + IsEndLoop_3_4_6 + IsEndLoop_1_0_0 + IsEndLoop_1_0_1 + IsEndLoop_1_0_2 + IsEndLoop_1_0_3 + IsEndLoop_1_0_4 + IsEndLoop_1_0_5 + IsEndLoop_1_0_6 + IsEndLoop_6_3_0 + IsEndLoop_6_3_1 + IsEndLoop_6_3_2 + IsEndLoop_6_3_3 + IsEndLoop_6_3_4 + IsEndLoop_6_3_5 + IsEndLoop_6_3_6 + IsEndLoop_3_5_0 + IsEndLoop_3_5_1 + IsEndLoop_3_5_2 + IsEndLoop_3_5_3 + IsEndLoop_3_5_4 + IsEndLoop_3_5_5 + IsEndLoop_3_5_6 + IsEndLoop_1_1_0 + IsEndLoop_1_1_1 + IsEndLoop_1_1_2 + IsEndLoop_1_1_3 + IsEndLoop_1_1_4 + IsEndLoop_1_1_5 + IsEndLoop_1_1_6 + IsEndLoop_6_4_0 + IsEndLoop_6_4_1 + IsEndLoop_6_4_2 + IsEndLoop_6_4_3 + IsEndLoop_6_4_4 + IsEndLoop_6_4_5 + IsEndLoop_6_4_6 + IsEndLoop_4_0_0 + IsEndLoop_4_0_1 + IsEndLoop_4_0_2 + IsEndLoop_4_0_3 + IsEndLoop_4_0_4 + IsEndLoop_4_0_5 + IsEndLoop_4_0_6 + IsEndLoop_1_2_0 + IsEndLoop_1_2_1 + IsEndLoop_1_2_2 + IsEndLoop_1_2_3 + IsEndLoop_1_2_4 + IsEndLoop_1_2_5 + IsEndLoop_1_2_6 + IsEndLoop_6_5_0 + IsEndLoop_6_5_1 + IsEndLoop_6_5_2 + IsEndLoop_6_5_3 + IsEndLoop_6_5_4 + IsEndLoop_6_5_5 + IsEndLoop_6_5_6 + IsEndLoop_4_1_0 + IsEndLoop_4_1_1 + IsEndLoop_4_1_2 + IsEndLoop_4_1_3 + IsEndLoop_4_1_4 + IsEndLoop_4_1_5 + IsEndLoop_4_1_6 + IsEndLoop_1_3_0 + IsEndLoop_1_3_1 + IsEndLoop_1_3_2 + IsEndLoop_1_3_3 + IsEndLoop_1_3_4 + IsEndLoop_1_3_5 + IsEndLoop_1_3_6 + IsEndLoop_4_2_0 + IsEndLoop_4_2_1 + IsEndLoop_4_2_2 + IsEndLoop_4_2_3 + IsEndLoop_4_2_4 + IsEndLoop_4_2_5 + IsEndLoop_4_2_6 + IsEndLoop_1_4_0 + IsEndLoop_1_4_1 + IsEndLoop_1_4_2 + IsEndLoop_1_4_3 + IsEndLoop_1_4_4 + IsEndLoop_1_4_5 + IsEndLoop_1_4_6 + IsEndLoop_4_3_0 + IsEndLoop_4_3_1 + IsEndLoop_4_3_2 + IsEndLoop_4_3_3 + IsEndLoop_4_3_4 + IsEndLoop_4_3_5 + IsEndLoop_4_3_6 + IsEndLoop_1_5_0 + IsEndLoop_1_5_1 + IsEndLoop_1_5_2 + IsEndLoop_1_5_3 + IsEndLoop_1_5_4 + IsEndLoop_1_5_5 + IsEndLoop_1_5_6 + IsEndLoop_4_4_0 + IsEndLoop_4_4_1 + IsEndLoop_4_4_2 + IsEndLoop_4_4_3 + IsEndLoop_4_4_4 + IsEndLoop_4_4_5 + IsEndLoop_4_4_6 + IsEndLoop_2_0_0 + IsEndLoop_2_0_1 + IsEndLoop_2_0_2 + IsEndLoop_2_0_3 + IsEndLoop_2_0_4 + IsEndLoop_2_0_5 + IsEndLoop_2_0_6 + IsEndLoop_4_5_0 + IsEndLoop_4_5_1 + IsEndLoop_4_5_2 + IsEndLoop_4_5_3 + IsEndLoop_4_5_4 + IsEndLoop_4_5_5 + IsEndLoop_4_5_6 + IsEndLoop_2_1_0 + IsEndLoop_2_1_1 + IsEndLoop_2_1_2 + IsEndLoop_2_1_3 + IsEndLoop_2_1_4 + IsEndLoop_2_1_5 + IsEndLoop_2_1_6 + IsEndLoop_5_0_0 + IsEndLoop_5_0_1 + IsEndLoop_5_0_2 + IsEndLoop_5_0_3 + IsEndLoop_5_0_4 + IsEndLoop_5_0_5 + IsEndLoop_5_0_6 + IsEndLoop_2_2_0 + IsEndLoop_2_2_1 + IsEndLoop_2_2_2 + IsEndLoop_2_2_3 + IsEndLoop_2_2_4 + IsEndLoop_2_2_5 + IsEndLoop_2_2_6 + IsEndLoop_5_1_0 + IsEndLoop_5_1_1 + IsEndLoop_5_1_2 + IsEndLoop_5_1_3 + IsEndLoop_5_1_4 + IsEndLoop_5_1_5 + IsEndLoop_5_1_6 + IsEndLoop_2_3_0 + IsEndLoop_2_3_1 + IsEndLoop_2_3_2 + IsEndLoop_2_3_3 + IsEndLoop_2_3_4 + IsEndLoop_2_3_5 + IsEndLoop_2_3_6 + IsEndLoop_5_2_0 + IsEndLoop_5_2_1 + IsEndLoop_5_2_2 + IsEndLoop_5_2_3 + IsEndLoop_5_2_4 + IsEndLoop_5_2_5 + IsEndLoop_2_4_0 + IsEndLoop_2_4_1 + IsEndLoop_2_4_2 + IsEndLoop_2_4_3 + IsEndLoop_2_4_4 + IsEndLoop_2_4_5 + IsEndLoop_2_4_6 + IsEndLoop_5_2_6 <= AskForSection_5_0 + AskForSection_5_1 + AskForSection_5_2 + AskForSection_5_3 + AskForSection_5_4 + AskForSection_5_5 + AskForSection_6_0 + AskForSection_6_1 + AskForSection_6_2 + AskForSection_6_3 + AskForSection_6_4 + AskForSection_6_5 + AskForSection_0_0 + AskForSection_0_1 + AskForSection_0_2 + AskForSection_0_3 + AskForSection_0_4 + AskForSection_0_5 + AskForSection_1_0 + AskForSection_1_1 + AskForSection_1_2 + AskForSection_1_3 + AskForSection_1_4 + AskForSection_1_5 + AskForSection_2_0 + AskForSection_2_1 + AskForSection_2_2 + AskForSection_2_3 + AskForSection_2_4 + AskForSection_2_5 + AskForSection_3_0 + AskForSection_3_1 + AskForSection_3_2 + AskForSection_3_3 + AskForSection_3_4 + AskForSection_3_5 + AskForSection_4_0 + AskForSection_4_1 + AskForSection_4_2 + AskForSection_4_3 + AskForSection_4_4 + AskForSection_4_5) AND (1 <= Turn_2_0 + Turn_2_1 + Turn_2_2 + Turn_2_3 + Turn_2_4 + Turn_2_5 + Turn_3_0 + Turn_3_1 + Turn_3_2 + Turn_3_3 + Turn_3_4 + Turn_3_5 + Turn_4_0 + Turn_4_1 + Turn_4_2 + Turn_4_3 + Turn_4_4 + Turn_4_5 + Turn_5_0 + Turn_5_1 + Turn_5_2 + Turn_5_3 + Turn_5_4 + Turn_5_5 + Turn_0_0 + Turn_0_1 + Turn_0_2 + Turn_0_3 + Turn_0_4 + Turn_0_5 + Turn_1_0 + Turn_1_1 + Turn_1_2 + Turn_1_3 + Turn_1_4 + Turn_1_5 + Turn_1_6 + Turn_0_6 + Turn_5_6 + Turn_4_6 + Turn_3_6 + Turn_2_6)) OR ((Turn_2_0 + Turn_2_1 + Turn_2_2 + Turn_2_3 + Turn_2_4 + Turn_2_5 + Turn_3_0 + Turn_3_1 + Turn_3_2 + Turn_3_3 + Turn_3_4 + Turn_3_5 + Turn_4_0 + Turn_4_1 + Turn_4_2 + Turn_4_3 + Turn_4_4 + Turn_4_5 + Turn_5_0 + Turn_5_1 + Turn_5_2 + Turn_5_3 + Turn_5_4 + Turn_5_5 + Turn_0_0 + Turn_0_1 + Turn_0_2 + Turn_0_3 + Turn_0_4 + Turn_0_5 + Turn_1_0 + Turn_1_1 + Turn_1_2 + Turn_1_3 + Turn_1_4 + Turn_1_5 + Turn_1_6 + Turn_0_6 + Turn_5_6 + Turn_4_6 + Turn_3_6 + Turn_2_6 + 1 <= TestAlone_4_3_0 + TestAlone_4_3_1 + TestAlone_4_3_2 + TestAlone_4_3_3 + TestAlone_4_3_5 + TestAlone_4_3_6 + TestAlone_1_5_0 + TestAlone_1_5_2 + TestAlone_1_5_3 + TestAlone_1_5_4 + TestAlone_1_5_5 + TestAlone_1_5_6 + TestAlone_4_4_0 + TestAlone_4_4_1 + TestAlone_4_4_2 + TestAlone_4_4_3 + TestAlone_4_4_5 + TestAlone_4_4_6 + TestAlone_2_0_0 + TestAlone_2_0_1 + TestAlone_2_0_3 + TestAlone_2_0_4 + TestAlone_2_0_5 + TestAlone_2_0_6 + TestAlone_4_5_0 + TestAlone_4_5_1 + TestAlone_4_5_2 + TestAlone_4_5_3 + TestAlone_4_5_5 + TestAlone_4_5_6 + TestAlone_2_1_0 + TestAlone_2_1_1 + TestAlone_2_1_3 + TestAlone_2_1_4 + TestAlone_2_1_5 + TestAlone_2_1_6 + TestAlone_5_0_0 + TestAlone_5_0_1 + TestAlone_5_0_2 + TestAlone_5_0_3 + TestAlone_5_0_4 + TestAlone_5_0_6 + TestAlone_2_2_0 + TestAlone_2_2_1 + TestAlone_2_2_3 + TestAlone_2_2_4 + TestAlone_2_2_5 + TestAlone_2_2_6 + TestAlone_5_1_0 + TestAlone_5_1_1 + TestAlone_5_1_2 + TestAlone_5_1_3 + TestAlone_5_1_4 + TestAlone_5_1_6 + TestAlone_2_3_0 + TestAlone_2_3_1 + TestAlone_2_3_3 + TestAlone_2_3_4 + TestAlone_2_3_5 + TestAlone_2_3_6 + TestAlone_5_2_0 + TestAlone_5_2_1 + TestAlone_5_2_2 + TestAlone_5_2_3 + TestAlone_5_2_4 + TestAlone_5_2_6 + TestAlone_2_4_0 + TestAlone_2_4_1 + TestAlone_2_4_3 + TestAlone_2_4_4 + TestAlone_2_4_5 + TestAlone_2_4_6 + TestAlone_0_0_1 + TestAlone_0_0_2 + TestAlone_0_0_3 + TestAlone_0_0_4 + TestAlone_0_0_5 + TestAlone_0_0_6 + TestAlone_5_3_0 + TestAlone_5_3_1 + TestAlone_5_3_2 + TestAlone_5_3_3 + TestAlone_5_3_4 + TestAlone_5_3_6 + TestAlone_2_5_0 + TestAlone_2_5_1 + TestAlone_2_5_3 + TestAlone_2_5_4 + TestAlone_2_5_5 + TestAlone_2_5_6 + TestAlone_0_1_1 + TestAlone_0_1_2 + TestAlone_0_1_3 + TestAlone_0_1_4 + TestAlone_0_1_5 + TestAlone_0_1_6 + TestAlone_5_4_0 + TestAlone_5_4_1 + TestAlone_5_4_2 + TestAlone_5_4_3 + TestAlone_5_4_4 + TestAlone_5_4_6 + TestAlone_3_0_0 + TestAlone_3_0_1 + TestAlone_3_0_2 + TestAlone_3_0_4 + TestAlone_3_0_5 + TestAlone_3_0_6 + TestAlone_0_2_1 + TestAlone_0_2_2 + TestAlone_0_2_3 + TestAlone_0_2_4 + TestAlone_0_2_5 + TestAlone_0_2_6 + TestAlone_5_5_0 + TestAlone_5_5_1 + TestAlone_5_5_2 + TestAlone_5_5_3 + TestAlone_5_5_4 + TestAlone_5_5_6 + TestAlone_3_1_0 + TestAlone_3_1_1 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_3_1_5 + TestAlone_3_1_6 + TestAlone_1_4_5 + TestAlone_1_4_4 + TestAlone_0_3_1 + TestAlone_0_3_2 + TestAlone_0_3_3 + TestAlone_0_3_4 + TestAlone_0_3_5 + TestAlone_0_3_6 + TestAlone_6_0_0 + TestAlone_6_0_1 + TestAlone_6_0_2 + TestAlone_6_0_3 + TestAlone_6_0_4 + TestAlone_6_0_5 + TestAlone_3_2_0 + TestAlone_3_2_1 + TestAlone_3_2_2 + TestAlone_3_2_4 + TestAlone_3_2_5 + TestAlone_3_2_6 + TestAlone_1_4_3 + TestAlone_1_4_2 + TestAlone_0_4_1 + TestAlone_0_4_2 + TestAlone_0_4_3 + TestAlone_0_4_4 + TestAlone_0_4_5 + TestAlone_0_4_6 + TestAlone_6_1_0 + TestAlone_6_1_1 + TestAlone_6_1_2 + TestAlone_6_1_3 + TestAlone_6_1_4 + TestAlone_6_1_5 + TestAlone_3_3_0 + TestAlone_3_3_1 + TestAlone_3_3_2 + TestAlone_3_3_4 + TestAlone_3_3_5 + TestAlone_3_3_6 + TestAlone_1_4_0 + TestAlone_0_5_1 + TestAlone_0_5_2 + TestAlone_0_5_3 + TestAlone_0_5_4 + TestAlone_0_5_5 + TestAlone_0_5_6 + TestAlone_6_2_0 + TestAlone_6_2_1 + TestAlone_6_2_2 + TestAlone_6_2_3 + TestAlone_6_2_4 + TestAlone_6_2_5 + TestAlone_3_4_0 + TestAlone_3_4_1 + TestAlone_3_4_2 + TestAlone_3_4_4 + TestAlone_3_4_5 + TestAlone_3_4_6 + TestAlone_1_0_0 + TestAlone_1_0_2 + TestAlone_1_0_3 + TestAlone_1_0_4 + TestAlone_1_0_5 + TestAlone_1_0_6 + TestAlone_6_3_0 + TestAlone_6_3_1 + TestAlone_6_3_2 + TestAlone_6_3_3 + TestAlone_6_3_4 + TestAlone_6_3_5 + TestAlone_3_5_0 + TestAlone_3_5_1 + TestAlone_3_5_2 + TestAlone_3_5_4 + TestAlone_3_5_5 + TestAlone_3_5_6 + TestAlone_1_1_0 + TestAlone_1_1_2 + TestAlone_1_1_3 + TestAlone_1_1_4 + TestAlone_1_1_5 + TestAlone_1_1_6 + TestAlone_6_4_0 + TestAlone_6_4_1 + TestAlone_6_4_2 + TestAlone_6_4_3 + TestAlone_6_4_4 + TestAlone_6_4_5 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_0_2 + TestAlone_4_0_3 + TestAlone_4_0_5 + TestAlone_4_0_6 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_2_3 + TestAlone_1_2_4 + TestAlone_1_2_5 + TestAlone_1_2_6 + TestAlone_6_5_0 + TestAlone_6_5_1 + TestAlone_6_5_2 + TestAlone_6_5_3 + TestAlone_6_5_4 + TestAlone_6_5_5 + TestAlone_4_1_0 + TestAlone_4_1_1 + TestAlone_4_1_2 + TestAlone_4_1_3 + TestAlone_4_1_5 + TestAlone_4_1_6 + TestAlone_1_3_0 + TestAlone_1_3_2 + TestAlone_1_3_3 + TestAlone_1_3_4 + TestAlone_1_3_5 + TestAlone_1_3_6 + TestAlone_4_2_0 + TestAlone_4_2_1 + TestAlone_4_2_2 + TestAlone_4_2_3 + TestAlone_4_2_5 + TestAlone_4_2_6 + TestAlone_1_4_6))))) : A (G (((IsEndLoop_0_0_0 + IsEndLoop_0_0_1 + IsEndLoop_0_0_2 + IsEndLoop_0_0_3 + IsEndLoop_0_0_4 + IsEndLoop_0_0_5 + IsEndLoop_0_0_6 + IsEndLoop_5_3_0 + IsEndLoop_5_3_1 + IsEndLoop_5_3_2 + IsEndLoop_5_3_3 + IsEndLoop_5_3_4 + IsEndLoop_5_3_5 + IsEndLoop_5_3_6 + IsEndLoop_2_5_0 + IsEndLoop_2_5_1 + IsEndLoop_2_5_2 + IsEndLoop_2_5_3 + IsEndLoop_2_5_4 + IsEndLoop_2_5_5 + IsEndLoop_2_5_6 + IsEndLoop_0_1_0 + IsEndLoop_0_1_1 + IsEndLoop_0_1_2 + IsEndLoop_0_1_3 + IsEndLoop_0_1_4 + IsEndLoop_0_1_5 + IsEndLoop_0_1_6 + IsEndLoop_5_4_0 + IsEndLoop_5_4_1 + IsEndLoop_5_4_2 + IsEndLoop_5_4_3 + IsEndLoop_5_4_4 + IsEndLoop_5_4_5 + IsEndLoop_5_4_6 + IsEndLoop_3_0_0 + IsEndLoop_3_0_1 + IsEndLoop_3_0_2 + IsEndLoop_3_0_3 + IsEndLoop_3_0_4 + IsEndLoop_3_0_5 + IsEndLoop_3_0_6 + IsEndLoop_0_2_0 + IsEndLoop_0_2_1 + IsEndLoop_0_2_2 + IsEndLoop_0_2_3 + IsEndLoop_0_2_4 + IsEndLoop_0_2_5 + IsEndLoop_0_2_6 + IsEndLoop_5_5_0 + IsEndLoop_5_5_1 + IsEndLoop_5_5_2 + IsEndLoop_5_5_3 + IsEndLoop_5_5_4 + IsEndLoop_5_5_5 + IsEndLoop_5_5_6 + IsEndLoop_3_1_0 + IsEndLoop_3_1_1 + IsEndLoop_3_1_2 + IsEndLoop_3_1_3 + IsEndLoop_3_1_4 + IsEndLoop_3_1_5 + IsEndLoop_3_1_6 + IsEndLoop_0_3_0 + IsEndLoop_0_3_1 + IsEndLoop_0_3_2 + IsEndLoop_0_3_3 + IsEndLoop_0_3_4 + IsEndLoop_0_3_5 + IsEndLoop_0_3_6 + IsEndLoop_6_0_0 + IsEndLoop_6_0_1 + IsEndLoop_6_0_2 + IsEndLoop_6_0_3 + IsEndLoop_6_0_4 + IsEndLoop_6_0_5 + IsEndLoop_6_0_6 + IsEndLoop_3_2_0 + IsEndLoop_3_2_1 + IsEndLoop_3_2_2 + IsEndLoop_3_2_3 + IsEndLoop_3_2_4 + IsEndLoop_3_2_5 + IsEndLoop_3_2_6 + IsEndLoop_0_4_0 + IsEndLoop_0_4_1 + IsEndLoop_0_4_2 + IsEndLoop_0_4_3 + IsEndLoop_0_4_4 + IsEndLoop_0_4_5 + IsEndLoop_0_4_6 + IsEndLoop_6_1_0 + IsEndLoop_6_1_1 + IsEndLoop_6_1_2 + IsEndLoop_6_1_3 + IsEndLoop_6_1_4 + IsEndLoop_6_1_5 + IsEndLoop_6_1_6 + IsEndLoop_3_3_0 + IsEndLoop_3_3_1 + IsEndLoop_3_3_2 + IsEndLoop_3_3_3 + IsEndLoop_3_3_4 + IsEndLoop_3_3_5 + IsEndLoop_3_3_6 + IsEndLoop_0_5_0 + IsEndLoop_0_5_1 + IsEndLoop_0_5_2 + IsEndLoop_0_5_3 + IsEndLoop_0_5_4 + IsEndLoop_0_5_5 + IsEndLoop_0_5_6 + IsEndLoop_6_2_0 + IsEndLoop_6_2_1 + IsEndLoop_6_2_2 + IsEndLoop_6_2_3 + IsEndLoop_6_2_4 + IsEndLoop_6_2_5 + IsEndLoop_6_2_6 + IsEndLoop_3_4_0 + IsEndLoop_3_4_1 + IsEndLoop_3_4_2 + IsEndLoop_3_4_3 + IsEndLoop_3_4_4 + IsEndLoop_3_4_5 + IsEndLoop_3_4_6 + IsEndLoop_1_0_0 + IsEndLoop_1_0_1 + IsEndLoop_1_0_2 + IsEndLoop_1_0_3 + IsEndLoop_1_0_4 + IsEndLoop_1_0_5 + IsEndLoop_1_0_6 + IsEndLoop_6_3_0 + IsEndLoop_6_3_1 + IsEndLoop_6_3_2 + IsEndLoop_6_3_3 + IsEndLoop_6_3_4 + IsEndLoop_6_3_5 + IsEndLoop_6_3_6 + IsEndLoop_3_5_0 + IsEndLoop_3_5_1 + IsEndLoop_3_5_2 + IsEndLoop_3_5_3 + IsEndLoop_3_5_4 + IsEndLoop_3_5_5 + IsEndLoop_3_5_6 + IsEndLoop_1_1_0 + IsEndLoop_1_1_1 + IsEndLoop_1_1_2 + IsEndLoop_1_1_3 + IsEndLoop_1_1_4 + IsEndLoop_1_1_5 + IsEndLoop_1_1_6 + IsEndLoop_6_4_0 + IsEndLoop_6_4_1 + IsEndLoop_6_4_2 + IsEndLoop_6_4_3 + IsEndLoop_6_4_4 + IsEndLoop_6_4_5 + IsEndLoop_6_4_6 + IsEndLoop_4_0_0 + IsEndLoop_4_0_1 + IsEndLoop_4_0_2 + IsEndLoop_4_0_3 + IsEndLoop_4_0_4 + IsEndLoop_4_0_5 + IsEndLoop_4_0_6 + IsEndLoop_1_2_0 + IsEndLoop_1_2_1 + IsEndLoop_1_2_2 + IsEndLoop_1_2_3 + IsEndLoop_1_2_4 + IsEndLoop_1_2_5 + IsEndLoop_1_2_6 + IsEndLoop_6_5_0 + IsEndLoop_6_5_1 + IsEndLoop_6_5_2 + IsEndLoop_6_5_3 + IsEndLoop_6_5_4 + IsEndLoop_6_5_5 + IsEndLoop_6_5_6 + IsEndLoop_4_1_0 + IsEndLoop_4_1_1 + IsEndLoop_4_1_2 + IsEndLoop_4_1_3 + IsEndLoop_4_1_4 + IsEndLoop_4_1_5 + IsEndLoop_4_1_6 + IsEndLoop_1_3_0 + IsEndLoop_1_3_1 + IsEndLoop_1_3_2 + IsEndLoop_1_3_3 + IsEndLoop_1_3_4 + IsEndLoop_1_3_5 + IsEndLoop_1_3_6 + IsEndLoop_4_2_0 + IsEndLoop_4_2_1 + IsEndLoop_4_2_2 + IsEndLoop_4_2_3 + IsEndLoop_4_2_4 + IsEndLoop_4_2_5 + IsEndLoop_4_2_6 + IsEndLoop_1_4_0 + IsEndLoop_1_4_1 + IsEndLoop_1_4_2 + IsEndLoop_1_4_3 + IsEndLoop_1_4_4 + IsEndLoop_1_4_5 + IsEndLoop_1_4_6 + IsEndLoop_4_3_0 + IsEndLoop_4_3_1 + IsEndLoop_4_3_2 + IsEndLoop_4_3_3 + IsEndLoop_4_3_4 + IsEndLoop_4_3_5 + IsEndLoop_4_3_6 + IsEndLoop_1_5_0 + IsEndLoop_1_5_1 + IsEndLoop_1_5_2 + IsEndLoop_1_5_3 + IsEndLoop_1_5_4 + IsEndLoop_1_5_5 + IsEndLoop_1_5_6 + IsEndLoop_4_4_0 + IsEndLoop_4_4_1 + IsEndLoop_4_4_2 + IsEndLoop_4_4_3 + IsEndLoop_4_4_4 + IsEndLoop_4_4_5 + IsEndLoop_4_4_6 + IsEndLoop_2_0_0 + IsEndLoop_2_0_1 + IsEndLoop_2_0_2 + IsEndLoop_2_0_3 + IsEndLoop_2_0_4 + IsEndLoop_2_0_5 + IsEndLoop_2_0_6 + IsEndLoop_4_5_0 + IsEndLoop_4_5_1 + IsEndLoop_4_5_2 + IsEndLoop_4_5_3 + IsEndLoop_4_5_4 + IsEndLoop_4_5_5 + IsEndLoop_4_5_6 + IsEndLoop_2_1_0 + IsEndLoop_2_1_1 + IsEndLoop_2_1_2 + IsEndLoop_2_1_3 + IsEndLoop_2_1_4 + IsEndLoop_2_1_5 + IsEndLoop_2_1_6 + IsEndLoop_5_0_0 + IsEndLoop_5_0_1 + IsEndLoop_5_0_2 + IsEndLoop_5_0_3 + IsEndLoop_5_0_4 + IsEndLoop_5_0_5 + IsEndLoop_5_0_6 + IsEndLoop_2_2_0 + IsEndLoop_2_2_1 + IsEndLoop_2_2_2 + IsEndLoop_2_2_3 + IsEndLoop_2_2_4 + IsEndLoop_2_2_5 + IsEndLoop_2_2_6 + IsEndLoop_5_1_0 + IsEndLoop_5_1_1 + IsEndLoop_5_1_2 + IsEndLoop_5_1_3 + IsEndLoop_5_1_4 + IsEndLoop_5_1_5 + IsEndLoop_5_1_6 + IsEndLoop_2_3_0 + IsEndLoop_2_3_1 + IsEndLoop_2_3_2 + IsEndLoop_2_3_3 + IsEndLoop_2_3_4 + IsEndLoop_2_3_5 + IsEndLoop_2_3_6 + IsEndLoop_5_2_0 + IsEndLoop_5_2_1 + IsEndLoop_5_2_2 + IsEndLoop_5_2_3 + IsEndLoop_5_2_4 + IsEndLoop_5_2_5 + IsEndLoop_2_4_0 + IsEndLoop_2_4_1 + IsEndLoop_2_4_2 + IsEndLoop_2_4_3 + IsEndLoop_2_4_4 + IsEndLoop_2_4_5 + IsEndLoop_2_4_6 + IsEndLoop_5_2_6 <= CS_0 + CS_1 + CS_2 + CS_3 + CS_4 + CS_5 + CS_6) OR (1 <= Turn_2_0 + Turn_2_1 + Turn_2_2 + Turn_2_3 + Turn_2_4 + Turn_2_5 + Turn_3_0 + Turn_3_1 + Turn_3_2 + Turn_3_3 + Turn_3_4 + Turn_3_5 + Turn_4_0 + Turn_4_1 + Turn_4_2 + Turn_4_3 + Turn_4_4 + Turn_4_5 + Turn_5_0 + Turn_5_1 + Turn_5_2 + Turn_5_3 + Turn_5_4 + Turn_5_5 + Turn_0_0 + Turn_0_1 + Turn_0_2 + Turn_0_3 + Turn_0_4 + Turn_0_5 + Turn_1_0 + Turn_1_1 + Turn_1_2 + Turn_1_3 + Turn_1_4 + Turn_1_5 + Turn_1_6 + Turn_0_6 + Turn_5_6 + Turn_4_6 + Turn_3_6 + Turn_2_6)))) : A (G ((1 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4 + Idle_5 + Idle_6))) : A (G (((1 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4 + Idle_5 + Idle_6) OR (CS_0 + CS_1 + CS_2 + CS_3 + CS_4 + CS_5 + CS_6 <= EndTurn_1_0 + EndTurn_1_1 + EndTurn_1_2 + EndTurn_1_3 + EndTurn_1_4 + EndTurn_1_5 + EndTurn_2_0 + EndTurn_2_1 + EndTurn_2_2 + EndTurn_2_3 + EndTurn_2_4 + EndTurn_2_5 + EndTurn_3_0 + EndTurn_3_1 + EndTurn_3_2 + EndTurn_3_3 + EndTurn_3_4 + EndTurn_3_5 + EndTurn_4_0 + EndTurn_4_1 + EndTurn_4_2 + EndTurn_4_3 + EndTurn_4_4 + EndTurn_4_5 + EndTurn_5_0 + EndTurn_5_1 + EndTurn_5_2 + EndTurn_5_3 + EndTurn_5_4 + EndTurn_5_5 + EndTurn_6_0 + EndTurn_6_1 + EndTurn_6_2 + EndTurn_6_3 + EndTurn_6_4 + EndTurn_6_5 + EndTurn_0_4 + EndTurn_0_3 + EndTurn_0_2 + EndTurn_0_1 + EndTurn_0_0 + EndTurn_0_5)))) : A (G ((2 <= Turn_2_0 + Turn_2_1 + Turn_2_2 + Turn_2_3 + Turn_2_4 + Turn_2_5 + Turn_3_0 + Turn_3_1 + Turn_3_2 + Turn_3_3 + Turn_3_4 + Turn_3_5 + Turn_4_0 + T
urn_4_1 + Turn_4_2 + Turn_4_3 + Turn_4_4 + Turn_4_5 + Turn_5_0 + Turn_5_1 + Turn_5_2 + Turn_5_3 + Turn_5_4 + Turn_5_5 + Turn_0_0 + Turn_0_1 + Turn_0_2 + Turn_0_3 + Turn_0_4 + Turn_0_5 + Turn_1_0 + Turn_1_1 + Turn_1_2 + Turn_1_3 + Turn_1_4 + Turn_1_5 + Turn_1_6 + Turn_0_6 + Turn_5_6 + Turn_4_6 + Turn_3_6 + Turn_2_6))) : E (F (())) : A (G ((IsEndLoop_2_5_5 <= TestIdentity_1_1_2))) : E (F ((1 <= TestIdentity_3_5_0))) : E (F ((2 <= TestIdentity_6_5_5))) : A (G ((((TestIdentity_4_3_5 + 1 <= Turn_3_5) AND ((TestIdentity_5_1_0 <= IsEndLoop_0_3_1) OR (1 <= BeginLoop_5_4_1))) OR ((TestIdentity_0_1_6 <= BeginLoop_0_4_2) AND (IsEndLoop_3_5_2 <= 1))))) : A (G (((TestIdentity_1_0_5 <= TestIdentity_1_0_4) OR (3 <= IsEndLoop_0_5_5)))) : A (G ((IsEndLoop_1_2_4 <= TestIdentity_5_5_0))) : A (G ((TestAlone_4_1_0 <= 2))) : A (G ((BeginLoop_5_2_5 <= 2)))
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 221 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((Turn_2_0 + Turn_2_1 + Turn_2_2 + Turn_2_3 + Turn_2_4 + Turn_2_5 + Turn_3_0 + Turn_3_1 + Turn_3_2 + Turn_3_3 + Turn_3_4 + Turn_3_5 + Turn_4_0 + Turn_4_1 + Turn_4_2 + Turn_4_3 + Turn_4_4 + Turn_4_5 + Turn_5_0 + Turn_5_1 + Turn_5_2 + Turn_5_3 + Turn_5_4 + Turn_5_5 + Turn_0_0 + Turn_0_1 + Turn_0_2 + Turn_0_3 + Turn_0_4 + Turn_0_5 + Turn_1_0 + Turn_1_1 + Turn_1_2 + Turn_1_3 + Turn_1_4 + Turn_1_5... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 164 bytes per marking, with 9 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 1 literals and 1 conjunctive subformulas
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is unreachable.
lola: 1 markings, 0 edges
lola: ========================================
lola: subprocess 1 will run for 236 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((((3 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4 + Idle_5 + Idle_6) OR (1 <= TestIdentity_1_0_0 + TestIdentity_1_0_1 + TestIdentity_1_0_2 + TestIdentity_1_0_3 + TestIdentity_1_0_4 + TestIdentity_1_0_5 + TestIdentity_1_0_6 + TestIdentity_3_4_5 + TestIdentity_6_3_0 + TestIdentity_6_3_1 + TestIdentity_6_3_2 + TestIdentity_6_3_3 + TestIdentity_6_3_4 + TestIdentity_6_3_5 + TestIdentity_6_3_6 +... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 164 bytes per marking, with 9 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 7 literals and 3 conjunctive subformulas
lola: state equation: write sara problem file to Peterson-PT-6-ReachabilityCardinality.sara
lola: state equation: calling and running sara
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 16 markings, 15 edges
lola: ========================================
lola: subprocess 2 will run for 252 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G (((1 <= EndTurn_1_0 + EndTurn_1_1 + EndTurn_1_2 + EndTurn_1_3 + EndTurn_1_4 + EndTurn_1_5 + EndTurn_2_0 + EndTurn_2_1 + EndTurn_2_2 + EndTurn_2_3 + EndTurn_2_4 + EndTurn_2_5 + EndTurn_3_0 + EndTurn_3_1 + EndTurn_3_2 + EndTurn_3_3 + EndTurn_3_4 + EndTurn_3_5 + EndTurn_4_0 + EndTurn_4_1 + EndTurn_4_2 + EndTurn_4_3 + EndTurn_4_4 + EndTurn_4_5 + EndTurn_5_0 + EndTurn_5_1 + EndTurn_5_2 + EndTurn_5... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 164 bytes per marking, with 9 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 8 literals and 2 conjunctive subformulas
lola: state equation: write sara problem file to Peterson-PT-6-ReachabilityCardinality-2.sara
lola: state equation: calling and running sara
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 48 markings, 47 edges
lola: ========================================
lola: subprocess 3 will run for 272 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G (((IsEndLoop_0_0_0 + IsEndLoop_0_0_1 + IsEndLoop_0_0_2 + IsEndLoop_0_0_3 + IsEndLoop_0_0_4 + IsEndLoop_0_0_5 + IsEndLoop_0_0_6 + IsEndLoop_5_3_0 + IsEndLoop_5_3_1 + IsEndLoop_5_3_2 + IsEndLoop_5_3_3 + IsEndLoop_5_3_4 + IsEndLoop_5_3_5 + IsEndLoop_5_3_6 + IsEndLoop_2_5_0 + IsEndLoop_2_5_1 + IsEndLoop_2_5_2 + IsEndLoop_2_5_3 + IsEndLoop_2_5_4 + IsEndLoop_2_5_5 + IsEndLoop_2_5_6 + IsEndLoop_0_1_... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 164 bytes per marking, with 9 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 2 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to Peterson-PT-6-ReachabilityCardinality-3.sara
lola: state equation: calling and running sara
sara: try reading problem file Peterson-PT-6-ReachabilityCardinality-3.sara.
sara: place or transition ordering is non-deterministic
lola: state equation: solution impossible
lola: SUBRESULT
lola: result: yes
lola: produced by: state equation
lola: The predicate is invariant.
lola: ========================================
lola: subprocess 4 will run for 294 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G ((1 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4 + Idle_5 + Idle_6)))
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 164 bytes per marking, with 9 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 1 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to Peterson-PT-6-ReachabilityCardinality-4.sara
lola: state equation: calling and running sara
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 8 markings, 7 edges
lola: ========================================
lola: subprocess 5 will run for 321 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G (((1 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4 + Idle_5 + Idle_6) OR (CS_0 + CS_1 + CS_2 + CS_3 + CS_4 + CS_5 + CS_6 <= EndTurn_1_0 + EndTurn_1_1 + EndTurn_1_2 + EndTurn_1_3 + EndTurn_1_4 + EndTurn_1_5 + EndTurn_2_0 + EndTurn_2_1 + EndTurn_2_2 + EndTurn_2_3 + EndTurn_2_4 + EndTurn_2_5 + EndTurn_3_0 + EndTurn_3_1 + EndTurn_3_2 + EndTurn_3_3 + EndTurn_3_4 + EndTurn_3_5 + EndTurn_4_0 + EndT... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 164 bytes per marking, with 9 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 2 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to Peterson-PT-6-ReachabilityCardinality-5.sara
lola: state equation: calling and running sara
sara: try reading problem file Peterson-PT-6-ReachabilityCardinality-5.sara.
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 77 markings, 76 edges
lola: ========================================
lola: subprocess 6 will run for 353 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G ((2 <= Turn_2_0 + Turn_2_1 + Turn_2_2 + Turn_2_3 + Turn_2_4 + Turn_2_5 + Turn_3_0 + Turn_3_1 + Turn_3_2 + Turn_3_3 + Turn_3_4 + Turn_3_5 + Turn_4_0 + Turn_4_1 + Turn_4_2 + Turn_4_3 + Turn_4_4 + Turn_4_5 + Turn_5_0 + Turn_5_1 + Turn_5_2 + Turn_5_3 + Turn_5_4 + Turn_5_5 + Turn_0_0 + Turn_0_1 + Turn_0_2 + Turn_0_3 + Turn_0_4 + Turn_0_5 + Turn_1_0 + Turn_1_1 + Turn_1_2 + Turn_1_3 + Turn_1_4 + Tur... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 164 bytes per marking, with 9 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 1 literals and 1 conjunctive subformulas
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is invariant.
lola: 1 markings, 0 edges
lola: state equation: write sara problem file to Peterson-PT-6-ReachabilityCardinality-6.sara
lola: ========================================
lola: subprocess 7 will run for 393 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F (()))
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FALSE
lola: processed formula length: 5
lola: 3 rewrites
lola: formula mentions 0 of 1330 places; total mentions: 0
lola: closed formula file Peterson-PT-6-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
lola: subprocess 8 will run for 442 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G ((IsEndLoop_2_5_5 <= TestIdentity_1_1_2)))
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 164 bytes per marking, with 9 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 1 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to Peterson-PT-6-ReachabilityCardinality-8.sara
lola: state equation: calling and running sara
sara: try reading problem file Peterson-PT-6-ReachabilityCardinality-8.sara.
sara: place or transition ordering is non-deterministic
lola: sara is running 0 secs || 61973 markings, 144635 edges, 12395 markings/sec, 0 secs
lola: sara is running 5 secs || 121629 markings, 333879 edges, 11931 markings/sec, 5 secs
lola: sara is running 10 secs || 183107 markings, 510838 edges, 12296 markings/sec, 10 secs
lola: sara is running 15 secs || 244957 markings, 710779 edges, 12370 markings/sec, 15 secs
lola: sara is running 20 secs || 306487 markings, 895969 edges, 12306 markings/sec, 20 secs
lola: sara is running 25 secs || 365293 markings, 1077520 edges, 11761 markings/sec, 25 secs
lola: sara is running 30 secs || 425506 markings, 1283728 edges, 12043 markings/sec, 30 secs
lola: sara is running 35 secs || 484261 markings, 1464134 edges, 11751 markings/sec, 35 secs
lola: sara is running 40 secs || 545057 markings, 1684134 edges, 12159 markings/sec, 40 secs
lola: sara is running 45 secs || 607047 markings, 1895781 edges, 12398 markings/sec, 45 secs
lola: sara is running 50 secs || 666650 markings, 2179221 edges, 11921 markings/sec, 50 secs
lola: sara is running 55 secs || 721636 markings, 2506766 edges, 10997 markings/sec, 55 secs
lola: sara is running 60 secs || 776202 markings, 2815907 edges, 10913 markings/sec, 60 secs
lola: sara is running 65 secs || 830297 markings, 3110401 edges, 10819 markings/sec, 65 secs
lola: sara is running 70 secs || 884558 markings, 3430888 edges, 10852 markings/sec, 70 secs
lola: sara is running 75 secs || 939868 markings, 3732794 edges, 11062 markings/sec, 75 secs
lola: sara is running 80 secs || 995145 markings, 4044277 edges, 11055 markings/sec, 80 secs
lola: sara is running 85 secs || 1049005 markings, 4361042 edges, 10772 markings/sec, 85 secs
lola: sara is running 90 secs || 1106627 markings, 4675824 edges, 11524 markings/sec, 90 secs
lola: sara is running 95 secs || 1160220 markings, 4983393 edges, 10719 markings/sec, 95 secs
lola: sara is running 100 secs || 1215154 markings, 5303735 edges, 10987 markings/sec, 100 secs
lola: sara is running 105 secs || 1268636 markings, 5602624 edges, 10696 markings/sec, 105 secs
lola: sara is running 110 secs || 1319533 markings, 5900148 edges, 10179 markings/sec, 110 secs
lola: sara is running 115 secs || 1376706 markings, 6217665 edges, 11435 markings/sec, 115 secs
lola: sara is running 120 secs || 1431663 markings, 6529818 edges, 10991 markings/sec, 120 secs
lola: sara is running 125 secs || 1486447 markings, 6847624 edges, 10957 markings/sec, 125 secs
lola: sara is running 130 secs || 1538817 markings, 7177958 edges, 10474 markings/sec, 130 secs
lola: sara is running 135 secs || 1592986 markings, 7478185 edges, 10834 markings/sec, 135 secs
lola: sara is running 140 secs || 1644334 markings, 7815301 edges, 10270 markings/sec, 140 secs
lola: sara is running 145 secs || 1698858 markings, 8121131 edges, 10905 markings/sec, 145 secs
lola: sara is running 150 secs || 1751216 markings, 8418301 edges, 10472 markings/sec, 150 secs
lola: sara is running 155 secs || 1804766 markings, 8736653 edges, 10710 markings/sec, 155 secs
lola: sara is running 160 secs || 1860407 markings, 9039546 edges, 11128 markings/sec, 160 secs
lola: sara is running 165 secs || 1913493 markings, 9342989 edges, 10617 markings/sec, 165 secs
lola: sara is running 170 secs || 1967415 markings, 9647236 edges, 10784 markings/sec, 170 secs
lola: sara is running 175 secs || 2019524 markings, 9955115 edges, 10422 markings/sec, 175 secs
lola: sara is running 180 secs || 2072013 markings, 10261324 edges, 10498 markings/sec, 180 secs
lola: sara is running 185 secs || 2125082 markings, 10569116 edges, 10614 markings/sec, 185 secs
lola: sara is running 190 secs || 2180105 markings, 10873906 edges, 11005 markings/sec, 190 secs
lola: sara is running 195 secs || 2233640 markings, 11174474 edges, 10707 markings/sec, 195 secs
lola: sara is running 200 secs || 2286101 markings, 11486974 edges, 10492 markings/sec, 200 secs
lola: sara is running 205 secs || 2338576 markings, 11804488 edges, 10495 markings/sec, 205 secs
lola: sara is running 210 secs || 2388378 markings, 12124288 edges, 9960 markings/sec, 210 secs
lola: sara is running 215 secs || 2439644 markings, 12439818 edges, 10253 markings/sec, 215 secs
lola: sara is running 220 secs || 2492591 markings, 12738339 edges, 10589 markings/sec, 220 secs
lola: sara is running 225 secs || 2543170 markings, 13037928 edges, 10116 markings/sec, 225 secs
lola: sara is running 230 secs || 2596178 markings, 13370724 edges, 10602 markings/sec, 230 secs
lola: sara is running 235 secs || 2648260 markings, 13689947 edges, 10416 markings/sec, 235 secs
lola: sara is running 240 secs || 2700929 markings, 13991809 edges, 10534 markings/sec, 240 secs
lola: sara is running 245 secs || 2753971 markings, 14301979 edges, 10608 markings/sec, 245 secs
lola: sara is running 250 secs || 2808308 markings, 14611133 edges, 10867 markings/sec, 250 secs
lola: sara is running 255 secs || 2865056 markings, 14916916 edges, 11350 markings/sec, 255 secs
lola: sara is running 260 secs || 2920662 markings, 15218969 edges, 11121 markings/sec, 260 secs
lola: sara is running 265 secs || 2977200 markings, 15524709 edges, 11308 markings/sec, 265 secs
lola: sara is running 270 secs || 3034120 markings, 15827374 edges, 11384 markings/sec, 270 secs
lola: sara is running 275 secs || 3090316 markings, 16132343 edges, 11239 markings/sec, 275 secs
lola: sara is running 280 secs || 3147926 markings, 16445657 edges, 11522 markings/sec, 280 secs
lola: sara is running 285 secs || 3206221 markings, 16758847 edges, 11659 markings/sec, 285 secs
lola: sara is running 290 secs || 3263122 markings, 17063231 edges, 11380 markings/sec, 290 secs
lola: sara is running 295 secs || 3319072 markings, 17372217 edges, 11190 markings/sec, 295 secs
lola: sara is running 300 secs || 3373955 markings, 17695938 edges, 10977 markings/sec, 300 secs
lola: sara is running 305 secs || 3429106 markings, 17995992 edges, 11030 markings/sec, 305 secs
lola: sara is running 310 secs || 3484379 markings, 18291366 edges, 11055 markings/sec, 310 secs
lola: sara is running 315 secs || 3540995 markings, 18575063 edges, 11323 markings/sec, 315 secs
lola: sara is running 320 secs || 3595170 markings, 18888749 edges, 10835 markings/sec, 320 secs
lola: sara is running 325 secs || 3652136 markings, 19215240 edges, 11393 markings/sec, 325 secs
lola: sara is running 330 secs || 3709761 markings, 19547899 edges, 11525 markings/sec, 330 secs
lola: sara is running 335 secs || 3765212 markings, 19867553 edges, 11090 markings/sec, 335 secs
lola: sara is running 340 secs || 3819418 markings, 20179644 edges, 10841 markings/sec, 340 secs
lola: sara is running 345 secs || 3874844 markings, 20471654 edges, 11085 markings/sec, 345 secs
lola: sara is running 350 secs || 3929637 markings, 20813802 edges, 10959 markings/sec, 350 secs
lola: sara is running 355 secs || 3982161 markings, 21135604 edges, 10505 markings/sec, 355 secs
lola: sara is running 360 secs || 4036129 markings, 21441207 edges, 10794 markings/sec, 360 secs
lola: sara is running 365 secs || 4088929 markings, 21743824 edges, 10560 markings/sec, 365 secs
lola: sara is running 370 secs || 4142520 markings, 22049738 edges, 10718 markings/sec, 370 secs
lola: sara is running 375 secs || 4196914 markings, 22360339 edges, 10879 markings/sec, 375 secs
lola: sara is running 380 secs || 4253713 markings, 22686011 edges, 11360 markings/sec, 380 secs
lola: sara is running 385 secs || 4308630 markings, 22993167 edges, 10983 markings/sec, 385 secs
lola: sara is running 390 secs || 4363184 markings, 23311795 edges, 10911 markings/sec, 390 secs
lola: sara is running 395 secs || 4417116 markings, 23606485 edges, 10786 markings/sec, 395 secs
lola: sara is running 400 secs || 4470044 markings, 23912727 edges, 10586 markings/sec, 400 secs
lola: sara is running 405 secs || 4524233 markings, 24204977 edges, 10838 markings/sec, 405 secs
lola: sara is running 410 secs || 4578260 markings, 24521211 edges, 10805 markings/sec, 410 secs
lola: sara is running 415 secs || 4634217 markings, 24833388 edges, 11191 markings/sec, 415 secs
lola: sara is running 420 secs || 4687211 markings, 25138742 edges, 10599 markings/sec, 420 secs
lola: sara is running 425 secs || 4739204 markings, 25465284 edges, 10399 markings/sec, 425 secs
lola: sara is running 430 secs || 4791881 markings, 25784281 edges, 10535 markings/sec, 430 secs
lola: sara is running 435 secs || 4844055 markings, 26110733 edges, 10435 markings/sec, 435 secs
lola: local time limit reached - aborting
lola: Child process aborted or communication problem between parent and child process
lola: subprocess 9 will run for 442 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((1 <= TestIdentity_3_5_0)))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 164 bytes per marking, with 9 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 1 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to Peterson-PT-6-ReachabilityCardinality-9.sara
lola: state equation: calling and running sara
sara: try reading problem file Peterson-PT-6-ReachabilityCardinality-9.sara.
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 177 markings, 176 edges
lola: ========================================
lola: subprocess 10 will run for 516 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((2 <= TestIdentity_6_5_5)))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 164 bytes per marking, with 9 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 1 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to Peterson-PT-6-ReachabilityCardinality-10.sara
lola: state equation: calling and running sara
sara: try reading problem file Peterson-PT-6-ReachabilityCardinality-10.sara.
sara: place or transition ordering is non-deterministic
lola: state equation: solution impossible
lola: SUBRESULT
lola: result: no
lola: produced by: state equation
lola: The predicate is unreachable.
lola: ========================================
lola: subprocess 11 will run for 619 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G ((((TestIdentity_4_3_5 + 1 <= Turn_3_5) AND ((TestIdentity_5_1_0 <= IsEndLoop_0_3_1) OR (1 <= BeginLoop_5_4_1))) OR ((TestIdentity_0_1_6 <= BeginLoop_0_4_2) AND (IsEndLoop_3_5_2 <= 1)))))
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 164 bytes per marking, with 9 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 10 literals and 4 conjunctive subformulas
lola: state equation: write sara problem file to Peterson-PT-6-ReachabilityCardinality-11.sara
lola: state equation: calling and running sara
sara: try reading problem file Peterson-PT-6-ReachabilityCardinality-11.sara.
sara: place or transition ordering is non-deterministic
lola: sara is running 0 secs || 65561 markings, 149229 edges, 13112 markings/sec, 0 secs
lola: sara is running 5 secs || 128773 markings, 321788 edges, 12642 markings/sec, 5 secs
lola: sara is running 10 secs || 190279 markings, 532188 edges, 12301 markings/sec, 10 secs
lola: sara is running 15 secs || 252267 markings, 711988 edges, 12398 markings/sec, 15 secs
lola: sara is running 20 secs || 314499 markings, 895933 edges, 12446 markings/sec, 20 secs
lola: sara is running 25 secs || 374024 markings, 1127040 edges, 11905 markings/sec, 25 secs
lola: sara is running 30 secs || 433807 markings, 1378844 edges, 11957 markings/sec, 30 secs
lola: sara is running 35 secs || 492171 markings, 1638128 edges, 11673 markings/sec, 35 secs
lola: sara is running 40 secs || 548543 markings, 1919194 edges, 11274 markings/sec, 40 secs
lola: sara is running 45 secs || 604696 markings, 2219511 edges, 11231 markings/sec, 45 secs
lola: sara is running 50 secs || 659948 markings, 2554979 edges, 11050 markings/sec, 50 secs
lola: sara is running 55 secs || 717017 markings, 2861788 edges, 11414 markings/sec, 55 secs
lola: sara is running 60 secs || 772790 markings, 3175926 edges, 11155 markings/sec, 60 secs
lola: sara is running 65 secs || 827529 markings, 3505187 edges, 10948 markings/sec, 65 secs
lola: sara is running 70 secs || 883013 markings, 3824403 edges, 11097 markings/sec, 70 secs
lola: sara is running 75 secs || 937980 markings, 4143631 edges, 10993 markings/sec, 75 secs
lola: sara is running 80 secs || 991526 markings, 4485586 edges, 10709 markings/sec, 80 secs
lola: sara is running 85 secs || 1044753 markings, 4818494 edges, 10645 markings/sec, 85 secs
lola: sara is running 90 secs || 1101303 markings, 5137032 edges, 11310 markings/sec, 90 secs
lola: sara is running 95 secs || 1158030 markings, 5457325 edges, 11345 markings/sec, 95 secs
lola: sara is running 100 secs || 1212798 markings, 5759733 edges, 10954 markings/sec, 100 secs
lola: sara is running 105 secs || 1268670 markings, 6069367 edges, 11174 markings/sec, 105 secs
lola: sara is running 110 secs || 1323148 markings, 6374947 edges, 10896 markings/sec, 110 secs
lola: sara is running 115 secs || 1379881 markings, 6687322 edges, 11347 markings/sec, 115 secs
lola: sara is running 120 secs || 1437346 markings, 6992863 edges, 11493 markings/sec, 120 secs
lola: sara is running 125 secs || 1492818 markings, 7306901 edges, 11094 markings/sec, 125 secs
lola: sara is running 130 secs || 1546888 markings, 7617975 edges, 10814 markings/sec, 130 secs
lola: sara is running 135 secs || 1601044 markings, 7917475 edges, 10831 markings/sec, 135 secs
lola: sara is running 140 secs || 1654597 markings, 8244954 edges, 10711 markings/sec, 140 secs
lola: sara is running 145 secs || 1708248 markings, 8544057 edges, 10730 markings/sec, 145 secs
lola: sara is running 150 secs || 1762605 markings, 8844742 edges, 10871 markings/sec, 150 secs
lola: sara is running 155 secs || 1816481 markings, 9152466 edges, 10775 markings/sec, 155 secs
lola: sara is running 160 secs || 1871935 markings, 9501532 edges, 11091 markings/sec, 160 secs
lola: sara is running 165 secs || 1926643 markings, 9801864 edges, 10942 markings/sec, 165 secs
lola: sara is running 170 secs || 1979464 markings, 10114886 edges, 10564 markings/sec, 170 secs
lola: sara is running 175 secs || 2032272 markings, 10410476 edges, 10562 markings/sec, 175 secs
lola: sara is running 180 secs || 2085268 markings, 10737794 edges, 10599 markings/sec, 180 secs
lola: sara is running 185 secs || 2138584 markings, 11047246 edges, 10663 markings/sec, 185 secs
lola: sara is running 190 secs || 2192377 markings, 11357370 edges, 10759 markings/sec, 190 secs
lola: sara is running 195 secs || 2248732 markings, 11683350 edges, 11271 markings/sec, 195 secs
lola: sara is running 200 secs || 2305457 markings, 11999487 edges, 11345 markings/sec, 200 secs
lola: sara is running 205 secs || 2361496 markings, 12323163 edges, 11208 markings/sec, 205 secs
lola: sara is running 210 secs || 2415140 markings, 12615130 edges, 10729 markings/sec, 210 secs
lola: sara is running 215 secs || 2467368 markings, 12937444 edges, 10446 markings/sec, 215 secs
lola: sara is running 220 secs || 2521324 markings, 13254130 edges, 10791 markings/sec, 220 secs
lola: sara is running 225 secs || 2576335 markings, 13565171 edges, 11002 markings/sec, 225 secs
lola: sara is running 230 secs || 2631201 markings, 13864723 edges, 10973 markings/sec, 230 secs
lola: sara is running 235 secs || 2686359 markings, 14161882 edges, 11032 markings/sec, 235 secs
lola: sara is running 240 secs || 2740498 markings, 14474271 edges, 10828 markings/sec, 240 secs
lola: sara is running 245 secs || 2795650 markings, 14778805 edges, 11030 markings/sec, 245 secs
lola: sara is running 250 secs || 2849806 markings, 15089515 edges, 10831 markings/sec, 250 secs
lola: sara is running 255 secs || 2903166 markings, 15406434 edges, 10672 markings/sec, 255 secs
lola: sara is running 260 secs || 2957658 markings, 15700147 edges, 10898 markings/sec, 260 secs
lola: sara is running 265 secs || 3012094 markings, 16013180 edges, 10887 markings/sec, 265 secs
lola: sara is running 270 secs || 3066844 markings, 16317516 edges, 10950 markings/sec, 270 secs
lola: sara is running 275 secs || 3120140 markings, 16639514 edges, 10659 markings/sec, 275 secs
lola: sara is running 280 secs || 3172984 markings, 16947421 edges, 10569 markings/sec, 280 secs
lola: sara is running 285 secs || 3227941 markings, 17254390 edges, 10991 markings/sec, 285 secs
lola: sara is running 290 secs || 3280953 markings, 17566056 edges, 10602 markings/sec, 290 secs
lola: sara is running 295 secs || 3333992 markings, 17864900 edges, 10608 markings/sec, 295 secs
lola: sara is running 300 secs || 3387845 markings, 18172400 edges, 10771 markings/sec, 300 secs
lola: sara is running 305 secs || 3442065 markings, 18475866 edges, 10844 markings/sec, 305 secs
lola: sara is running 310 secs || 3495190 markings, 18774347 edges, 10625 markings/sec, 310 secs
lola: sara is running 315 secs || 3546631 markings, 19077938 edges, 10288 markings/sec, 315 secs
lola: sara is running 320 secs || 3598246 markings, 19377547 edges, 10323 markings/sec, 320 secs
lola: sara is running 325 secs || 3649226 markings, 19671687 edges, 10196 markings/sec, 325 secs
lola: sara is running 330 secs || 3699742 markings, 19985943 edges, 10103 markings/sec, 330 secs
lola: sara is running 335 secs || 3751291 markings, 20293692 edges, 10310 markings/sec, 335 secs
lola: sara is running 340 secs || 3801786 markings, 20619156 edges, 10099 markings/sec, 340 secs
lola: sara is running 345 secs || 3853732 markings, 20942065 edges, 10389 markings/sec, 345 secs
lola: sara is running 350 secs || 3905929 markings, 21267383 edges, 10439 markings/sec, 350 secs
lola: sara is running 355 secs || 3957011 markings, 21599480 edges, 10216 markings/sec, 355 secs
sara: warning, failure of lp_solve (at job 26014)
lola: sara is running 360 secs || 4008633 markings, 21931568 edges, 10324 markings/sec, 360 secs
lola: sara is running 365 secs || 4061493 markings, 22239421 edges, 10572 markings/sec, 365 secs
lola: sara is running 370 secs || 4115354 markings, 22548136 edges, 10772 markings/sec, 370 secs
lola: sara is running 375 secs || 4167562 markings, 22864363 edges, 10442 markings/sec, 375 secs
lola: sara is running 380 secs || 4219322 markings, 23165583 edges, 10352 markings/sec, 380 secs
lola: sara is running 385 secs || 4271544 markings, 23465620 edges, 10444 markings/sec, 385 secs
lola: sara is running 390 secs || 4324694 markings, 23766183 edges, 10630 markings/sec, 390 secs
lola: sara is running 395 secs || 4378723 markings, 24078344 edges, 10806 markings/sec, 395 secs
lola: sara is running 400 secs || 4431458 markings, 24400174 edges, 10547 markings/sec, 400 secs
lola: sara is running 405 secs || 4485568 markings, 24711086 edges, 10822 markings/sec, 405 secs
lola: sara is running 410 secs || 4540723 markings, 25029631 edges, 11031 markings/sec, 410 secs
lola: sara is running 415 secs || 4595966 markings, 25338847 edges, 11049 markings/sec, 415 secs
lola: sara is running 420 secs || 4649916 markings, 25656284 edges, 10790 markings/sec, 420 secs
lola: sara is running 425 secs || 4702874 markings, 25976028 edges, 10592 markings/sec, 425 secs
lola: sara is running 430 secs || 4756534 markings, 26285061 edges, 10732 markings/sec, 430 secs
lola: sara is running 435 secs || 4813185 markings, 26604815 edges, 11330 markings/sec, 435 secs
lola: sara is running 440 secs || 4871738 markings, 26905392 edges, 11711 markings/sec, 440 secs
lola: sara is running 445 secs || 4923678 markings, 27240501 edges, 10388 markings/sec, 445 secs
lola: sara is running 450 secs || 4976132 markings, 27551150 edges, 10491 markings/sec, 450 secs
lola: sara is running 455 secs || 5028801 markings, 27869421 edges, 10534 markings/sec, 455 secs
lola: sara is running 460 secs || 5080659 markings, 28186909 edges, 10372 markings/sec, 460 secs
lola: sara is running 465 secs || 5134050 markings, 28518006 edges, 10678 markings/sec, 465 secs
lola: sara is running 470 secs || 5188173 markings, 28871705 edges, 10825 markings/sec, 470 secs
lola: sara is running 475 secs || 5241744 markings, 29212281 edges, 10714 markings/sec, 475 secs
lola: sara is running 480 secs || 5294673 markings, 29541217 edges, 10586 markings/sec, 480 secs
lola: sara is running 485 secs || 5349561 markings, 29834039 edges, 10978 markings/sec, 485 secs
lola: sara is running 490 secs || 5403613 markings, 30094364 edges, 10810 markings/sec, 490 secs
lola: sara is running 495 secs || 5460704 markings, 30329943 edges, 11418 markings/sec, 495 secs
lola: sara is running 500 secs || 5517861 markings, 30559360 edges, 11431 markings/sec, 500 secs
lola: sara is running 505 secs || 5575149 markings, 30794959 edges, 11458 markings/sec, 505 secs
lola: sara is running 510 secs || 5631346 markings, 31035961 edges, 11239 markings/sec, 510 secs
lola: sara is running 515 secs || 5686415 markings, 31304275 edges, 11014 markings/sec, 515 secs
lola: sara is running 520 secs || 5735519 markings, 31651882 edges, 9821 markings/sec, 520 secs
lola: sara is running 525 secs || 5748703 markings, 32622937 edges, 2637 markings/sec, 525 secs
lola: sara is running 530 secs || 5803040 markings, 32952426 edges, 10867 markings/sec, 530 secs
lola: sara is running 535 secs || 5858261 markings, 33287343 edges, 11044 markings/sec, 535 secs
lola: sara is running 540 secs || 5912383 markings, 33624917 edges, 10824 markings/sec, 540 secs
lola: sara is running 545 secs || 5966240 markings, 33954034 edges, 10771 markings/sec, 545 secs
lola: sara is running 550 secs || 6020200 markings, 34284656 edges, 10792 markings/sec, 550 secs
lola: sara is running 555 secs || 6074861 markings, 34605368 edges, 10932 markings/sec, 555 secs
lola: sara is running 560 secs || 6128870 markings, 34928775 edges, 10802 markings/sec, 560 secs
lola: sara is running 565 secs || 6183001 markings, 35255031 edges, 10826 markings/sec, 565 secs
lola: sara is running 570 secs || 6236190 markings, 35580973 edges, 10638 markings/sec, 570 secs
lola: sara is running 575 secs || 6289624 markings, 35902725 edges, 10687 markings/sec, 575 secs
lola: sara is running 580 secs || 6342862 markings, 36215912 edges, 10648 markings/sec, 580 secs
lola: sara is running 585 secs || 6393938 markings, 36520447 edges, 10215 markings/sec, 585 secs
lola: sara is running 590 secs || 6445171 markings, 36830633 edges, 10247 markings/sec, 590 secs
lola: sara is running 595 secs || 6497689 markings, 37149963 edges, 10504 markings/sec, 595 secs
lola: sara is running 600 secs || 6550403 markings, 37465420 edges, 10543 markings/sec, 600 secs
lola: sara is running 605 secs || 6602752 markings, 37780144 edges, 10470 markings/sec, 605 secs
lola: sara is running 610 secs || 6654829 markings, 38096581 edges, 10415 markings/sec, 610 secs
lola: local time limit reached - aborting
lola: Child process aborted or communication problem between parent and child process
terminate called after throwing an instance of 'std::runtime_error'
what(): parse error at position 0: unexpected character, last read: '\ufffd'
Aborted (core dumped)
FORMULA Peterson-PT-6-ReachabilityCardinality-0 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-1 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-2 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-3 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-4 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-5 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-6 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-7 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-8 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-9 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-10 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-11 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-12 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-13 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-14 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-6-ReachabilityCardinality-15 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
----- Kill lola and sara stdout -----
----- Kill lola and sara stderr -----
----- Finished stdout -----
----- Finished stderr -----
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-6"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="irma4mcc-full"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-6.tgz
mv Peterson-PT-6 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-full"
echo " Input is Peterson-PT-6, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r114-csrt-152666472900586"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;