Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 892K
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 80K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 10K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 37K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 26K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 96K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 481K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool lola
Input is PermAdmissibility-PT-02, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r112-csrt-152666469600483
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-00
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-01
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-02
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-03
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-04
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-05
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-06
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-07
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-08
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-09
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-10
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-11
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-12
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-13
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-14
FORMULA_NAME PermAdmissibility-PT-02-ReachabilityFireability-15

=== Now, execution of the tool begins

BK_START 1527037585602

info: Time: 3600 - MCC
===========================================================================================
prep: translating PermAdmissibility-PT-02 Petri net model.pnml into LoLA format
===========================================================================================
prep: translating PT Petri net complete
prep: check for too many tokens
===========================================================================================
prep: translating PermAdmissibility-PT-02 formula ReachabilityFireability into LoLA format
===========================================================================================
prep: translating PT formula complete
vrfy: Checking ReachabilityFireability @ PermAdmissibility-PT-02 @ 3570 seconds
lola: LoLA will run for 3570 seconds at most (--timelimit)
lola: NET
lola: reading net from model.pnml.lola
lola: finished parsing
lola: closed net file model.pnml.lola
lola: 760/65536 symbol table entries, 0 collisions
lola: preprocessing...
lola: Size of bit vector: 5376
lola: finding significant places
lola: 168 places, 592 transitions, 136 significant places
lola: computing forward-conflicting sets
lola: computing back-conflicting sets
lola: 820 transition conflict sets
lola: TASK
lola: reading formula from PermAdmissibility-PT-02-ReachabilityFireability.task
lola: E (F ((NOT FIREABLE(switch9_1_0) AND NOT FIREABLE(switch9_2_0) AND NOT FIREABLE(switch9_3_0) AND NOT FIREABLE(switch9_4_0) AND NOT FIREABLE(switch9_0_0) AND NOT FIREABLE(switch9_3_5) AND NOT FIREABLE(switch9_4_5) AND NOT FIREABLE(switch9_1_5) AND NOT FIREABLE(switch9_2_5) AND NOT FIREABLE(switch9_7_4) AND NOT FIREABLE(switch9_0_5) AND NOT FIREABLE(switch9_5_4) AND NOT FIREABLE(switch9_6_4) AND NOT FIREABLE(switch9_3_6) AND NOT FIREABLE(switch9_4_6) AND NOT FIREABLE(switch9_1_6) AND NOT FIREABLE(switch9_2_6) AND NOT FIREABLE(switch9_7_5) AND NOT FIREABLE(switch9_0_6) AND NOT FIREABLE(switch9_5_5) AND NOT FIREABLE(switch9_6_5) AND NOT FIREABLE(switch9_4_7) AND NOT FIREABLE(switch9_3_7) AND NOT FIREABLE(switch9_2_7) AND NOT FIREABLE(switch9_1_7) AND NOT FIREABLE(switch9_0_7) AND NOT FIREABLE(switch9_7_6) AND NOT FIREABLE(switch9_6_6) AND NOT FIREABLE(switch9_5_6) AND NOT FIREABLE(switch9_7_7) AND NOT FIREABLE(switch9_6_7) AND NOT FIREABLE(switch9_5_7) AND NOT FIREABLE(switch9_1_1) AND NOT FIREABLE(switch9_2_1) AND NOT FIREABLE(switch9_3_1) AND NOT FIREABLE(switch9_4_1) AND NOT FIREABLE(switch9_5_0) AND NOT FIREABLE(switch9_6_0) AND NOT FIREABLE(switch9_7_0) AND NOT FIREABLE(switch9_0_1) AND NOT FIREABLE(switch9_1_2) AND NOT FIREABLE(switch9_2_2) AND NOT FIREABLE(switch9_3_2) AND NOT FIREABLE(switch9_4_2) AND NOT FIREABLE(switch9_5_1) AND NOT FIREABLE(switch9_6_1) AND NOT FIREABLE(switch9_7_1) AND NOT FIREABLE(switch9_0_2) AND NOT FIREABLE(switch9_2_3) AND NOT FIREABLE(switch9_1_3) AND NOT FIREABLE(switch9_4_3) AND NOT FIREABLE(switch9_3_3) AND NOT FIREABLE(switch9_6_2) AND NOT FIREABLE(switch9_5_2) AND NOT FIREABLE(switch9_0_3) AND NOT FIREABLE(switch9_7_2) AND NOT FIREABLE(switch9_2_4) AND NOT FIREABLE(switch9_1_4) AND NOT FIREABLE(switch9_4_4) AND NOT FIREABLE(switch9_3_4) AND NOT FIREABLE(switch9_6_3) AND NOT FIREABLE(switch9_5_3) AND NOT FIREABLE(switch9_0_4) AND NOT FIREABLE(switch9_7_3) AND (FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7) OR FIREABLE(switch4_2_7) OR FIREABLE(switch4_3_6) OR FIREABLE(switch4_3_7) OR FIREABLE(switch4_2_6)) AND (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3)) AND (FIREABLE(switch3_3_6) OR FIREABLE(switch3_2_7) OR FIREABLE(switch3_3_7) OR FIREABLE(switch3_2_6) OR (NOT FIREABLE(display1_2_1) AND NOT FIREABLE(display1_1_1) AND NOT FIREABLE(display1_4_1) AND NOT FIREABLE(display1_3_1) AND NOT FIREABLE(display1_6_0) AND NOT FIREABLE(display1_5_0) AND NOT FIREABLE(display1_0_1) AND NOT FIREABLE(display1_7_0) AND NOT FIREABLE(display1_2_2) AND NOT FIREABLE(display1_1_2) AND NOT FIREABLE(display1_4_2) AND NOT FIREABLE(display1_3_2) AND NOT FIREABLE(display1_6_1) AND NOT FIREABLE(display1_5_1) AND NOT FIREABLE(display1_0_2) AND NOT FIREABLE(display1_7_1) AND NOT FIREABLE(display1_1_0) AND NOT FIREABLE(display1_2_0) AND NOT FIREABLE(display1_3_0) AND NOT FIREABLE(display1_4_0) AND NOT FIREABLE(display1_0_0) AND NOT FIREABLE(display1_7_5) AND NOT FIREABLE(display1_0_6) AND NOT FIREABLE(display1_5_5) AND NOT FIREABLE(display1_6_5) AND NOT FIREABLE(display1_3_6) AND NOT FIREABLE(display1_4_6) AND NOT FIREABLE(display1_1_6) AND NOT FIREABLE(display1_2_6) AND NOT FIREABLE(display1_7_4) AND NOT FIREABLE(display1_0_5) AND NOT FIREABLE(display1_5_4) AND NOT FIREABLE(display1_6_4) AND NOT FIREABLE(display1_3_5) AND NOT FIREABLE(display1_4_5) AND NOT FIREABLE(display1_1_5) AND NOT FIREABLE(display1_2_5) AND NOT FIREABLE(display1_0_4) AND NOT FIREABLE(display1_7_3) AND NOT FIREABLE(display1_6_3) AND NOT FIREABLE(display1_5_3) AND NOT FIREABLE(display1_4_4) AND NOT FIREABLE(display1_3_4) AND NOT FIREABLE(display1_2_4) AND NOT FIREABLE(display1_1_4) AND NOT FIREABLE(display1_0_3) AND NOT FIREABLE(display1_7_2) AND NOT FIREABLE(display1_6_2) AND NOT FIREABLE(display1_5_2) AND NOT FIREABLE(display1_4_3) AND NOT FIREABLE(display1_3_3) AND NOT FIREABLE(display1_2_3) AND NOT FIREABLE(display1_1_3) AND NOT FIREABLE(display1_6_7) AND NOT FIREABLE(display1_5_7) AND NOT FIREABLE(display1_7_7) AND NOT FIREABLE(display1_6_6) AND NOT FIREABLE(display1_5_6) AND NOT FIREABLE(display1_0_7) AND NOT FIREABLE(display1_7_6) AND NOT FIREABLE(display1_2_7) AND NOT FIREABLE(display1_1_7) AND NOT FIREABLE(display1_4_7) AND NOT FIREABLE(display1_3_7) AND NOT FIREABLE(switch6_5_7) AND NOT FIREABLE(switch6_1_7) AND NOT FIREABLE(switch6_4_7) AND NOT FIREABLE(switch6_5_6) AND NOT FIREABLE(switch6_0_7) AND NOT FIREABLE(switch6_1_6) AND NOT FIREABLE(switch6_4_6) AND NOT FIREABLE(switch6_5_3) AND NOT FIREABLE(switch6_0_6) AND NOT FIREABLE(switch6_1_3) AND NOT FIREABLE(switch6_4_3) AND NOT FIREABLE(switch6_0_3) AND NOT FIREABLE(switch6_5_2) AND NOT FIREABLE(switch6_4_2) AND NOT FIREABLE(switch6_1_2) AND NOT FIREABLE(switch6_0_2)))))) : E (F (((FIREABLE(switch9_1_0) OR FIREABLE(switch9_2_0) OR FIREABLE(switch9_3_0) OR FIREABLE(switch9_4_0) OR FIREABLE(switch9_0_0) OR FIREABLE(switch9_3_5) OR FIREABLE(switch9_4_5) OR FIREABLE(switch9_1_5) OR FIREABLE(switch9_2_5) OR FIREABLE(switch9_7_4) OR FIREABLE(switch9_0_5) OR FIREABLE(switch9_5_4) OR FIREABLE(switch9_6_4) OR FIREABLE(switch9_3_6) OR FIREABLE(switch9_4_6) OR FIREABLE(switch9_1_6) OR FIREABLE(switch9_2_6) OR FIREABLE(switch9_7_5) OR FIREABLE(switch9_0_6) OR FIREABLE(switch9_5_5) OR FIREABLE(switch9_6_5) OR FIREABLE(switch9_4_7) OR FIREABLE(switch9_3_7) OR FIREABLE(switch9_2_7) OR FIREABLE(switch9_1_7) OR FIREABLE(switch9_0_7) OR FIREABLE(switch9_7_6) OR FIREABLE(switch9_6_6) OR FIREABLE(switch9_5_6) OR FIREABLE(switch9_7_7) OR FIREABLE(switch9_6_7) OR FIREABLE(switch9_5_7) OR FIREABLE(switch9_1_1) OR FIREABLE(switch9_2_1) OR FIREABLE(switch9_3_1) OR FIREABLE(switch9_4_1) OR FIREABLE(switch9_5_0) OR FIREABLE(switch9_6_0) OR FIREABLE(switch9_7_0) OR FIREABLE(switch9_0_1) OR FIREABLE(switch9_1_2) OR FIREABLE(switch9_2_2) OR FIREABLE(switch9_3_2) OR FIREABLE(switch9_4_2) OR FIREABLE(switch9_5_1) OR FIREABLE(switch9_6_1) OR FIREABLE(switch9_7_1) OR FIREABLE(switch9_0_2) OR FIREABLE(switch9_2_3) OR FIREABLE(switch9_1_3) OR FIREABLE(switch9_4_3) OR FIREABLE(switch9_3_3) OR FIREABLE(switch9_6_2) OR FIREABLE(switch9_5_2) OR FIREABLE(switch9_0_3) OR FIREABLE(switch9_7_2) OR FIREABLE(switch9_2_4) OR FIREABLE(switch9_1_4) OR FIREABLE(switch9_4_4) OR FIREABLE(switch9_3_4) OR FIREABLE(switch9_6_3) OR FIREABLE(switch9_5_3) OR FIREABLE(switch9_0_4) OR FIREABLE(switch9_7_3)) AND (FIREABLE(switch1_1_4) OR FIREABLE(switch1_0_5) OR FIREABLE(switch1_1_5) OR FIREABLE(switch1_0_4)) AND (FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(display2_4_2) OR FIREABLE(display2_3_2) OR FIREABLE(display2_0_0) OR FIREABLE(display2_1_0) OR FIREABLE(display2_2_0) OR FIREABLE(display2_3_0) OR FIREABLE(display2_4_0) OR FIREABLE(display2_4_5) OR FIREABLE(display2_3_5) OR FIREABLE(display2_2_5) OR FIREABLE(display2_1_5) OR FIREABLE(display2_0_5) OR FIREABLE(display2_7_4) OR FIREABLE(display2_6_4) OR FIREABLE(display2_5_4) OR FIREABLE(display2_4_6) OR FIREABLE(display2_3_6) OR FIREABLE(display2_2_6) OR FIREABLE(display2_1_6) OR FIREABLE(display2_0_6) OR FIREABLE(display2_7_5) OR FIREABLE(display2_6_5) OR FIREABLE(display2_5_5) OR FIREABLE(display2_3_3) OR FIREABLE(display2_4_3) OR FIREABLE(display2_1_3) OR FIREABLE(display2_2_3) OR FIREABLE(display2_7_2) OR FIREABLE(display2_0_3) OR FIREABLE(display2_5_2) OR FIREABLE(display2_6_2) OR FIREABLE(display2_3_4) OR FIREABLE(display2_4_4) OR FIREABLE(display2_1_4) OR FIREABLE(display2_2_4) OR FIREABLE(display2_7_3) OR FIREABLE(display2_0_4) OR FIREABLE(display2_5_3) OR FIREABLE(display2_6_3) OR FIREABLE(display2_1_7) OR FIREABLE(display2_2_7) OR FIREABLE(display2_3_7) OR FIREABLE(display2_4_7) OR FIREABLE(display2_5_6) OR FIREABLE(display2_6_6) OR FIREABLE(display2_7_6) OR FIREABLE(display2_0_7) OR FIREABLE(display2_5_7) OR FIREABLE(display2_6_7) OR FIREABLE(display2_7_7)) AND (FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7) OR FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3) OR FIREABLE(switch9_1_0) OR FIREABLE(switch9_2_0) OR FIREABLE(switch9_3_0) OR FIREABLE(switch9_4_0) OR FIREABLE(switch9_0_0) OR FIREABLE(switch9_3_5) OR FIREABLE(switch9_4_5) OR FIREABLE(switch9_1_5) OR FIREABLE(switch9_2_5) OR FIREABLE(switch9_7_4) OR FIREABLE(switch9_0_5) OR FIREABLE(switch9_5_4) OR FIREABLE(switch9_6_4) OR FIREABLE(switch9_3_6) OR FIREABLE(switch9_4_6) OR FIREABLE(switch9_1_6) OR FIREABLE(switch9_2_6) OR FIREABLE(switch9_7_5) OR FIREABLE(switch9_0_6) OR FIREABLE(switch9_5_5) OR FIREABLE(switch9_6_5) OR FIREABLE(switch9_4_7) OR FIREABLE(switch9_3_7) OR FIREABLE(switch9_2_7) OR FIREABLE(switch9_1_7) OR FIREABLE(switch9_0_7) OR FIREABLE(switch9_7_6) OR FIREABLE(switch9_6_6) OR FIREABLE(switch9_5_6) OR FIREABLE(switch9_7_7) OR FIREABLE(switch9_6_7) OR FIREABLE(switch9_5_7) OR FIREABLE(switch9_1_1) OR FIREABLE(switch9_2_1) OR FIREABLE(switch9_3_1) OR FIREABLE(switch9_4_1) OR FIREABLE(switch9_5_0) OR FIREABLE(switch9_6_0) OR FIREABLE(switch9_7_0) OR FIREABLE(switch9_0_1) OR FIREABLE(switch9_1_2) OR FIREABLE(switch9_2_2) OR FIREABLE(switch9_3_2) OR FIREABLE(switch9_4_2) OR FIREABLE(switch9_5_1) OR FIREABLE(switch9_6_1) OR FIREABLE(switch9_7_1) OR FIREABLE(switch9_0_2) OR FIREABLE(switch9_2_3) OR FIREABLE(switch9_1_3) OR FIREABLE(switch9_4_3) OR FIREABLE(switch9_3_3) OR FIREABLE(switch9_6_2) OR FIREABLE(switch9_5_2) OR FIREABLE(switch9_0_3) OR FIREABLE(switch9_7_2) OR FIREABLE(switch9_2_4) OR FIREABLE(switch9_1_4) OR FIREABLE(switch9_4_4) OR FIREABLE(switch9_3_4) OR FIREABLE(switch9_6_3) OR FIREABLE(switch9_5_3) OR FIREABLE(switch9_0_4) OR FIREABLE(switch9_7_3) OR FIREABLE(switch1_1_4) OR FIREABLE(switch1_0_5) OR FIREABLE(switch1_1_5) OR FIREABLE(switch1_0_4))))) : A (G (((NOT FIREABLE(switch10_4_0) AND NOT FIREABLE(switch10_3_0) AND NOT FIREABLE(switch10_2_0) AND NOT FIREABLE(switch10_1_0) AND NOT FIREABLE(switch10_0_0) AND NOT FIREABLE(switch10_7_4) AND NOT FIREABLE(switch10_0_5) AND NOT FIREABLE(switch10_5_4) AND NOT FIREABLE(switch10_6_4) AND NOT FIREABLE(switch10_3_5) AND NOT FIREABLE(switch10_4_5) AND NOT FIREABLE(switch10_1_5) AND NOT FIREABLE(switch10_2_5) AND NOT FIREABLE(switch10_7_5) AND NOT FIREABLE(switch10_0_6) AND NOT FIREABLE(switch10_5_5) AND NOT FIREABLE(switch10_6_5) AND NOT FIREABLE(switch10_3_6) AND NOT FIREABLE(switch10_4_6) AND NOT FIREABLE(switch10_1_6) AND NOT FIREABLE(switch10_2_6) AND NOT FIREABLE(switch10_0_7) AND NOT FIREABLE(switch10_7_6) AND NOT FIREABLE(switch10_6_6) AND NOT FIREABLE(switch10_5_6) AND NOT FIREABLE(switch10_4_7) AND NOT FIREABLE(switch10_3_7) AND NOT FIREABLE(switch10_2_7) AND NOT FIREABLE(switch10_1_7) AND NOT FIREABLE(switch10_7_7) AND NOT FIREABLE(switch10_6_7) AND NOT FIREABLE(switch10_5_7) AND NOT FIREABLE(switch10_5_0) AND NOT FIREABLE(switch10_6_0) AND NOT FIREABLE(switch10_7_0) AND NOT FIREABLE(switch10_0_1) AND NOT FIREABLE(switch10_1_1) AND NOT FIREABLE(switch10_2_1) AND NOT FIREABLE(switch10_3_1) AND NOT FIREABLE(switch10_4_1) AND NOT FIREABLE(switch10_5_1) AND NOT FIREABLE(switch10_6_1) AND NOT FIREABLE(switch10_7_1) AND NOT FIREABLE(switch10_0_2) AND NOT FIREABLE(switch10_1_2) AND NOT FIREABLE(switch10_2_2) AND NOT FIREABLE(switch10_3_2) AND NOT FIREABLE(switch10_4_2) AND NOT FIREABLE(switch10_6_2) AND NOT FIREABLE(switch10_5_2) AND NOT FIREABLE(switch10_0_3) AND NOT FIREABLE(switch10_7_2) AND NOT FIREABLE(switch10_2_3) AND NOT FIREABLE(switch10_1_3) AND NOT FIREABLE(switch10_4_3) AND NOT FIREABLE(switch10_3_3) AND NOT FIREABLE(switch10_6_3) AND NOT FIREABLE(switch10_5_3) AND NOT FIREABLE(switch10_0_4) AND NOT FIREABLE(switch10_7_3) AND NOT FIREABLE(switch10_2_4) AND NOT FIREABLE(switch10_1_4) AND NOT FIREABLE(switch10_4_4) AND NOT FIREABLE(switch10_3_4)) OR (NOT FIREABLE(display1_2_1) AND NOT FIREABLE(display1_1_1) AND NOT FIREABLE(display1_4_1) AND NOT FIREABLE(display1_3_1) AND NOT FIREABLE(display1_6_0) AND NOT FIREABLE(display1_5_0) AND NOT FIREABLE(display1_0_1) AND NOT FIREABLE(display1_7_0) AND NOT FIREABLE(display1_2_2) AND NOT FIREABLE(display1_1_2) AND NOT FIREABLE(display1_4_2) AND NOT FIREABLE(display1_3_2) AND NOT FIREABLE(display1_6_1) AND NOT FIREABLE(display1_5_1) AND NOT FIREABLE(display1_0_2) AND NOT FIREABLE(display1_7_1) AND NOT FIREABLE(display1_1_0) AND NOT FIREABLE(display1_2_0) AND NOT FIREABLE(display1_3_0) AND NOT FIREABLE(display1_4_0) AND NOT FIREABLE(display1_0_0) AND NOT FIREABLE(display1_7_5) AND NOT FIREABLE(display1_0_6) AND NOT FIREABLE(display1_5_5) AND NOT FIREABLE(display1_6_5) AND NOT FIREABLE(display1_3_6) AND NOT FIREABLE(display1_4_6) AND NOT FIREABLE(display1_1_6) AND NOT FIREABLE(display1_2_6) AND NOT FIREABLE(display1_7_4) AND NOT FIREABLE(display1_0_5) AND NOT FIREABLE(display1_5_4) AND NOT FIREABLE(display1_6_4) AND NOT FIREABLE(display1_3_5) AND NOT FIREABLE(display1_4_5) AND NOT FIREABLE(display1_1_5) AND NOT FIREABLE(display1_2_5) AND NOT FIREABLE(display1_0_4) AND NOT FIREABLE(display1_7_3) AND NOT FIREABLE(display1_6_3) AND NOT FIREABLE(display1_5_3) AND NOT FIREABLE(display1_4_4) AND NOT FIREABLE(display1_3_4) AND NOT FIREABLE(display1_2_4) AND NOT FIREABLE(display1_1_4) AND NOT FIREABLE(display1_0_3) AND NOT FIREABLE(display1_7_2) AND NOT FIREABLE(display1_6_2) AND NOT FIREABLE(display1_5_2) AND NOT FIREABLE(display1_4_3) AND NOT FIREABLE(display1_3_3) AND NOT FIREABLE(display1_2_3) AND NOT FIREABLE(display1_1_3) AND NOT FIREABLE(display1_6_7) AND NOT FIREABLE(display1_5_7) AND NOT FIREABLE(display1_7_7) AND NOT FIREABLE(display1_6_6) AND NOT FIREABLE(display1_5_6) AND NOT FIREABLE(display1_0_7) AND NOT FIREABLE(display1_7_6) AND NOT FIREABLE(display1_2_7) AND NOT FIREABLE(display1_1_7) AND NOT FIREABLE(display1_4_7) AND NOT FIREABLE(display1_3_7)) OR (NOT FIREABLE(display2_6_0) AND NOT FIREABLE(display2_5_0) AND NOT FIREABLE(display2_0_1) AND NOT FIREABLE(display2_7_0) AND NOT FIREABLE(display2_2_1) AND NOT FIREABLE(display2_1_1) AND NOT FIREABLE(display2_4_1) AND NOT FIREABLE(display2_3_1) AND NOT FIREABLE(display2_6_1) AND NOT FIREABLE(display2_5_1) AND NOT FIREABLE(display2_0_2) AND NOT FIREABLE(display2_7_1) AND NOT FIREABLE(display2_2_2) AND NOT FIREABLE(display2_1_2) AND NOT FIREABLE(display2_4_2) AND NOT FIREABLE(display2_3_2) AND NOT FIREABLE(display2_0_0) AND NOT FIREABLE(display2_1_0) AND NOT FIREABLE(display2_2_0) AND NOT FIREABLE(display2_3_0) AND NOT FIREABLE(display2_4_0) AND NOT FIREABLE(display2_4_5) AND NOT FIREABLE(display2_3_5) AND NOT FIREABLE(display2_2_5) AND NOT FIREABLE(display2_1_5) AND NOT FIREABLE(display2_0_5) AND NOT FIREABLE(display2_7_4) AND NOT FIREABLE(display2_6_4) AND NOT FIREABLE(display2_5_4) AND NOT FIREABLE(display2_4_6) AND NOT FIREABLE(display2_3_6) AND NOT FIREABLE(display2_2_6) AND NOT FIREABLE(display2_1_6) AND NOT FIREABLE(display2_0_6) AND NOT FIREABLE(display2_7_5) AND NOT FIREABLE(display2_6_5) AND NOT FIREABLE(display2_5_5) AND NOT FIREABLE(display2_3_3) AND NOT FIREABLE(display2_4_3) AND NOT FIREABLE(display2_1_3) AND NOT FIREABLE(display2_2_3) AND NOT FIREABLE(display2_7_2) AND NOT FIREABLE(display2_0_3) AND NOT FIREABLE(display2_5_2) AND NOT FIREABLE(display2_6_2) AND NOT FIREABLE(display2_3_4) AND NOT FIREABLE(display2_4_4) AND NOT FIREABLE(display2_1_4) AND NOT FIREABLE(display2_2_4) AND NOT FIREABLE(display2_7_3) AND NOT FIREABLE(display2_0_4) AND NOT FIREABLE(display2_5_3) AND NOT FIREABLE(display2_6_3) AND NOT FIREABLE(display2_1_7) AND NOT FIREABLE(display2_2_7) AND NOT FIREABLE(display2_3_7) AND NOT FIREABLE(display2_4_7) AND NOT FIREABLE(display2_5_6) AND NOT FIREABLE(display2_6_6) AND NOT FIREABLE(display2_7_6) AND NOT FIREABLE(display2_0_7) AND NOT FIREABLE(display2_5_7) AND NOT FIREABLE(display2_6_7) AND NOT FIREABLE(display2_7_7) AND NOT FIREABLE(switch6_5_7) AND NOT FIREABLE(switch6_1_7) AND NOT FIREABLE(switch6_4_7) AND NOT FIREABLE(switch6_5_6) AND NOT FIREABLE(switch6_0_7) AND NOT FIREABLE(switch6_1_6) AND NOT FIREABLE(switch6_4_6) AND NOT FIREABLE(switch6_5_3) AND NOT FIREABLE(switch6_0_6) AND NOT FIREABLE(switch6_1_3) AND NOT FIREABLE(switch6_4_3) AND NOT FIREABLE(switch6_0_3) AND NOT FIREABLE(switch6_5_2) AND NOT FIREABLE(switch6_4_2) AND NOT FIREABLE(switch6_1_2) AND NOT FIREABLE(switch6_0_2) AND NOT FIREABLE(switch11_0_0) AND NOT FIREABLE(switch11_4_0) AND NOT FIREABLE(switch11_3_0) AND NOT FIREABLE(switch11_2_0) AND NOT FIREABLE(switch11_1_0) AND NOT FIREABLE(switch11_4_6) AND NOT FIREABLE(switch11_3_6) AND NOT FIREABLE(switch11_2_6) AND NOT FIREABLE(switch11_1_6) AND NOT FIREABLE(switch11_0_6) AND NOT FIREABLE(switch11_7_5) AND NOT FIREABLE(switch11_6_5) AND NOT FIREABLE(switch11_5_5) AND NOT FIREABLE(switch11_4_5) AND NOT FIREABLE(switch11_3_5) AND NOT FIREABLE(switch11_2_5) AND NOT FIREABLE(switch11_1_5) AND NOT FIREABLE(switch11_0_5) AND NOT FIREABLE(switch11_7_4) AND NOT FIREABLE(switch11_6_4) AND NOT FIREABLE(switch11_5_4) AND NOT FIREABLE(switch11_7_7) AND NOT FIREABLE(switch11_5_7) AND NOT FIREABLE(switch11_6_7) AND NOT FIREABLE(switch11_3_7) AND NOT FIREABLE(switch11_4_7) AND NOT FIREABLE(switch11_1_7) AND NOT FIREABLE(switch11_2_7) AND NOT FIREABLE(switch11_7_6) AND NOT FIREABLE(switch11_0_7) AND NOT FIREABLE(switch11_5_6) AND NOT FIREABLE(switch11_6_6) AND NOT FIREABLE(switch11_2_2) AND NOT FIREABLE(switch11_1_2) AND NOT FIREABLE(switch11_4_2) AND NOT FIREABLE(switch11_3_2) AND NOT FIREABLE(switch11_6_1) AND NOT FIREABLE(switch11_5_1) AND NOT FIREABLE(switch11_0_2) AND NOT FIREABLE(switch11_7_1) AND NOT FIREABLE(switch11_2_1) AND NOT FIREABLE(switch11_1_1) AND NOT FIREABLE(switch11_4_1) AND NOT FIREABLE(switch11_3_1) AND NOT FIREABLE(switch11_6_0) AND NOT FIREABLE(switch11_5_0) AND NOT FIREABLE(switch11_0_1) AND NOT FIREABLE(switch11_7_0) AND NOT FIREABLE(switch11_1_4) AND NOT FIREABLE(switch11_2_4) AND NOT FIREABLE(switch11_3_4) AND NOT FIREABLE(switch11_4_4) AND NOT FIREABLE(switch11_5_3) AND NOT FIREABLE(switch11_6_3) AND NOT FIREABLE(switch11_7_3) AND NOT FIREABLE(switch11_0_4) AND NOT FIREABLE(switch11_1_3) AND NOT FIREABLE(switch11_2_3) AND NOT FIREABLE(switch11_3_3) AND NOT FIREABLE(switch11_4_3) AND NOT FIREABLE(switch11_5_2) AND NOT FIREABLE(switch11_6_2) AND NOT FIREABLE(switch11_7_2) AND NOT FIREABLE(switch11_0_3))))) : E (F ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3)))) : A (G ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FIREABLE(switch6_0_2) OR FIREABLE(switch1_1_4) OR FIREABLE(switch1_0_5) OR FIREABLE(switch1_1_5) OR FIREABLE(switch1_0_4) OR (NOT FIREABLE(display3_4_0) AND NOT FIREABLE(display3_3_0) AND NOT FIREABLE(display3_2_0) AND NOT FIREABLE(display3_1_0) AND NOT FIREABLE(display3_0_0) AND NOT FIREABLE(display3_3_2) AND NOT FIREABLE(display3_4_2) AND NOT FIREABLE(display3_1_2) AND NOT FIREABLE(display3_2_2) AND NOT FIREABLE(display3_7_1) AND NOT FIREABLE(display3_0_2) AND NOT FIREABLE(display3_5_1) AND NOT FIREABLE(display3_6_1) AND NOT FIREABLE(display3_3_1) AND NOT FIREABLE(display3_4_1) AND NOT FIREABLE(display3_1_1) AND NOT FIREABLE(display3_2_1) AND NOT FIREABLE(display3_7_0) AND NOT FIREABLE(display3_0_1) AND NOT FIREABLE(display3_5_0) AND NOT FIREABLE(display3_6_0) AND NOT FIREABLE(display3_0_5) AND NOT FIREABLE(display3_7_4) AND NOT FIREABLE(display3_6_4) AND NOT FIREABLE(display3_5_4) AND NOT FIREABLE(display3_4_5) AND NOT FIREABLE(display3_3_5) AND NOT FIREABLE(display3_2_5) AND NOT FIREABLE(display3_1_5) AND NOT FIREABLE(display3_0_6) AND NOT FIREABLE(display3_7_5) AND NOT FIREABLE(display3_6_5) AND NOT FIREABLE(display3_5_5) AND NOT FIREABLE(display3_4_6) AND NOT FIREABLE(display3_3_6) AND NOT FIREABLE(display3_2_6) AND NOT FIREABLE(display3_1_6) AND NOT FIREABLE(display3_7_2) AND NOT FIREABLE(display3_0_3) AND NOT FIREABLE(display3_5_2) AND NOT FIREABLE(display3_6_2) AND NOT FIREABLE(display3_3_3) AND NOT FIREABLE(display3_4_3) AND NOT FIREABLE(display3_1_3) AND NOT FIREABLE(display3_2_3) AND NOT FIREABLE(display3_7_3) AND NOT FIREABLE(display3_0_4) AND NOT FIREABLE(display3_5_3) AND NOT FIREABLE(display3_6_3) AND NOT FIREABLE(display3_3_4) AND NOT FIREABLE(display3_4_4) AND NOT FIREABLE(display3_1_4) AND NOT FIREABLE(display3_2_4) AND NOT FIREABLE(display3_5_6) AND NOT FIREABLE(display3_6_6) AND NOT FIREABLE(display3_7_6) AND NOT FIREABLE(display3_0_7) AND NOT FIREABLE(display3_1_7) AND NOT FIREABLE(display3_2_7) AND NOT FIREABLE(display3_3_7) AND NOT FIREABLE(display3_4_7) AND NOT FIREABLE(display3_5_7) AND NOT FIREABLE(display3_6_7) AND NOT FIREABLE(display3_7_7))))) : E (F ((FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(display2_4_2) OR FIREABLE(display2_3_2) OR FIREABLE(display2_0_0) OR FIREABLE(display2_1_0) OR FIREABLE(display2_2_0) OR FIREABLE(display2_3_0) OR FIREABLE(display2_4_0) OR FIREABLE(display2_4_5) OR FIREABLE(display2_3_5) OR FIREABLE(display2_2_5) OR FIREABLE(display2_1_5) OR FIREABLE(display2_0_5) OR FIREABLE(display2_7_4) OR FIREABLE(display2_6_4) OR FIREABLE(display2_5_4) OR FIREABLE(display2_4_6) OR FIREABLE(display2_3_6) OR FIREABLE(display2_2_6) OR FIREABLE(display2_1_6) OR FIREABLE(display2_0_6) OR FIREABLE(display2_7_5) OR FIREABLE(display2_6_5) OR FIREABLE(display2_5_5) OR FIREABLE(display2_3_3) OR FIREABLE(display2_4_3) OR FIREABLE(display2_1_3) OR FIREABLE(display2_2_3) OR FIREABLE(display2_7_2) OR FIREABLE(display2_0_3) OR FIREABLE(display2_5_2) OR FIREABLE(display2_6_2) OR FIREABLE(display2_3_4) OR FIREABLE(display2_4_4) OR FIREABLE(display2_1_4) OR FIREABLE(display2_2_4) OR FIREABLE(display2_7_3) OR FIREABLE(display2_0_4) OR FIREABLE(display2_5_3) OR FIREABLE(display2_6_3) OR FIREABLE(display2_1_7) OR FIREABLE(display2_2_7) OR FIREABLE(display2_3_7) OR FIREABLE(display2_4_7) OR FIREABLE(display2_5_6) OR FIREABLE(display2_6_6) OR FIREABLE(display2_7_6) OR FIREABLE(display2_0_7) OR FIREABLE(display2_5_7) OR FIREABLE(display2_6_7) OR FIREABLE(display2_7_7)))) : E (F (((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch10_0_6) OR FIREABLE(switch10_5_5) OR FIREABLE(switch10_6_5) OR FIREABLE(switch10_3_6) OR FIREABLE(switch10_4_6) OR FIREABLE(switch10_1_6) OR FIREABLE(switch10_2_6) OR FIREABLE(switch10_0_7) OR FIREABLE(switch10_7_6) OR FIREABLE(switch10_6_6) OR FIREABLE(switch10_5_6) OR FIREABLE(switch10_4_7) OR FIREABLE(switch10_3_7) OR FIREABLE(switch10_2_7) OR FIREABLE(switch10_1_7) OR FIREABLE(switch10_7_7) OR FIREABLE(switch10_6_7) OR FIREABLE(switch10_5_7) OR FIREABLE(switch10_5_0) OR FIREABLE(switch10_6_0) OR FIREABLE(switch10_7_0) OR FIREABLE(switch10_0_1) OR FIREABLE(switch10_1_1) OR FIREABLE(switch10_2_1) OR FIREABLE(switch10_3_1) OR FIREABLE(switch10_4_1) OR FIREABLE(switch10_5_1) OR FIREABLE(switch10_6_1) OR FIREABLE(switch10_7_1) OR FIREABLE(switch10_0_2) OR FIREABLE(switch10_1_2) OR FIREABLE(switch10_2_2) OR FIREABLE(switch10_3_2) OR FIREABLE(switch10_4_2) OR FIREABLE(switch10_6_2) OR FIREABLE(switch10_5_2) OR FIREABLE(switch10_0_3) OR FIREABLE(switch10_7_2) OR FIREABLE(switch10_2_3) OR FIREABLE(switch10_1_3) OR FIREABLE(switch10_4_3) OR FIREABLE(switch10_3_3) OR FIREABLE(switch10_6_3) OR FIREABLE(switch10_5_3) OR FIREABLE(switch10_0_4) OR FIREABLE(switch10_7_3) OR FIREABLE(switch10_2_4) OR FIREABLE(switch10_1_4) OR FIREABLE(switch10_4_4) OR FIREABLE(switch10_3_4)) AND (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3)) AND NOT FIREABLE(switch7_0_2) AND NOT FIREABLE(switch7_1_2) AND NOT FIREABLE(switch7_4_2) AND NOT FIREABLE(switch7_5_2) AND NOT FIREABLE(switch7_0_3) AND NOT FIREABLE(switch7_5_7) AND NOT FIREABLE(switch7_4_7) AND NOT FIREABLE(switch7_1_7) AND NOT FIREABLE(switch7_0_7) AND NOT FIREABLE(switch7_5_6) AND NOT FIREABLE(switch7_4_6) AND NOT FIREABLE(switch7_1_6) AND NOT FIREABLE(switch7_0_6) AND NOT FIREABLE(switch7_5_3) AND NOT FIREABLE(switch7_4_3) AND NOT FIREABLE(switch7_1_3)))) : A (G ((NOT FIREABLE(switch11_0_0) AND NOT FIREABLE(switch11_4_0) AND NOT FIREABLE(switch11_3_0) AND NOT FIREABLE(switch11_2_0) AND NOT FIREABLE(switch11_1_0) AND NOT FIREABLE(switch11_4_6) AND NOT FIREABLE(switch11_3_6) AND NOT FIREABLE(switch11_2_6) AND NOT FIREABLE(switch11_1_6) AND NOT FIREABLE(switch11_0_6) AND NOT FIREABLE(switch11_7_5) AND NOT FIREABLE(switch11_6_5) AND NOT FIREABLE(switch11_5_5) AND NOT FIREABLE(switch11_4_5) AND NOT FIREABLE(switch11_3_5) AND NOT FIREABLE(switch11_2_5) AND NOT FIREABLE(switch11_1_5) AND NOT FIREABLE(switch11_0_5) AND NOT FIREABLE(switch11_7_4) AND NOT FIREABLE(switch11_6_4) AND NOT FIREABLE(switch11_5_4) AND NOT FIREABLE(switch11_7_7) AND NOT FIREABLE(switch11_5_7) AND NOT FIREABLE(switch11_6_7) AND NOT FIREABLE(switch11_3_7) AND NOT FIREABLE(switch11_4_7) AND NOT FIREABLE(switch11_1_7) AND NOT FIREABLE(switch11_2_7) AND NOT FIREABLE(switch11_7_6) AND NOT FIREABLE(switch11_0_7) AND NOT FIREABLE(switch11_5_6) AND NOT FIREABLE(switch11_6_6) AND NOT FIREABLE(switch11_2_2) AND NOT FIREABLE(switch11_1_2) AND NOT FIREABLE(switch11_4_2) AND NOT FIREABLE(switch11_3_2) AND NOT FIREABLE(switch11_6_1) AND NOT FIREABLE(switch11_5_1) AND NOT FIREABLE(switch11_0_2) AND NOT FIREABLE(switch11_7_1) AND NOT FIREABLE(switch11_2_1) AND NOT FIREABLE(switch11_1_1) AND NOT FIREABLE(switch11_4_1) AND NOT FIREABLE(switch11_3_1) AND NOT FIREABLE(switch11_6_0) AND NOT FIREABLE(switch11_5_0) AND NOT FIREABLE(switch11_0_1) AND NOT FIREABLE(switch11_7_0) AND NOT FIREABLE(switch11_1_4) AND NOT FIREABLE(switch11_2_4) AND NOT FIREABLE(switch11_3_4) AND NOT FIREABLE(switch11_4_4) AND NOT FIREABLE(switch11_5_3) AND NOT FIREABLE(switch11_6_3) AND NOT FIREABLE(switch11_7_3) AND NOT FIREABLE(switch11_0_4) AND NOT FIREABLE(switch11_1_3) AND NOT FIREABLE(switch11_2_3) AND NOT FIREABLE(switch11_3_3) AND NOT FIREABLE(switch11_4_3) AND NOT FIREABLE(switch11_5_2) AND NOT FIREABLE(switch11_6_2) AND NOT FIREABLE(switch11_7_2) AND NOT FIREABLE(switch11_0_3) AND ((NOT FIREABLE(display1_2_1) AND NOT FIREABLE(display1_1_1) AND NOT FIREABLE(display1_4_1) AND NOT FIREABLE(display1_3_1) AND NOT FIREABLE(display1_6_0) AND NOT FIREABLE(display1_5_0) AND NOT FIREABLE(display1_0_1) AND NOT FIREABLE(display1_7_0) AND NOT FIREABLE(display1_2_2) AND NOT FIREABLE(display1_1_2) AND NOT FIREABLE(display1_4_2) AND NOT FIREABLE(display1_3_2) AND NOT FIREABLE(display1_6_1) AND NOT FIREABLE(display1_5_1) AND NOT FIREABLE(display1_0_2) AND NOT FIREABLE(display1_7_1) AND NOT FIREABLE(display1_1_0) AND NOT FIREABLE(display1_2_0) AND NOT FIREABLE(display1_3_0) AND NOT FIREABLE(display1_4_0) AND NOT FIREABLE(display1_0_0) AND NOT FIREABLE(display1_7_5) AND NOT FIREABLE(display1_0_6) AND NOT FIREABLE(display1_5_5) AND NOT FIREABLE(display1_6_5) AND NOT FIREABLE(display1_3_6) AND NOT FIREABLE(display1_4_6) AND NOT FIREABLE(display1_1_6) AND NOT FIREABLE(display1_2_6) AND NOT FIREABLE(display1_7_4) AND NOT FIREABLE(display1_0_5) AND NOT FIREABLE(display1_5_4) AND NOT FIREABLE(display1_6_4) AND NOT FIREABLE(display1_3_5) AND NOT FIREABLE(display1_4_5) AND NOT FIREABLE(display1_1_5) AND NOT FIREABLE(display1_2_5) AND NOT FIREABLE(display1_0_4) AND NOT FIREABLE(display1_7_3) AND NOT FIREABLE(display1_6_3) AND NOT FIREABLE(display1_5_3) AND NOT FIREABLE(display1_4_4) AND NOT FIREABLE(display1_3_4) AND NOT FIREABLE(display1_2_4) AND NOT FIREABLE(display1_1_4) AND NOT FIREABLE(display1_0_3) AND NOT FIREABLE(display1_7_2) AND NOT FIREABLE(display1_6_2) AND NOT FIREABLE(display1_5_2) AND NOT FIREABLE(display1_4_3) AND NOT FIREABLE(display1_3_3) AND NOT FIREABLE(display1_2_3) AND NOT FIREABLE(display1_1_3) AND NOT FIREABLE(display1_6_7) AND NOT FIREABLE(display1_5_7) AND NOT FIREABLE(display1_7_7) AND NOT FIREABLE(display1_6_6) AND NOT FIREABLE(display1_5_6) AND NOT FIREABLE(display1_0_7) AND NOT FIREABLE(display1_7_6) AND NOT FIREABLE(display1_2_7) AND NOT FIREABLE(display1_1_7) AND NOT FIREABLE(display1_4_7) AND NOT FIREABLE(display1_3_7)) OR (NOT FIREABLE(switch7_0_2) AND NOT FIREABLE(switch7_1_2) AND NOT FIREABLE(switch7_4_2) AND NOT FIREABLE(switch7_5_2) AND NOT FIREABLE(switch7_0_3) AND NOT FIREABLE(switch7_5_7) AND NOT FIREABLE(switch7_4_7) AND NOT FIREABLE(switch7_1_7) AND NOT FIREABLE(switch7_0_7) AND NOT FIREABLE(switch7_5_6) AND NOT FIREABLE(switch7_4_6) AND NOT FIREABLE(switch7_1_6) AND NOT FIREABLE(switch7_0_6) AND NOT FIREABLE(switch7_5_3) AND NOT FIREABLE(switch7_4_3) AND NOT FIREABLE(switch7_1_3)) OR FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7) OR FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7) OR ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7)) AND (FIREABLE(switch8_1_7) OR FIREABLE(switch8_4_7) OR FIREABLE(switch8_5_7) OR FIREABLE(switch8_1_3) OR FIREABLE(switch8_4_3) OR FIREABLE(switch8_5_3) OR FIREABLE(switch8_0_6) OR FIREABLE(switch8_1_6) OR FIREABLE(switch8_4_6) OR FIREABLE(switch8_5_6) OR FIREABLE(switch8_0_7) OR FIREABLE(switch8_0_2) OR FIREABLE(switch8_4_2) OR FIREABLE(switch8_1_2) OR FIREABLE(switch8_0_3) OR FIREABLE(switch8_5_2))))))) : E (F ((FIREABLE(switch11_3_1) AND FIREABLE(display2_3_0) AND (FIREABLE(display1_7_2) OR FIREABLE(switch11_5_1)) AND (FIREABLE(switch3_2_6) OR FIREABLE(display1_2_4) OR (FIREABLE(switch9_3_4) AND FIREABLE(switch10_4_2))) AND FIREABLE(display1_4_1) AND FIREABLE(display4_6_6)))) : E (F ((FIREABLE(switch12_1_1) AND FIREABLE(switch11_0_4)))) : E (F ((FIREABLE(display3_4_5) OR FIREABLE(display2_5_6)))) : E (F ((FIREABLE(display3_1_4) AND FIREABLE(switch10_7_1) AND FIREABLE(display4_2_4) AND FIREABLE(switch10_2_4) AND (FIREABLE(switch5_1_2) OR FIREABLE(display1_4_2))))) : E (F (FIREABLE(switch10_2_7))) : E (F ((FIREABLE(display3_3_2) AND FIREABLE(display4_0_4) AND (FIREABLE(switch9_3_7) OR FIREABLE(display3_7_2) OR FIREABLE(switch11_7_5) OR FIREABLE(switch10_3_0)) AND (FIREABLE(switch6_0_2) OR NOT FIREABLE(display3_0_6) OR NOT FIREABLE(switch10_0_2) OR NOT FIREABLE(display3_0_3))))) : E (F (FIREABLE(display4_0_7))) : E (F ((FIREABLE(switch9_1_4) AND FIREABLE(switch6_5_7) AND FIREABLE(switch12_5_5))))
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 223 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F (FIREABLE(switch10_2_7)))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F (FIREABLE(switch10_2_7)))
lola: processed formula length: 30
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: FIREABLE(switch10_2_7)
lola: state equation: Generated DNF with 3 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-0.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-0.sara.
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 21 markings, 20 edges

FORMULA PermAdmissibility-PT-02-ReachabilityFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 1 will run for 238 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F (FIREABLE(display4_0_7)))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F (FIREABLE(display4_0_7)))
lola: processed formula length: 30
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: FIREABLE(display4_0_7)
lola: state equation: Generated DNF with 3 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-0.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-0.sara.
lola: ========================================
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 63 markings, 62 edges
lola: ========================================

FORMULA PermAdmissibility-PT-02-ReachabilityFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 2 will run for 255 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(switch12_1_1) AND FIREABLE(switch11_0_4))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F ((FIREABLE(switch12_1_1) AND FIREABLE(switch11_0_4))))
lola: processed formula length: 59
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: (FIREABLE(switch12_1_1) AND FIREABLE(switch11_0_4))
lola: state equation: Generated DNF with 6 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-2-0.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-2-0.sara.
sara: place or transition ordering is non-deterministic

lola: state equation 0: solution produced
lola: SUBRESULT
lola: result: yes
lola: produced by: state equation
lola: The predicate is reachable.
lola: ========================================

FORMULA PermAdmissibility-PT-02-ReachabilityFireability-9 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 3 will run for 274 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(display3_4_5) OR FIREABLE(display2_5_6))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F ((FIREABLE(display3_4_5) OR FIREABLE(display2_5_6))))
lola: processed formula length: 59
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 23 markings, 22 edges
lola: formula 0: (FIREABLE(display3_4_5) OR FIREABLE(display2_5_6))
lola: state equation: Generated DNF with 6 literals and 2 conjunctive subformulas
lola: ========================================

FORMULA PermAdmissibility-PT-02-ReachabilityFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 4 will run for 297 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(switch9_1_4) AND FIREABLE(switch6_5_7) AND FIREABLE(switch12_5_5))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F ((FIREABLE(switch9_1_4) AND FIREABLE(switch6_5_7) AND FIREABLE(switch12_5_5))))
lola: processed formula length: 84
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: (FIREABLE(switch9_1_4) AND FIREABLE(switch6_5_7) AND FIREABLE(switch12_5_5))
lola: state equation: Generated DNF with 9 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-4-0.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-4-0.sara.
sara: place or transition ordering is non-deterministic
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is unreachable.
lola: 10899 markings, 18139 edges
lola: ========================================

FORMULA PermAdmissibility-PT-02-ReachabilityFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 5 will run for 324 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(display3_1_4) AND FIREABLE(switch10_7_1) AND FIREABLE(display4_2_4) AND FIREABLE(switch10_2_4) AND (FIREABLE(switch5_1_2) OR FIREABLE(display1_4_2)))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F ((FIREABLE(display3_1_4) AND FIREABLE(switch10_7_1) AND FIREABLE(display4_2_4) AND FIREABLE(switch10_2_4) AND (FIREABLE(switch5_1_2) OR FIREABLE(display1_4_2)))))
lola: processed formula length: 168
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: (FIREABLE(display3_1_4) AND FIREABLE(switch10_7_1) AND FIREABLE(display4_2_4) AND FIREABLE(switch10_2_4) AND (FIREABLE(switch5_1_2) OR FIREABLE(display1_4_2)))
lola: state equation: Generated DNF with 30 literals and 2 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-5-0.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-5-0.sara.
sara: place or transition ordering is non-deterministic

lola: state equation: solution impossible
lola: SUBRESULT
lola: result: no
lola: produced by: state equation
lola: The predicate is unreachable.
lola: ========================================

FORMULA PermAdmissibility-PT-02-ReachabilityFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 6 will run for 356 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(switch11_3_1) AND FIREABLE(display2_3_0) AND (FIREABLE(display1_7_2) OR FIREABLE(switch11_5_1)) AND (FIREABLE(switch3_2_6) OR FIREABLE(display1_2_4) OR (FIREABLE(switch9_3_4) AND FIREABLE(switch10_4_2))) AND FIREABLE(display1_4_1) AND FIREABLE(display4_6_6))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F ((FIREABLE(switch11_3_1) AND FIREABLE(display2_3_0) AND (FIREABLE(display1_7_2) OR FIREABLE(switch11_5_1)) AND (FIREABLE(switch3_2_6) OR FIREABLE(display1_2_4) OR (FIREABLE(switch9_3_4) AND FIREABLE(switch10_4_2))) AND FIREABLE(display1_4_1) AND FIREABLE(display4_6_6))))
lola: processed formula length: 279
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: (FIREABLE(switch11_3_1) AND FIREABLE(display2_3_0) AND (FIREABLE(display1_7_2) OR FIREABLE(switch11_5_1)) AND (FIREABLE(switch3_2_6) OR FIREABLE(display1_2_4) OR (FIREABLE(switch9_3_4) AND FIREABLE(switch10_4_2))) AND FIREABLE(display1_4_1) AND FIREABLE(display4_6_6))
lola: state equation: Generated DNF with 114 literals and 6 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-6-0.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-6-0.sara.
sara: place or transition ordering is non-deterministic
lola: sara is running 0 secs || 495531 markings, 1211190 edges, 99106 markings/sec, 0 secs
lola: sara is running 5 secs || 1008211 markings, 2431144 edges, 102536 markings/sec, 5 secs
lola: sara is running 10 secs || 1522716 markings, 3644375 edges, 102901 markings/sec, 10 secs
lola: sara is running 15 secs || 2069421 markings, 4852954 edges, 109341 markings/sec, 15 secs
lola: sara is running 20 secs || 2624140 markings, 6058221 edges, 110944 markings/sec, 20 secs
lola: sara is running 25 secs || 3160239 markings, 7331146 edges, 107220 markings/sec, 25 secs
lola: sara is running 30 secs || 3688595 markings, 8584691 edges, 105671 markings/sec, 30 secs
lola: sara is running 35 secs || 4269737 markings, 9872110 edges, 116228 markings/sec, 35 secs
lola: sara is running 40 secs || 4829731 markings, 11126695 edges, 111999 markings/sec, 40 secs
lola: sara is running 45 secs || 5411324 markings, 12363898 edges, 116319 markings/sec, 45 secs
lola: sara is running 50 secs || 5937054 markings, 13652492 edges, 105146 markings/sec, 50 secs
lola: sara is running 55 secs || 6483501 markings, 14921044 edges, 109289 markings/sec, 55 secs
lola: sara is running 60 secs || 7027616 markings, 16169416 edges, 108823 markings/sec, 60 secs
lola: sara is running 65 secs || 7526067 markings, 17427318 edges, 99690 markings/sec, 65 secs
lola: sara is running 70 secs || 8143238 markings, 18688534 edges, 123434 markings/sec, 70 secs
lola: sara is running 75 secs || 8715111 markings, 19939650 edges, 114375 markings/sec, 75 secs
lola: sara is running 80 secs || 9301982 markings, 21195888 edges, 117374 markings/sec, 80 secs
lola: sara is running 85 secs || 9919538 markings, 22481998 edges, 123511 markings/sec, 85 secs
lola: sara is running 90 secs || 10529606 markings, 23758429 edges, 122014 markings/sec, 90 secs
lola: sara is running 95 secs || 11088110 markings, 25034676 edges, 111701 markings/sec, 95 secs
lola: sara is running 100 secs || 11657151 markings, 26297068 edges, 113808 markings/sec, 100 secs
lola: sara is running 105 secs || 12179715 markings, 27454844 edges, 104513 markings/sec, 105 secs
lola: sara is running 110 secs || 12675828 markings, 28620842 edges, 99223 markings/sec, 110 secs
lola: sara is running 115 secs || 13186768 markings, 29772581 edges, 102188 markings/sec, 115 secs
lola: sara is running 120 secs || 13685660 markings, 30982543 edges, 99778 markings/sec, 120 secs
lola: sara is running 125 secs || 14224870 markings, 32224487 edges, 107842 markings/sec, 125 secs
lola: sara is running 130 secs || 14757214 markings, 33450900 edges, 106469 markings/sec, 130 secs
lola: sara is running 135 secs || 15266072 markings, 34697247 edges, 101772 markings/sec, 135 secs
lola: sara is running 140 secs || 15808877 markings, 35947428 edges, 108561 markings/sec, 140 secs
lola: sara is running 145 secs || 16313678 markings, 37183024 edges, 100960 markings/sec, 145 secs
lola: sara is running 150 secs || 16789529 markings, 38377809 edges, 95170 markings/sec, 150 secs
lola: sara is running 155 secs || 17285276 markings, 39552533 edges, 99149 markings/sec, 155 secs
lola: sara is running 160 secs || 17797772 markings, 40795494 edges, 102499 markings/sec, 160 secs
lola: sara is running 165 secs || 18288176 markings, 42004501 edges, 98081 markings/sec, 165 secs
lola: sara is running 170 secs || 18781798 markings, 43229055 edges, 98724 markings/sec, 170 secs
lola: sara is running 175 secs || 19295839 markings, 44463138 edges, 102808 markings/sec, 175 secs
lola: sara is running 180 secs || 19752680 markings, 45646550 edges, 91368 markings/sec, 180 secs
lola: sara is running 185 secs || 20241742 markings, 46829465 edges, 97812 markings/sec, 185 secs
lola: sara is running 190 secs || 20707275 markings, 47983089 edges, 93107 markings/sec, 190 secs
lola: sara is running 195 secs || 21163165 markings, 49129345 edges, 91178 markings/sec, 195 secs
lola: sara is running 200 secs || 21656734 markings, 50337078 edges, 98714 markings/sec, 200 secs
lola: sara is running 205 secs || 22126394 markings, 51538484 edges, 93932 markings/sec, 205 secs
lola: sara is running 210 secs || 22616401 markings, 52736125 edges, 98001 markings/sec, 210 secs
lola: sara is running 215 secs || 23108891 markings, 53968547 edges, 98498 markings/sec, 215 secs
lola: sara is running 220 secs || 23586105 markings, 55166493 edges, 95443 markings/sec, 220 secs
lola: sara is running 225 secs || 24072052 markings, 56413325 edges, 97189 markings/sec, 225 secs
lola: sara is running 230 secs || 24566424 markings, 57657638 edges, 98874 markings/sec, 230 secs
lola: sara is running 235 secs || 25062594 markings, 58910488 edges, 99234 markings/sec, 235 secs
lola: sara is running 240 secs || 25543407 markings, 60142396 edges, 96163 markings/sec, 240 secs
lola: sara is running 245 secs || 26016621 markings, 61354643 edges, 94643 markings/sec, 245 secs
lola: sara is running 250 secs || 26502401 markings, 62577442 edges, 97156 markings/sec, 250 secs
lola: sara is running 255 secs || 26973689 markings, 63794197 edges, 94258 markings/sec, 255 secs
lola: sara is running 260 secs || 27485039 markings, 65021430 edges, 102270 markings/sec, 260 secs
lola: sara is running 265 secs || 27976193 markings, 66247296 edges, 98231 markings/sec, 265 secs
lola: sara is running 270 secs || 28451502 markings, 67454083 edges, 95062 markings/sec, 270 secs
lola: sara is running 275 secs || 28888390 markings, 68639900 edges, 87378 markings/sec, 275 secs
lola: sara is running 280 secs || 29362641 markings, 69831483 edges, 94850 markings/sec, 280 secs
lola: sara is running 285 secs || 29877910 markings, 71000900 edges, 103054 markings/sec, 285 secs
lola: sara is running 290 secs || 30325494 markings, 72232968 edges, 89517 markings/sec, 290 secs
lola: sara is running 295 secs || 30793056 markings, 73442297 edges, 93512 markings/sec, 295 secs
lola: sara is running 300 secs || 31255662 markings, 74623987 edges, 92521 markings/sec, 300 secs
lola: sara is running 305 secs || 31720614 markings, 75818671 edges, 92990 markings/sec, 305 secs
lola: sara is running 310 secs || 32171235 markings, 76998003 edges, 90124 markings/sec, 310 secs
lola: sara is running 315 secs || 32635639 markings, 78203166 edges, 92881 markings/sec, 315 secs
lola: sara is running 320 secs || 33145653 markings, 79387057 edges, 102003 markings/sec, 320 secs
lola: sara is running 325 secs || 33620676 markings, 80567225 edges, 95005 markings/sec, 325 secs
lola: sara is running 330 secs || 34085918 markings, 81764831 edges, 93048 markings/sec, 330 secs
lola: sara is running 335 secs || 34545295 markings, 82921758 edges, 91875 markings/sec, 335 secs
lola: sara is running 340 secs || 34988117 markings, 84127305 edges, 88564 markings/sec, 340 secs
lola: sara is running 345 secs || 35469068 markings, 85329655 edges, 96190 markings/sec, 345 secs
lola: sara is running 350 secs || 35951438 markings, 86534702 edges, 96474 markings/sec, 350 secs
lola: local time limit reached - aborting
lola:
preliminary result: unknown unknown unknown unknown unknown unknown unknown unknown unknown yes yes no yes unknown yes no
lola: memory consumption: 1476756 KB
lola: time consumption: 357 seconds
lola: Child process aborted or communication problem between parent and child process
lola: subprocess 7 will run for 357 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(display3_3_2) AND FIREABLE(display4_0_4) AND (FIREABLE(switch9_3_7) OR FIREABLE(display3_7_2) OR FIREABLE(switch11_7_5) OR FIREABLE(switch10_3_0)) AND (FIREABLE(switch6_0_2) OR NOT FIREABLE(display3_0_6) OR NOT FIREABLE(switch10_0_2) OR NOT FIREABLE(display3_0_3)))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F ((FIREABLE(display3_3_2) AND FIREABLE(display4_0_4) AND (FIREABLE(switch9_3_7) OR FIREABLE(display3_7_2) OR FIREABLE(switch11_7_5) OR FIREABLE(switch10_3_0)) AND (FIREABLE(switch6_0_2) OR NOT FIREABLE(display3_0_6) OR NOT FIREABLE(switch10_0_2) OR NOT FIREABLE(display3_0_3)))))
lola: processed formula length: 289
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: (FIREABLE(display3_3_2) AND FIREABLE(display4_0_4) AND (FIREABLE(switch9_3_7) OR FIREABLE(display3_7_2) OR FIREABLE(switch11_7_5) OR FIREABLE(switch10_3_0)) AND (FIREABLE(switch6_0_2) OR NOT FIREABLE(display3_0_6) OR NOT FIREABLE(switch10_0_2) OR NOT FIREABLE(display3_0_3)))
lola: state equation: Generated DNF with 238 literals and 23 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-7-0.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-7-0.sara.
sara: place or transition ordering is non-deterministic
lola: sara is running 0 secs || 698060 markings, 1000544 edges, 139612 markings/sec, 0 secs
lola: sara is running 5 secs || 1317008 markings, 2016321 edges, 123790 markings/sec, 5 secs
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 1799345 markings, 2802304 edges
lola: ========================================

FORMULA PermAdmissibility-PT-02-ReachabilityFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 8 will run for 399 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch... (shortened)
lola: processed formula length: 1733
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 13 markings, 12 edges
lola: ========================================

FORMULA PermAdmissibility-PT-02-ReachabilityFireability-3 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 9 will run for 457 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(displa... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F ((FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(displa... (shortened)
lola: processed formula length: 1733
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: (FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(display2_4_2) OR FIREABLE(display2_3_2) OR FIREABLE(display2_0_0) OR FIREABLE(display2_1_0) OR FIREABLE(display2_2_0) OR FIREABLE(display2_3_0) OR FIREABLE(display2_4_0) OR FIREABLE(display2_4_5) OR FIREABLE(display2_3_5) OR FIREABLE(display2_2_5) OR FIREABLE(display2_1_5) OR FIREABLE(display2_0_5) OR FIREABLE(display2_7_4) OR FIREABLE(display2_6_4) OR FIREABLE(display2_5_4) OR FIREABLE(display2_4_6) OR FIREABLE(display2_3_6) OR FIREABLE(display2_2_6) OR FIREABLE(display2_1_6) OR FIREABLE(display2_0_6) OR FIREABLE(display2_7_5) OR FIREABLE(display2_6_5) OR FIREABLE(display2_5_5) OR FIREABLE(display2_3_3) OR FIREABLE(display2_4_3) OR FIREABLE(display2_1_3) OR FIREABLE(display2_2_3) OR FIREABLE(display2_7_2) OR FIREABLE(display2_0_3) OR FIREABLE(display2_5_2) OR FIREABLE(display2_6_2) OR FIREABLE(display2_3_4) OR FIREABLE(display2_4_4) OR FIREABLE(display2_1_4) OR FIREABLE(display2_2_4) OR FIREABLE(display2_7_3) OR FIREABLE(display2_0_4) OR FIREABLE(display2_5_3) OR FIREABLE(display2_6_3) OR FIREABLE(display2_1_7) OR FIREABLE(display2_2_7) OR FIREABLE(display2_3_7) OR FIREABLE(display2_4_7) OR FIREABLE(display2_5_6) OR FIREABLE(display2_6_6) OR FIREABLE(display2_7_6) OR FIREABLE(display2_0_7) OR FIREABLE(display2_5_7) OR FIREABLE(display2_6_7) OR FIREABLE(display2_7_7))
lola: state equation: Generated DNF with 192 literals and 64 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-9-0.sara
lola: lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 16 markings, 15 edges

FORMULA PermAdmissibility-PT-02-ReachabilityFireability-5 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: ========================================
lola: subprocess 10 will run for 533 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F (((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switc... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F (((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switc... (shortened)
lola: processed formula length: 2633
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: ((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch10_0_6) OR FIREABLE(switch10_5_5) OR FIREABLE(switch10_6_5) OR FIREABLE(switch10_3_6) OR FIREABLE(switch10_4_6) OR FIREABLE(switch10_1_6) OR FIREABLE(switch10_2_6) OR FIREABLE(switch10_0_7) OR FIREABLE(switch10_7_6) OR FIREABLE(switch10_6_6) OR FIREABLE(switch10_5_6) OR FIREABLE(switch10_4_7) OR FIREABLE(switch10_3_7) OR FIREABLE(switch10_2_7) OR FIREABLE(switch10_1_7) OR FIREABLE(switch10_7_7) OR FIREABLE(switch10_6_7) OR FIREABLE(switch10_5_7) OR FIREABLE(switch10_5_0) OR FIREABLE(switch10_6_0) OR FIREABLE(switch10_7_0) OR FIREABLE(switch10_0_1) OR FIREABLE(switch10_1_1) OR FIREABLE(switch10_2_1) OR FIREABLE(switch10_3_1) OR FIREABLE(switch10_4_1) OR FIREABLE(switch10_5_1) OR FIREABLE(switch10_6_1) OR FIREABLE(switch10_7_1) OR FIREABLE(switch10_0_2) OR FIREABLE(switch10_1_2) OR FIREABLE(switch10_2_2) OR FIREABLE(switch10_3_2) OR FIREABLE(switch10_4_2) OR FIREABLE(switch10_6_2) OR FIREABLE(switch10_5_2) OR FIREABLE(switch10_0_3) OR FIREABLE(switch10_7_2) OR FIREABLE(switch10_2_3) OR FIREABLE(switch10_1_3) OR FIREABLE(switch10_4_3) OR FIREABLE(switch10_3_3) OR FIREABLE(switch10_6_3) OR FIREABLE(switch10_5_3) OR FIREABLE(switch10_0_4) OR FIREABLE(switch10_7_3) OR FIREABLE(switch10_2_4) OR FIREABLE(switch10_1_4) OR FIREABLE(switch10_4_4) OR FIREABLE(switch10_3_4)) AND (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3)) AND NOT FIREABLE(switch7_0_2) AND NOT FIREABLE(switch7_1_2) AND NOT FIREABLE(switch7_4_2) AND NOT FIREABLE(switch7_5_2) AND NOT FIREABLE(switch7_0_3) AND NOT FIREABLE(switch7_5_7) AND NOT FIREABLE(switch7_4_7) AND NOT FIREABLE(switch7_1_7) AND NOT FIREABLE(switch7_0_7) AND NOT FIREABLE(switch7_5_6) AND NOT FIREABLE(switch7_4_6) AND NOT FIREABLE(switch7_1_6) AND NOT FIREABLE(switch7_0_6) AND NOT FIREABLE(switch7_5_3) AND NOT FIREABLE(switch7_4_3) AND NOT FIREABLE(switch7_1_3))
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is unreachable.
lola: 285423 markings, 647150 edges
lola: ========================================

FORMULA PermAdmissibility-PT-02-ReachabilityFireability-6 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 11 will run for 639 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (G ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FIR... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: processed formula: A (G ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FIR... (shortened)
lola: processed formula length: 2511
lola: 2 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: formula 0: (NOT FIREABLE(switch6_5_7) AND NOT FIREABLE(switch6_1_7) AND NOT FIREABLE(switch6_4_7) AND NOT FIREABLE(switch6_5_6) AND NOT FIREABLE(switch6_0_7) AND NOT FIREABLE(switch6_1_6) AND NOT FIREABLE(switch6_4_6) AND NOT FIREABLE(switch6_5_3) AND NOT FIREABLE(switch6_0_6) AND NOT FIREABLE(switch6_1_3) AND NOT FIREABLE(switch6_4_3) AND NOT FIREABLE(switch6_0_3) AND NOT FIREABLE(switch6_5_2) AND NOT FIREABLE(switch6_4_2) AND NOT FIREABLE(switch6_1_2) AND NOT FIREABLE(switch6_0_2) AND NOT FIREABLE(switch1_1_4) AND NOT FIREABLE(switch1_0_5) AND NOT FIREABLE(switch1_1_5) AND NOT FIREABLE(switch1_0_4) AND (FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7)))
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 16 markings, 15 edges
lola:
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-4 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
========================================
lola: subprocess 12 will run for 799 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F ((NOT FIREABLE(switch9_1_0) AND NOT FIREABLE(switch9_2_0) AND NOT FIREABLE(switch9_3_0) AND NOT FIREABLE(switch9_4_0) AND NOT FIREABLE(switch9_0_0) AND NOT FIREABLE(switch9_3_5) AND NOT FIREABLE(switch9_4_5) AND NOT FIREABLE(switch9_1_5) AND NOT FIREABLE(switch9_2_5) AND NOT FIREABLE(switch9_7_4) AND NOT FIREABLE(switch9_0_5) AND NOT FIREABLE(switch9_5_4) AND NOT FIREABLE(switch9_6_4) AND NOT... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F ((NOT FIREABLE(switch9_1_0) AND NOT FIREABLE(switch9_2_0) AND NOT FIREABLE(switch9_3_0) AND NOT FIREABLE(switch9_4_0) AND NOT FIREABLE(switch9_0_0) AND NOT FIREABLE(switch9_3_5) AND NOT FIREABLE(switch9_4_5) AND NOT FIREABLE(switch9_1_5) AND NOT FIREABLE(switch9_2_5) AND NOT FIREABLE(switch9_7_4) AND NOT FIREABLE(switch9_0_5) AND NOT FIREABLE(switch9_5_4) AND NOT FIREABLE(switch9_6_4) AND NOT... (shortened)
lola: processed formula length: 6749
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: (NOT FIREABLE(switch9_1_0) AND NOT FIREABLE(switch9_2_0) AND NOT FIREABLE(switch9_3_0) AND NOT FIREABLE(switch9_4_0) AND NOT FIREABLE(switch9_0_0) AND NOT FIREABLE(switch9_3_5) AND NOT FIREABLE(switch9_4_5) AND NOT FIREABLE(switch9_1_5) AND NOT FIREABLE(switch9_2_5) AND NOT FIREABLE(switch9_7_4) AND NOT FIREABLE(switch9_0_5) AND NOT FIREABLE(switch9_5_4) AND NOT FIREABLE(switch9_6_4) AND NOT FIREABLE(switch9_3_6) AND NOT FIREABLE(switch9_4_6) AND NOT FIREABLE(switch9_1_6) AND NOT FIREABLE(switch9_2_6) AND NOT FIREABLE(switch9_7_5) AND NOT FIREABLE(switch9_0_6) AND NOT FIREABLE(switch9_5_5) AND NOT FIREABLE(switch9_6_5) AND NOT FIREABLE(switch9_4_7) AND NOT FIREABLE(switch9_3_7) AND NOT FIREABLE(switch9_2_7) AND NOT FIREABLE(switch9_1_7) AND NOT FIREABLE(switch9_0_7) AND NOT FIREABLE(switch9_7_6) AND NOT FIREABLE(switch9_6_6) AND NOT FIREABLE(switch9_5_6) AND NOT FIREABLE(switch9_7_7) AND NOT FIREABLE(switch9_6_7) AND NOT FIREABLE(switch9_5_7) AND NOT FIREABLE(switch9_1_1) AND NOT FIREABLE(switch9_2_1) AND NOT FIREABLE(switch9_3_1) AND NOT FIREABLE(switch9_4_1) AND NOT FIREABLE(switch9_5_0) AND NOT FIREABLE(switch9_6_0) AND NOT FIREABLE(switch9_7_0) AND NOT FIREABLE(switch9_0_1) AND NOT FIREABLE(switch9_1_2) AND NOT FIREABLE(switch9_2_2) AND NOT FIREABLE(switch9_3_2) AND NOT FIREABLE(switch9_4_2) AND NOT FIREABLE(switch9_5_1) AND NOT FIREABLE(switch9_6_1) AND NOT FIREABLE(switch9_7_1) AND NOT FIREABLE(switch9_0_2) AND NOT FIREABLE(switch9_2_3) AND NOT FIREABLE(switch9_1_3) AND NOT FIREABLE(switch9_4_3) AND NOT FIREABLE(switch9_3_3) AND NOT FIREABLE(switch9_6_2) AND NOT FIREABLE(switch9_5_2) AND NOT FIREABLE(switch9_0_3) AND NOT FIREABLE(switch9_7_2) AND NOT FIREABLE(switch9_2_4) AND NOT FIREABLE(switch9_1_4) AND NOT FIREABLE(switch9_4_4) AND NOT FIREABLE(switch9_3_4) AND NOT FIREABLE(switch9_6_3) AND NOT FIREABLE(switch9_5_3) AND NOT FIREABLE(switch9_0_4) AND NOT FIREABLE(switch9_7_3) AND (FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7) OR FIREABLE(switch4_2_7) OR FIREABLE(switch4_3_6) OR FIREABLE(switch4_3_7) OR FIREABLE(switch4_2_6)) AND (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3)) AND (FIREABLE(switch3_3_6) OR FIREABLE(switch3_2_7) OR FIREABLE(switch3_3_7) OR FIREABLE(switch3_2_6) OR (NOT FIREABLE(display1_2_1) AND NOT FIREABLE(display1_1_1) AND NOT FIREABLE(display1_4_1) AND NOT FIREABLE(display1_3_1) AND NOT FIREABLE(display1_6_0) AND NOT FIREABLE(display1_5_0) AND NOT FIREABLE(display1_0_1) AND NOT FIREABLE(display1_7_0) AND NOT FIREABLE(display1_2_2) AND NOT FIREABLE(display1_1_2) AND NOT FIREABLE(display1_4_2) AND NOT FIREABLE(display1_3_2) AND NOT FIREABLE(display1_6_1) AND NOT FIREABLE(display1_5_1) AND NOT FIREABLE(display1_0_2) AND NOT FIREABLE(display1_7_1) AND NOT FIREABLE(display1_1_0) AND NOT FIREABLE(display1_2_0) AND NOT FIREABLE(display1_3_0) AND NOT FIREABLE(display1_4_0) AND NOT FIREABLE(display1_0_0) AND NOT FIREABLE(display1_7_5) AND NOT FIREABLE(display1_0_6) AND NOT FIREABLE(display1_5_5) AND NOT FIREABLE(display1_6_5) AND NOT FIREABLE(display1_3_6) AND NOT FIREABLE(display1_4_6) AND NOT FIREABLE(display1_1_6) AND NOT FIREABLE(display1_2_6) AND NOT FIREABLE(display1_7_4) AND NOT FIREABLE(display1_0_5) AND NOT FIREABLE(display1_5_4) AND NOT FIREABLE(display1_6_4) AND NOT FIREABLE(display1_3_5) AND NOT FIREABLE(display1_4_5) AND NOT FIREABLE(display1_1_5) AND NOT FIREABLE(display1_2_5) AND NOT FIREABLE(display1_0_4) AND NOT FIREABLE(display1_7_3) AND NOT FIREABLE(display1_6_3) AND NOT FIREABLE(display1_5_3) AND NOT FIREABLE(display1_4_4) AND NOT FIREABLE(display1_3_4) AND NOT FIREABLE(display1_2_4) AND NOT FIREABLE(display1_1_4) AND NOT FIREABLE(display1_0_3) AND NOT FIREABLE(display1_7_2) AND NOT FIREABLE(display1_6_2) AND NOT FIREABLE(display1_5_2) AND NOT FIREABLE(display1_4_3) AND NOT FIREABLE(display1_3_3) AND NOT FIREABLE(display1_2_3) AND NOT FIREABLE(display1_1_3) AND NOT FIREABLE(display1_6_7) AND NOT FIREABLE(display1_5_7) AND NOT FIREABLE(display1_7_7) AND NOT FIREABLE(display1_6_6) AND NOT FIREABLE(display1_5_6) AND NOT FIREABLE(display1_0_7) AND NOT FIREABLE(display1_7_6) AND NOT FIREABLE(display1_2_7) AND NOT FIREABLE(display1_1_7) AND NOT FIREABLE(display1_4_7) AND NOT FIREABLE(display1_3_7) AND NOT FIREABLE(switch6_5_7) AND NOT FIREABLE(switch6_1_7) AND NOT FIREABLE(switch6_4_7) AND NOT FIREABLE(switch6_5_6) AND NOT FIREABLE(switch6_0_7) AND NOT FIREABLE(switch6_1_6) AND NOT FIREABLE(switch6_4_6) AND NOT FIREABLE(switch6_5_3) AND NOT FIREABLE(switch6_0_6) AND NOT FIREABLE(switch6_1_3) AND NOT FIREABLE(switch6_4_3) AND NOT FIREABLE(switch6_0_3) AND NOT FIREABLE(switch6_5_2) AND NOT FIREABLE(switch6_4_2) AND NOT FIREABLE(switch6_1_2) AND NOT FIREABLE(switch6_0_2))))
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 10 markings, 9 edges
lola:
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-0 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
========================================
lola: subprocess 13 will run for 1065 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (G ((NOT FIREABLE(switch11_0_0) AND NOT FIREABLE(switch11_4_0) AND NOT FIREABLE(switch11_3_0) AND NOT FIREABLE(switch11_2_0) AND NOT FIREABLE(switch11_1_0) AND NOT FIREABLE(switch11_4_6) AND NOT FIREABLE(switch11_3_6) AND NOT FIREABLE(switch11_2_6) AND NOT FIREABLE(switch11_1_6) AND NOT FIREABLE(switch11_0_6) AND NOT FIREABLE(switch11_7_5) AND NOT FIREABLE(switch11_6_5) AND NOT FIREABLE(switch11... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: processed formula: A (G ((NOT FIREABLE(switch11_0_0) AND NOT FIREABLE(switch11_4_0) AND NOT FIREABLE(switch11_3_0) AND NOT FIREABLE(switch11_2_0) AND NOT FIREABLE(switch11_1_0) AND NOT FIREABLE(switch11_4_6) AND NOT FIREABLE(switch11_3_6) AND NOT FIREABLE(switch11_2_6) AND NOT FIREABLE(switch11_1_6) AND NOT FIREABLE(switch11_0_6) AND NOT FIREABLE(switch11_7_5) AND NOT FIREABLE(switch11_6_5) AND NOT FIREABLE(switch11... (shortened)
lola: processed formula length: 10065
lola: 2 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: formula 0: (FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3) OR ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7)) AND (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3)) AND NOT FIREABLE(display3_4_0) AND NOT FIREABLE(display3_3_0) AND NOT FIREABLE(display3_2_0) AND NOT FIREABLE(display3_1_0) AND NOT FIREABLE(display3_0_0) AND NOT FIREABLE(display3_3_2) AND NOT FIREABLE(display3_4_2) AND NOT FIREABLE(display3_1_2) AND NOT FIREABLE(display3_2_2) AND NOT FIREABLE(display3_7_1) AND NOT FIREABLE(display3_0_2) AND NOT FIREABLE(display3_5_1) AND NOT FIREABLE(display3_6_1) AND NOT FIREABLE(display3_3_1) AND NOT FIREABLE(display3_4_1) AND NOT FIREABLE(display3_1_1) AND NOT FIREABLE(display3_2_1) AND NOT FIREABLE(display3_7_0) AND NOT FIREABLE(display3_0_1) AND NOT FIREABLE(display3_5_0) AND NOT FIREABLE(display3_6_0) AND NOT FIREABLE(display3_0_5) AND NOT FIREABLE(display3_7_4) AND NOT FIREABLE(display3_6_4) AND NOT FIREABLE(display3_5_4) AND NOT FIREABLE(display3_4_5) AND NOT FIREABLE(display3_3_5) AND NOT FIREABLE(display3_2_5) AND NOT FIREABLE(display3_1_5) AND NOT FIREABLE(display3_0_6) AND NOT FIREABLE(display3_7_5) AND NOT FIREABLE(display3_6_5) AND NOT FIREABLE(display3_5_5) AND NOT FIREABLE(display3_4_6) AND NOT FIREABLE(display3_3_6) AND NOT FIREABLE(display3_2_6) AND NOT FIREABLE(display3_1_6) AND NOT FIREABLE(display3_7_2) AND NOT FIREABLE(display3_0_3) AND NOT FIREABLE(display3_5_2) AND NOT FIREABLE(display3_6_2) AND NOT FIREABLE(display3_3_3) AND NOT FIREABLE(display3_4_3) AND NOT FIREABLE(display3_1_3) AND NOT FIREABLE(display3_2_3) AND NOT FIREABLE(display3_7_3) AND NOT FIREABLE(display3_0_4) AND NOT FIREABLE(display3_5_3) AND NOT FIREABLE(display3_6_3) AND NOT FIREABLE(display3_3_4) AND NOT FIREABLE(display3_4_4) AND NOT FIREABLE(display3_1_4) AND NOT FIREABLE(display3_2_4) AND NOT FIREABLE(display3_5_6) AND NOT FIREABLE(display3_6_6) AND NOT FIREABLE(display3_7_6) AND NOT FIREABLE(display3_0_7) AND NOT FIREABLE(display3_1_7) AND NOT FIREABLE(display3_2_7) AND NOT FIREABLE(display3_3_7) AND NOT FIREABLE(display3_4_7) AND NOT FIREABLE(display3_5_7) AND NOT FIREABLE(display3_6_7) AND NOT FIREABLE(display3_7_7) AND NOT FIREABLE(display3_4_0) AND NOT FIREABLE(display3_3_0) AND NOT FIREABLE(display3_2_0) AND NOT FIREABLE(display3_1_0) AND NOT FIREABLE(display3_0_0) AND NOT FIREABLE(display3_3_2) AND NOT FIREABLE(display3_4_2) AND NOT FIREABLE(display3_1_2) AND NOT FIREABLE(display3_2_2) AND NOT FIREABLE(display3_7_1) AND NOT FIREABLE(display3_0_2) AND NOT FIREABLE(display3_5_1) AND NOT FIREABLE(display3_6_1) AND NOT FIREABLE(display3_3_1) AND NOT FIREABLE(display3_4_1) AND NOT FIREABLE(display3_1_1) AND NOT FIREABLE(display3_2_1) AND NOT FIREABLE(display3_7_0) AND NOT FIREABLE(display3_0_1) AND NOT FIREABLE(display3_5_0) AND NOT FIREABLE(display3_6_0) AND NOT FIREABLE(display3_0_5) AND NOT FIREABLE(display3_7_4) AND NOT FIREABLE(display3_6_4) AND NOT FIREABLE(display3_5_4) AND NOT FIREABLE(display3_4_5) AND NOT FIREABLE(display3_3_5) AND NOT FIREABLE(display3_2_5) AND NOT FIREABLE(display3_1_5) AND NOT FIREABLE(display3_0_6) AND NOT FIREABLE(display3_7_5) AND NOT FIREABLE(display3_6_5) AND NOT FIREABLE(display3_5_5) AND NOT FIREABLE(display3_4_6) AND NOT FIREABLE(display3_3_6) AND NOT FIREABLE(display3_2_6) AND NOT FIREABLE(display3_1_6) AND NOT FIREABLE(display3_7_2) AND NOT FIREABLE(display3_0_3) AND NOT FIREABLE(display3_5_2) AND NOT FIREABLE(display3_6_2) AND NOT FIREABLE(display3_3_3) AND NOT FIREABLE(display3_4_3) AND NOT FIREABLE(display3_1_3) AND NOT FIREABLE(display3_2_3) AND NOT FIREABLE(display3_7_3) AND NOT FIREABLE(display3_0_4) AND NOT FIREABLE(display3_5_3) AND NOT FIREABLE(display3_6_3) AND NOT FIREABLE(display3_3_4) AND NOT FIREABLE(display3_4_4) AND NOT FIREABLE(display3_1_4) AND NOT FIREABLE(display3_2_4) AND NOT FIREABLE(display3_5_6) AND NOT FIREABLE(display3_6_6) AND NOT FIREABLE(display3_7_6) AND NOT FIREABLE(display3_0_7) AND NOT FIREABLE(display3_1_7) AND NOT FIREABLE(display3_2_7) AND NOT FIREABLE(display3_3_7) AND NOT FIREABLE(display3_4_7) AND NOT FIREABLE(display3_5_7) AND NOT FIREABLE(display3_6_7) AND NOT FIREABLE(display3_7_7) AND ((NOT FIREABLE(display3_4_0) AND NOT FIREABLE(display3_3_0) AND NOT FIREABLE(display3_2_0) AND NOT FIREABLE(display3_1_0) AND NOT FIREABLE(display3_0_0) AND NOT FIREABLE(display3_3_2) AND NOT FIREABLE(display3_4_2) AND NOT FIREABLE(display3_1_2) AND NOT FIREABLE(display3_2_2) AND NOT FIREABLE(display3_7_1) AND NOT FIREABLE(display3_0_2) AND NOT FIREABLE(display3_5_1) AND NOT FIREABLE(display3_6_1) AND NOT FIREABLE(display3_3_1) AND NOT FIREABLE(display3_4_1) AND NOT FIREABLE(display3_1_1) AND NOT FIREABLE(display3_2_1) AND NOT FIREABLE(display3_7_0) AND NOT FIREABLE(display3_0_1) AND NOT FIREABLE(display3_5_0) AND NOT FIREABLE(display3_6_0) AND NOT FIREABLE(display3_0_5) AND NOT FIREABLE(display3_7_4) AND NOT FIREABLE(display3_6_4) AND NOT FIREABLE(display3_5_4) AND NOT FIREABLE(display3_4_5) AND NOT FIREABLE(display3_3_5) AND NOT FIREABLE(display3_2_5) AND NOT FIREABLE(display3_1_5) AND NOT FIREABLE(display3_0_6) AND NOT FIREABLE(display3_7_5) AND NOT FIREABLE(display3_6_5) AND NOT FIREABLE(display3_5_5) AND NOT FIREABLE(display3_4_6) AND NOT FIREABLE(display3_3_6) AND NOT FIREABLE(display3_2_6) AND NOT FIREABLE(display3_1_6) AND NOT FIREABLE(display3_7_2) AND NOT FIREABLE(display3_0_3) AND NOT FIREABLE(display3_5_2) AND NOT FIREABLE(display3_6_2) AND NOT FIREABLE(display3_3_3) AND NOT FIREABLE(display3_4_3) AND NOT FIREABLE(display3_1_3) AND NOT FIREABLE(display3_2_3) AND NOT FIREABLE(display3_7_3) AND NOT FIREABLE(display3_0_4) AND NOT FIREABLE(display3_5_3) AND NOT FIREABLE(display3_6_3) AND NOT FIREABLE(display3_3_4) AND NOT FIREABLE(display3_4_4) AND NOT FIREABLE(display3_1_4) AND NOT FIREABLE(display3_2_4) AND NOT FIREABLE(display3_5_6) AND NOT FIREABLE(display3_6_6) AND NOT FIREABLE(display3_7_6) AND NOT FIREABLE(display3_0_7) AND NOT FIREABLE(display3_1_7) AND NOT FIREABLE(display3_2_7) AND NOT FIREABLE(display3_3_7) AND NOT FIREABLE(display3_4_7) AND NOT FIREABLE(display3_5_7) AND NOT FIREABLE(display3_6_7) AND NOT FIREABLE(display3_7_7)) OR (NOT FIREABLE(switch8_1_7) AND NOT FIREABLE(switch8_4_7) AND NOT FIREABLE(switch8_5_7) AND NOT FIREABLE(switch8_1_3) AND NOT FIREABLE(switch8_4_3) AND NOT FIREABLE(switch8_5_3) AND NOT FIREABLE(switch8_0_6) AND NOT FIREABLE(switch8_1_6) AND NOT FIREABLE(switch8_4_6) AND NOT FIREABLE(switch8_5_6) AND NOT FIREABLE(switch8_0_7) AND NOT FIREABLE(switch8_0_2) AND NOT FIREABLE(switch8_4_2) AND NOT FIREABLE(switch8_1_2) AND NOT FIREABLE(switch8_0_3) AND NOT FIREABLE(switch8_5_2)))))
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 11 markings, 10 edges
lola:
FORMULA PermAdmissibility-PT-02-ReachabilityFireability-7 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
========================================
lola: subprocess 14 will run for 1598 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F (((FIREABLE(switch9_1_0) OR FIREABLE(switch9_2_0) OR FIREABLE(switch9_3_0) OR FIREABLE(switch9_4_0) OR FIREABLE(switch9_0_0) OR FIREABLE(switch9_3_5) OR FIREABLE(switch9_4_5) OR FIREABLE(switch9_1_5) OR FIREABLE(switch9_2_5) OR FIREABLE(switch9_7_4) OR FIREABLE(switch9_0_5) OR FIREABLE(switch9_5_4) OR FIREABLE(switch9_6_4) OR FIREABLE(switch9_3_6) OR FIREABLE(switch9_4_6) OR FI... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F (((FIREABLE(switch9_1_0) OR FIREABLE(switch9_2_0) OR FIREABLE(switch9_3_0) OR FIREABLE(switch9_4_0) OR FIREABLE(switch9_0_0) OR FIREABLE(switch9_3_5) OR FIREABLE(switch9_4_5) OR FIREABLE(switch9_1_5) OR FIREABLE(switch9_2_5) OR FIREABLE(switch9_7_4) OR FIREABLE(switch9_0_5) OR FIREABLE(switch9_5_4) OR FIREABLE(switch9_6_4) OR FIREABLE(switch9_3_6) OR FIREABLE(switch9_4_6) OR FI... (shortened)
lola: processed formula length: 8733
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: ((FIREABLE(switch9_1_0) OR FIREABLE(switch9_2_0) OR FIREABLE(switch9_3_0) OR FIREABLE(switch9_4_0) OR FIREABLE(switch9_0_0) OR FIREABLE(switch9_3_5) OR FIREABLE(switch9_4_5) OR FIREABLE(switch9_1_5) OR FIREABLE(switch9_2_5) OR FIREABLE(switch9_7_4) OR FIREABLE(switch9_0_5) OR FIREABLE(switch9_5_4) OR FIREABLE(switch9_6_4) OR FIREABLE(switch9_3_6) OR FIREABLE(switch9_4_6) OR FIREABLE(switch9_1_6) OR FIREABLE(switch9_2_6) OR FIREABLE(switch9_7_5) OR FIREABLE(switch9_0_6) OR FIREABLE(switch9_5_5) OR FIREABLE(switch9_6_5) OR FIREABLE(switch9_4_7) OR FIREABLE(switch9_3_7) OR FIREABLE(switch9_2_7) OR FIREABLE(switch9_1_7) OR FIREABLE(switch9_0_7) OR FIREABLE(switch9_7_6) OR FIREABLE(switch9_6_6) OR FIREABLE(switch9_5_6) OR FIREABLE(switch9_7_7) OR FIREABLE(switch9_6_7) OR FIREABLE(switch9_5_7) OR FIREABLE(switch9_1_1) OR FIREABLE(switch9_2_1) OR FIREABLE(switch9_3_1) OR FIREABLE(switch9_4_1) OR FIREABLE(switch9_5_0) OR FIREABLE(switch9_6_0) OR FIREABLE(switch9_7_0) OR FIREABLE(switch9_0_1) OR FIREABLE(switch9_1_2) OR FIREABLE(switch9_2_2) OR FIREABLE(switch9_3_2) OR FIREABLE(switch9_4_2) OR FIREABLE(switch9_5_1) OR FIREABLE(switch9_6_1) OR FIREABLE(switch9_7_1) OR FIREABLE(switch9_0_2) OR FIREABLE(switch9_2_3) OR FIREABLE(switch9_1_3) OR FIREABLE(switch9_4_3) OR FIREABLE(switch9_3_3) OR FIREABLE(switch9_6_2) OR FIREABLE(switch9_5_2) OR FIREABLE(switch9_0_3) OR FIREABLE(switch9_7_2) OR FIREABLE(switch9_2_4) OR FIREABLE(switch9_1_4) OR FIREABLE(switch9_4_4) OR FIREABLE(switch9_3_4) OR FIREABLE(switch9_6_3) OR FIREABLE(switch9_5_3) OR FIREABLE(switch9_0_4) OR FIREABLE(switch9_7_3)) AND (FIREABLE(switch1_1_4) OR FIREABLE(switch1_0_5) OR FIREABLE(switch1_1_5) OR FIREABLE(switch1_0_4)) AND (FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(display2_4_2) OR FIREABLE(display2_3_2) OR FIREABLE(display2_0_0) OR FIREABLE(display2_1_0) OR FIREABLE(display2_2_0) OR FIREABLE(display2_3_0) OR FIREABLE(display2_4_0) OR FIREABLE(display2_4_5) OR FIREABLE(display2_3_5) OR FIREABLE(display2_2_5) OR FIREABLE(display2_1_5) OR FIREABLE(display2_0_5) OR FIREABLE(display2_7_4) OR FIREABLE(display2_6_4) OR FIREABLE(display2_5_4) OR FIREABLE(display2_4_6) OR FIREABLE(display2_3_6) OR FIREABLE(display2_2_6) OR FIREABLE(display2_1_6) OR FIREABLE(display2_0_6) OR FIREABLE(display2_7_5) OR FIREABLE(display2_6_5) OR FIREABLE(display2_5_5) OR FIREABLE(display2_3_3) OR FIREABLE(display2_4_3) OR FIREABLE(display2_1_3) OR FIREABLE(display2_2_3) OR FIREABLE(display2_7_2) OR FIREABLE(display2_0_3) OR FIREABLE(display2_5_2) OR FIREABLE(display2_6_2) OR FIREABLE(display2_3_4) OR FIREABLE(display2_4_4) OR FIREABLE(display2_1_4) OR FIREABLE(display2_2_4) OR FIREABLE(display2_7_3) OR FIREABLE(display2_0_4) OR FIREABLE(display2_5_3) OR FIREABLE(display2_6_3) OR FIREABLE(display2_1_7) OR FIREABLE(display2_2_7) OR FIREABLE(display2_3_7) OR FIREABLE(display2_4_7) OR FIREABLE(display2_5_6) OR FIREABLE(display2_6_6) OR FIREABLE(display2_7_6) OR FIREABLE(display2_0_7) OR FIREABLE(display2_5_7) OR FIREABLE(display2_6_7) OR FIREABLE(display2_7_7)) AND (FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7) OR FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3) OR FIREABLE(switch9_1_0) OR FIREABLE(switch9_2_0) OR FIREABLE(switch9_3_0) OR FIREABLE(switch9_4_0) OR FIREABLE(switch9_0_0) OR FIREABLE(switch9_3_5) OR FIREABLE(switch9_4_5) OR FIREABLE(switch9_1_5) OR FIREABLE(switch9_2_5) OR FIREABLE(switch9_7_4) OR FIREABLE(switch9_0_5) OR FIREABLE(switch9_5_4) OR FIREABLE(switch9_6_4) OR FIREABLE(switch9_3_6) OR FIREABLE(switch9_4_6) OR FIREABLE(switch9_1_6) OR FIREABLE(switch9_2_6) OR FIREABLE(switch9_7_5) OR FIREABLE(switch9_0_6) OR FIREABLE(switch9_5_5) OR FIREABLE(switch9_6_5) OR FIREABLE(switch9_4_7) OR FIREABLE(switch9_3_7) OR FIREABLE(switch9_2_7) OR FIREABLE(switch9_1_7) OR FIREABLE(switch9_0_7) OR FIREABLE(switch9_7_6) OR FIREABLE(switch9_6_6) OR FIREABLE(switch9_5_6) OR FIREABLE(switch9_7_7) OR FIREABLE(switch9_6_7) OR FIREABLE(switch9_5_7) OR FIREABLE(switch9_1_1) OR FIREABLE(switch9_2_1) OR FIREABLE(switch9_3_1) OR FIREABLE(switch9_4_1) OR FIREABLE(switch9_5_0) OR FIREABLE(switch9_6_0) OR FIREABLE(switch9_7_0) OR FIREABLE(switch9_0_1) OR FIREABLE(switch9_1_2) OR FIREABLE(switch9_2_2) OR FIREABLE(switch9_3_2) OR FIREABLE(switch9_4_2) OR FIREABLE(switch9_5_1) OR FIREABLE(switch9_6_1) OR FIREABLE(switch9_7_1) OR FIREABLE(switch9_0_2) OR FIREABLE(switch9_2_3) OR FIREABLE(switch9_1_3) OR FIREABLE(switch9_4_3) OR FIREABLE(switch9_3_3) OR FIREABLE(switch9_6_2) OR FIREABLE(switch9_5_2) OR FIREABLE(switch9_0_3) OR FIREABLE(switch9_7_2) OR FIREABLE(switch9_2_4) OR FIREABLE(switch9_1_4) OR FIREABLE(switch9_4_4) OR FIREABLE(switch9_3_4) OR FIREABLE(switch9_6_3) OR FIREABLE(switch9_5_3) OR FIREABLE(switch9_0_4) OR FIREABLE(switch9_7_3) OR FIREABLE(switch1_1_4) OR FIREABLE(switch1_0_5) OR FIREABLE(switch1_1_5) OR FIREABLE(switch1_0_4)))
lola: state equation: Could not create input for sara: DNF too long or DEADLOCK predicate contained
lola: sara not yet started (preprocessing) || 534825 markings, 824270 edges, 106965 markings/sec, 0 secs
lola: sara not yet started (preprocessing) || 1057894 markings, 1802945 edges, 104614 markings/sec, 5 secs
lola: sara not yet started (preprocessing) || 1586595 markings, 2794496 edges, 105740 markings/sec, 10 secs
lola: sara not yet started (preprocessing) || 2127015 markings, 3731209 edges, 108084 markings/sec, 15 secs
lola: sara not yet started (preprocessing) || 2648436 markings, 4723270 edges, 104284 markings/sec, 20 secs
lola: sara not yet started (preprocessing) || 3176086 markings, 5659905 edges, 105530 markings/sec, 25 secs
lola: sara not yet started (preprocessing) || 3699733 markings, 6585471 edges, 104729 markings/sec, 30 secs
lola: sara not yet started (preprocessing) || 4226805 markings, 7520393 edges, 105414 markings/sec, 35 secs
lola: sara not yet started (preprocessing) || 4778518 markings, 8362560 edges, 110343 markings/sec, 40 secs
lola: sara not yet started (preprocessing) || 5307333 markings, 9315129 edges, 105763 markings/sec, 45 secs
lola: sara not yet started (preprocessing) || 5827233 markings, 10277600 edges, 103980 markings/sec, 50 secs
lola: sara not yet started (preprocessing) || 6351368 markings, 11219339 edges, 104827 markings/sec, 55 secs
lola: sara not yet started (preprocessing) || 6876502 markings, 12149110 edges, 105027 markings/sec, 60 secs
lola: sara not yet started (preprocessing) || 7395265 markings, 13033447 edges, 103753 markings/sec, 65 secs
lola: sara not yet started (preprocessing) || 7891382 markings, 13976723 edges, 99223 markings/sec, 70 secs
lola: sara not yet started (preprocessing) || 8396199 markings, 14857432 edges, 100963 markings/sec, 75 secs
lola: sara not yet started (preprocessing) || 8891290 markings, 15795045 edges, 99018 markings/sec, 80 secs
lola: sara not yet started (preprocessing) || 9387960 markings, 16683197 edges, 99334 markings/sec, 85 secs
lola: sara not yet started (preprocessing) || 9875712 markings, 17559107 edges, 97550 markings/sec, 90 secs
lola: sara not yet started (preprocessing) || 10374414 markings, 18455105 edges, 99740 markings/sec, 95 secs
lola: sara not yet started (preprocessing) || 10868099 markings, 19384034 edges, 98737 markings/sec, 100 secs
lola: sara not yet started (preprocessing) || 11377423 markings, 20247939 edges, 101865 markings/sec, 105 secs
lola: sara not yet started (preprocessing) || 11883155 markings, 21167346 edges, 101146 markings/sec, 110 secs
lola: sara not yet started (preprocessing) || 12366144 markings, 22042973 edges, 96598 markings/sec, 115 secs
lola: sara not yet started (preprocessing) || 12830019 markings, 22870411 edges, 92775 markings/sec, 120 secs
lola: sara not yet started (preprocessing) || 13289639 markings, 23649470 edges, 91924 markings/sec, 125 secs
lola: sara not yet started (preprocessing) || 13765206 markings, 24517849 edges, 95113 markings/sec, 130 secs
lola: sara not yet started (preprocessing) || 14268769 markings, 25434440 edges, 100713 markings/sec, 135 secs
lola: sara not yet started (preprocessing) || 14783411 markings, 26345726 edges, 102928 markings/sec, 140 secs
lola: sara not yet started (preprocessing) || 15285171 markings, 27250957 edges, 100352 markings/sec, 145 secs
lola: sara not yet started (preprocessing) || 15784819 markings, 28159019 edges, 99930 markings/sec, 150 secs
lola: sara not yet started (preprocessing) || 16300508 markings, 29076891 edges, 103138 markings/sec, 155 secs
lola: sara not yet started (preprocessing) || 16817890 markings, 30011511 edges, 103476 markings/sec, 160 secs
lola: sara not yet started (preprocessing) || 17336568 markings, 30915329 edges, 103736 markings/sec, 165 secs
lola: sara not yet started (preprocessing) || 17850924 markings, 31852879 edges, 102871 markings/sec, 170 secs
lola: sara not yet started (preprocessing) || 18359620 markings, 32791583 edges, 101739 markings/sec, 175 secs
lola: sara not yet started (preprocessing) || 18866387 markings, 33696917 edges, 101353 markings/sec, 180 secs
lola: sara not yet started (preprocessing) || 19397259 markings, 34578157 edges, 106174 markings/sec, 185 secs
lola: sara not yet started (preprocessing) || 19908922 markings, 35508616 edges, 102333 markings/sec, 190 secs
lola: sara not yet started (preprocessing) || 20421687 markings, 36412948 edges, 102553 markings/sec, 195 secs
lola: sara not yet started (preprocessing) || 20929159 markings, 37331942 edges, 101494 markings/sec, 200 secs
lola: sara not yet started (preprocessing) || 21428690 markings, 38269482 edges, 99906 markings/sec, 205 secs
lola: sara not yet started (preprocessing) || 21937340 markings, 39159153 edges, 101730 markings/sec, 210 secs
lola: sara not yet started (preprocessing) || 22438214 markings, 40060645 edges, 100175 markings/sec, 215 secs
lola: sara not yet started (preprocessing) || 22931154 markings, 40965131 edges, 98588 markings/sec, 220 secs
lola: sara not yet started (preprocessing) || 23426088 markings, 41832393 edges, 98987 markings/sec, 225 secs
lola: sara not yet started (preprocessing) || 23915555 markings, 42737343 edges, 97893 markings/sec, 230 secs
lola: sara not yet started (preprocessing) || 24415937 markings, 43643983 edges, 100076 markings/sec, 235 secs
lola: sara not yet started (preprocessing) || 24923039 markings, 44544505 edges, 101420 markings/sec, 240 secs
lola: sara not yet started (preprocessing) || 25426536 markings, 45460626 edges, 100699 markings/sec, 245 secs
lola: sara not yet started (preprocessing) || 25937906 markings, 46373655 edges, 102274 markings/sec, 250 secs
lola: sara not yet started (preprocessing) || 26442668 markings, 47283567 edges, 100952 markings/sec, 255 secs
lola: sara not yet started (preprocessing) || 26938601 markings, 48180442 edges, 99187 markings/sec, 260 secs
lola: sara not yet started (preprocessing) || 27434550 markings, 49076853 edges, 99190 markings/sec, 265 secs
lola: sara not yet started (preprocessing) || 27944610 markings, 49960659 edges, 102012 markings/sec, 270 secs
lola: sara not yet started (preprocessing) || 28447159 markings, 50862705 edges, 100510 markings/sec, 275 secs
lola: sara not yet started (preprocessing) || 28953890 markings, 51763478 edges, 101346 markings/sec, 280 secs
lola: sara not yet started (preprocessing) || 29447430 markings, 52652399 edges, 98708 markings/sec, 285 secs
lola: sara not yet started (preprocessing) || 29927608 markings, 53537860 edges, 96036 markings/sec, 290 secs
lola: sara not yet started (preprocessing) || 30429592 markings, 54434552 edges, 100397 markings/sec, 295 secs
lola: sara not yet started (preprocessing) || 30922246 markings, 55281551 edges, 98531 markings/sec, 300 secs
lola: sara not yet started (preprocessing) || 31405150 markings, 56186802 edges, 96581 markings/sec, 305 secs
lola: sara not yet started (preprocessing) || 31900763 markings, 57085917 edges, 99123 markings/sec, 310 secs
lola: sara not yet started (preprocessing) || 32414321 markings, 57990364 edges, 102712 markings/sec, 315 secs
lola: sara not yet started (preprocessing) || 32919878 markings, 58887625 edges, 101111 markings/sec, 320 secs
lola: sara not yet started (preprocessing) || 33408050 markings, 59767071 edges, 97634 markings/sec, 325 secs
lola: sara not yet started (preprocessing) || 33898742 markings, 60666506 edges, 98138 markings/sec, 330 secs
lola: sara not yet started (preprocessing) || 34386990 markings, 61559804 edges, 97650 markings/sec, 335 secs
lola: sara not yet started (preprocessing) || 34878325 markings, 62439288 edges, 98267 markings/sec, 340 secs
lola: sara not yet started (preprocessing) || 35369026 markings, 63323073 edges, 98140 markings/sec, 345 secs
lola: sara not yet started (preprocessing) || 35849814 markings, 64189422 edges, 96158 markings/sec, 350 secs
lola: sara not yet started (preprocessing) || 36325381 markings, 65051687 edges, 95113 markings/sec, 355 secs
lola: sara not yet started (preprocessing) || 36770374 markings, 65852422 edges, 88999 markings/sec, 360 secs
lola: sara not yet started (preprocessing) || 37220653 markings, 66654035 edges, 90056 markings/sec, 365 secs
lola: sara not yet started (preprocessing) || 37662455 markings, 67467117 edges, 88360 markings/sec, 370 secs
lola: sara not yet started (preprocessing) || 38153438 markings, 68236345 edges, 98197 markings/sec, 375 secs
lola: sara not yet started (preprocessing) || 38617445 markings, 69079736 edges, 92801 markings/sec, 380 secs
lola: sara not yet started (preprocessing) || 39086571 markings, 69958558 edges, 93825 markings/sec, 385 secs
lola: sara not yet started (preprocessing) || 39554135 markings, 70811612 edges, 93513 markings/sec, 390 secs
lola: sara not yet started (preprocessing) || 40011057 markings, 71612109 edges, 91384 markings/sec, 395 secs
lola: sara not yet started (preprocessing) || 40460555 markings, 72448330 edges, 89900 markings/sec, 400 secs
lola: sara not yet started (preprocessing) || 40915730 markings, 73262965 edges, 91035 markings/sec, 405 secs
lola: sara not yet started (preprocessing) || 41386800 markings, 74110307 edges, 94214 markings/sec, 410 secs
lola: sara not yet started (preprocessing) || 41885337 markings, 74984792 edges, 99707 markings/sec, 415 secs
lola: sara not yet started (preprocessing) || 42399199 markings, 75823051 edges, 102772 markings/sec, 420 secs
lola: sara not yet started (preprocessing) || 42889131 markings, 76742606 edges, 97986 markings/sec, 425 secs
lola: sara not yet started (preprocessing) || 43337961 markings, 77594018 edges, 89766 markings/sec, 430 secs
lola: sara not yet started (preprocessing) || 43801643 markings, 78401528 edges, 92736 markings/sec, 435 secs
lola: sara not yet started (preprocessing) || 44242419 markings, 79239566 edges, 88155 markings/sec, 440 secs
lola: sara not yet started (preprocessing) || 44718280 markings, 80086701 edges, 95172 markings/sec, 445 secs
lola: sara not yet started (preprocessing) || 45169532 markings, 80857866 edges, 90250 markings/sec, 450 secs
lola: sara not yet started (preprocessing) || 45662071 markings, 81770972 edges, 98508 markings/sec, 455 secs
lola: sara not yet started (preprocessing) || 46152883 markings, 82691884 edges, 98162 markings/sec, 460 secs
lola: sara not yet started (preprocessing) || 46632797 markings, 83576074 edges, 95983 markings/sec, 465 secs
lola: sara not yet started (preprocessing) || 47131389 markings, 84473371 edges, 99718 markings/sec, 470 secs
lola: sara not yet started (preprocessing) || 47614938 markings, 85265654 edges, 96710 markings/sec, 475 secs
lola: sara not yet started (preprocessing) || 48047804 markings, 86078233 edges, 86573 markings/sec, 480 secs
lola: sara not yet started (preprocessing) || 48490202 markings, 86913379 edges, 88480 markings/sec, 485 secs
lola: sara not yet started (preprocessing) || 48926940 markings, 87752853 edges, 87348 markings/sec, 490 secs
lola: sara not yet started (preprocessing) || 49396840 markings, 88547165 edges, 93980 markings/sec, 495 secs
lola: sara not yet started (preprocessing) || 49842967 markings, 89389255 edges, 89225 markings/sec, 500 secs
lola: sara not yet started (preprocessing) || 50297178 markings, 90193151 edges, 90842 markings/sec, 505 secs
lola: sara not yet started (preprocessing) || 50760416 markings, 90971552 edges, 92648 markings/sec, 510 secs
lola: sara not yet started (preprocessing) || 51207821 markings, 91805836 edges, 89481 markings/sec, 515 secs
lola: sara not yet started (preprocessing) || 51718534 markings, 92709241 edges, 102143 markings/sec, 520 secs
lola: sara not yet started (preprocessing) || 52228964 markings, 93623288 edges, 102086 markings/sec, 525 secs
lola: sara not yet started (preprocessing) || 52729031 markings, 94525362 edges, 100013 markings/sec, 530 secs
lola: sara not yet started (preprocessing) || 53248592 markings, 95444060 edges, 103912 markings/sec, 535 secs
lola: sara not yet started (preprocessing) || 53756112 markings, 96360804 edges, 101504 markings/sec, 540 secs
lola: sara not yet started (preprocessing) || 54257116 markings, 97256172 edges, 100201 markings/sec, 545 secs
lola: sara not yet started (preprocessing) || 54762355 markings, 98178345 edges, 101048 markings/sec, 550 secs
lola: sara not yet started (preprocessing) || 55213871 markings, 98995648 edges, 90303 markings/sec, 555 secs
lola: sara not yet started (preprocessing) || 55658501 markings, 99815355 edges, 88926 markings/sec, 560 secs
lola: sara not yet started (preprocessing) || 56096395 markings, 100617604 edges, 87579 markings/sec, 565 secs
lola: sara not yet started (preprocessing) || 56535236 markings, 101386163 edges, 87768 markings/sec, 570 secs
lola: sara not yet started (preprocessing) || 56965820 markings, 102211242 edges, 86117 markings/sec, 575 secs
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lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is unreachable.
lola: 153612522 markings, 274984261 edges
lola: ========================================

FORMULA PermAdmissibility-PT-02-ReachabilityFireability-1 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 15 will run for 1641 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (G (((NOT FIREABLE(switch10_4_0) AND NOT FIREABLE(switch10_3_0) AND NOT FIREABLE(switch10_2_0) AND NOT FIREABLE(switch10_1_0) AND NOT FIREABLE(switch10_0_0) AND NOT FIREABLE(switch10_7_4) AND NOT FIREABLE(switch10_0_5) AND NOT FIREABLE(switch10_5_4) AND NOT FIREABLE(switch10_6_4) AND NOT FIREABLE(switch10_3_5) AND NOT FIREABLE(switch10_4_5) AND NOT FIREABLE(switch10_1_5) AND NOT FIREABLE(switch1... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: processed formula: A (G (((NOT FIREABLE(switch10_4_0) AND NOT FIREABLE(switch10_3_0) AND NOT FIREABLE(switch10_2_0) AND NOT FIREABLE(switch10_1_0) AND NOT FIREABLE(switch10_0_0) AND NOT FIREABLE(switch10_7_4) AND NOT FIREABLE(switch10_0_5) AND NOT FIREABLE(switch10_5_4) AND NOT FIREABLE(switch10_6_4) AND NOT FIREABLE(switch10_3_5) AND NOT FIREABLE(switch10_4_5) AND NOT FIREABLE(switch10_1_5) AND NOT FIREABLE(switch1... (shortened)
lola: processed formula length: 8427
lola: 2 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: formula 0: ((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch10_0_6) OR FIREABLE(switch10_5_5) OR FIREABLE(switch10_6_5) OR FIREABLE(switch10_3_6) OR FIREABLE(switch10_4_6) OR FIREABLE(switch10_1_6) OR FIREABLE(switch10_2_6) OR FIREABLE(switch10_0_7) OR FIREABLE(switch10_7_6) OR FIREABLE(switch10_6_6) OR FIREABLE(switch10_5_6) OR FIREABLE(switch10_4_7) OR FIREABLE(switch10_3_7) OR FIREABLE(switch10_2_7) OR FIREABLE(switch10_1_7) OR FIREABLE(switch10_7_7) OR FIREABLE(switch10_6_7) OR FIREABLE(switch10_5_7) OR FIREABLE(switch10_5_0) OR FIREABLE(switch10_6_0) OR FIREABLE(switch10_7_0) OR FIREABLE(switch10_0_1) OR FIREABLE(switch10_1_1) OR FIREABLE(switch10_2_1) OR FIREABLE(switch10_3_1) OR FIREABLE(switch10_4_1) OR FIREABLE(switch10_5_1) OR FIREABLE(switch10_6_1) OR FIREABLE(switch10_7_1) OR FIREABLE(switch10_0_2) OR FIREABLE(switch10_1_2) OR FIREABLE(switch10_2_2) OR FIREABLE(switch10_3_2) OR FIREABLE(switch10_4_2) OR FIREABLE(switch10_6_2) OR FIREABLE(switch10_5_2) OR FIREABLE(switch10_0_3) OR FIREABLE(switch10_7_2) OR FIREABLE(switch10_2_3) OR FIREABLE(switch10_1_3) OR FIREABLE(switch10_4_3) OR FIREABLE(switch10_3_3) OR FIREABLE(switch10_6_3) OR FIREABLE(switch10_5_3) OR FIREABLE(switch10_0_4) OR FIREABLE(switch10_7_3) OR FIREABLE(switch10_2_4) OR FIREABLE(switch10_1_4) OR FIREABLE(switch10_4_4) OR FIREABLE(switch10_3_4)) AND (FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7)) AND (FIREABLE(display2_6_0) OR FIREABLE(display2_5_0) OR FIREABLE(display2_0_1) OR FIREABLE(display2_7_0) OR FIREABLE(display2_2_1) OR FIREABLE(display2_1_1) OR FIREABLE(display2_4_1) OR FIREABLE(display2_3_1) OR FIREABLE(display2_6_1) OR FIREABLE(display2_5_1) OR FIREABLE(display2_0_2) OR FIREABLE(display2_7_1) OR FIREABLE(display2_2_2) OR FIREABLE(display2_1_2) OR FIREABLE(display2_4_2) OR FIREABLE(display2_3_2) OR FIREABLE(display2_0_0) OR FIREABLE(display2_1_0) OR FIREABLE(display2_2_0) OR FIREABLE(display2_3_0) OR FIREABLE(display2_4_0) OR FIREABLE(display2_4_5) OR FIREABLE(display2_3_5) OR FIREABLE(display2_2_5) OR FIREABLE(display2_1_5) OR FIREABLE(display2_0_5) OR FIREABLE(display2_7_4) OR FIREABLE(display2_6_4) OR FIREABLE(display2_5_4) OR FIREABLE(display2_4_6) OR FIREABLE(display2_3_6) OR FIREABLE(display2_2_6) OR FIREABLE(display2_1_6) OR FIREABLE(display2_0_6) OR FIREABLE(display2_7_5) OR FIREABLE(display2_6_5) OR FIREABLE(display2_5_5) OR FIREABLE(display2_3_3) OR FIREABLE(display2_4_3) OR FIREABLE(display2_1_3) OR FIREABLE(display2_2_3) OR FIREABLE(display2_7_2) OR FIREABLE(display2_0_3) OR FIREABLE(display2_5_2) OR FIREABLE(display2_6_2) OR FIREABLE(display2_3_4) OR FIREABLE(display2_4_4) OR FIREABLE(display2_1_4) OR FIREABLE(display2_2_4) OR FIREABLE(display2_7_3) OR FIREABLE(display2_0_4) OR FIREABLE(display2_5_3) OR FIREABLE(display2_6_3) OR FIREABLE(display2_1_7) OR FIREABLE(display2_2_7) OR FIREABLE(display2_3_7) OR FIREABLE(display2_4_7) OR FIREABLE(display2_5_6) OR FIREABLE(display2_6_6) OR FIREABLE(display2_7_6) OR FIREABLE(display2_0_7) OR FIREABLE(display2_5_7) OR FIREABLE(display2_6_7) OR FIREABLE(display2_7_7) OR FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FIREABLE(switch6_0_2) OR FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3)))
lola: state equation: Could not create input for sara: DNF too long or DEADLOCK predicate contained
lola: sara not yet started (preprocessing) || 380088 markings, 508144 edges, 76018 markings/sec, 0 secs
lola: sara not yet started (preprocessing) || 676275 markings, 1028148 edges, 59237 markings/sec, 5 secs
lola: sara not yet started (preprocessing) || 967497 markings, 1539864 edges, 58244 markings/sec, 10 secs
lola: sara not yet started (preprocessing) || 1268825 markings, 2041790 edges, 60266 markings/sec, 15 secs
lola: sara not yet started (preprocessing) || 1576674 markings, 2525775 edges, 61570 markings/sec, 20 secs
lola: sara not yet started (preprocessing) || 1858097 markings, 3018945 edges, 56285 markings/sec, 25 secs
lola: sara not yet started (preprocessing) || 2189024 markings, 3497782 edges, 66185 markings/sec, 30 secs
lola: sara not yet started (preprocessing) || 2456366 markings, 4012862 edges, 53468 markings/sec, 35 secs
lola: sara not yet started (preprocessing) || 2771598 markings, 4488605 edges, 63046 markings/sec, 40 secs
lola: sara not yet started (preprocessing) || 3036097 markings, 4972789 edges, 52900 markings/sec, 45 secs
lola: sara not yet started (preprocessing) || 3302333 markings, 5462192 edges, 53247 markings/sec, 50 secs
lola: sara not yet started (preprocessing) || 3602409 markings, 5956181 edges, 60015 markings/sec, 55 secs
lola: sara not yet started (preprocessing) || 3896088 markings, 6450613 edges, 58736 markings/sec, 60 secs
lola: sara not yet started (preprocessing) || 4175446 markings, 6943033 edges, 55872 markings/sec, 65 secs
lola: sara not yet started (preprocessing) || 4476303 markings, 7443849 edges, 60171 markings/sec, 70 secs
lola: sara not yet started (preprocessing) || 4778904 markings, 7945042 edges, 60520 markings/sec, 75 secs
lola: sara not yet started (preprocessing) || 5076742 markings, 8443497 edges, 59568 markings/sec, 80 secs
lola: sara not yet started (preprocessing) || 5371979 markings, 8940982 edges, 59047 markings/sec, 85 secs
lola: sara not yet started (preprocessing) || 5673350 markings, 9429741 edges, 60274 markings/sec, 90 secs
lola: sara not yet started (preprocessing) || 5973599 markings, 9908760 edges, 60050 markings/sec, 95 secs
lola: sara not yet started (preprocessing) || 6268195 markings, 10386722 edges, 58919 markings/sec, 100 secs
lola: sara not yet started (preprocessing) || 6573348 markings, 10876568 edges, 61031 markings/sec, 105 secs
lola: sara not yet started (preprocessing) || 6872288 markings, 11357773 edges, 59788 markings/sec, 110 secs
lola: sara not yet started (preprocessing) || 7183901 markings, 11848506 edges, 62323 markings/sec, 115 secs
lola: sara not yet started (preprocessing) || 7470064 markings, 12342926 edges, 57233 markings/sec, 120 secs
lola: sara not yet started (preprocessing) || 7759730 markings, 12831541 edges, 57933 markings/sec, 125 secs
lola: sara not yet started (preprocessing) || 8037109 markings, 13329269 edges, 55476 markings/sec, 130 secs
lola: sara not yet started (preprocessing) || 8326836 markings, 13810927 edges, 57945 markings/sec, 135 secs
lola: sara not yet started (preprocessing) || 8605767 markings, 14277228 edges, 55786 markings/sec, 140 secs
lola: sara not yet started (preprocessing) || 8880745 markings, 14727111 edges, 54996 markings/sec, 145 secs
lola: sara not yet started (preprocessing) || 9143923 markings, 15179451 edges, 52636 markings/sec, 150 secs
lola: sara not yet started (preprocessing) || 9416878 markings, 15639123 edges, 54591 markings/sec, 155 secs
lola: sara not yet started (preprocessing) || 9704305 markings, 16104868 edges, 57485 markings/sec, 160 secs
lola: sara not yet started (preprocessing) || 9977552 markings, 16574954 edges, 54649 markings/sec, 165 secs
lola: sara not yet started (preprocessing) || 10316655 markings, 17013414 edges, 67821 markings/sec, 170 secs
lola: sara not yet started (preprocessing) || 10592645 markings, 17485871 edges, 55198 markings/sec, 175 secs
lola: sara not yet started (preprocessing) || 10869048 markings, 17965145 edges, 55281 markings/sec, 180 secs
lola: sara not yet started (preprocessing) || 11141991 markings, 18442197 edges, 54589 markings/sec, 185 secs
lola: sara not yet started (preprocessing) || 11409061 markings, 18918499 edges, 53414 markings/sec, 190 secs
lola: sara not yet started (preprocessing) || 11743100 markings, 19359758 edges, 66808 markings/sec, 195 secs
lola: sara not yet started (preprocessing) || 12005468 markings, 19834351 edges, 52474 markings/sec, 200 secs
lola: sara not yet started (preprocessing) || 12262446 markings, 20303633 edges, 51396 markings/sec, 205 secs
lola: sara not yet started (preprocessing) || 12585833 markings, 20741034 edges, 64677 markings/sec, 210 secs
lola: sara not yet started (preprocessing) || 12854210 markings, 21220961 edges, 53675 markings/sec, 215 secs
lola: sara not yet started (preprocessing) || 13113090 markings, 21694390 edges, 51776 markings/sec, 220 secs
lola: sara not yet started (preprocessing) || 13428649 markings, 22138841 edges, 63112 markings/sec, 225 secs
lola: sara not yet started (preprocessing) || 13673215 markings, 22613633 edges, 48913 markings/sec, 230 secs
lola: sara not yet started (preprocessing) || 13968556 markings, 23082399 edges, 59068 markings/sec, 235 secs
lola: sara not yet started (preprocessing) || 14259170 markings, 23546259 edges, 58123 markings/sec, 240 secs
lola: sara not yet started (preprocessing) || 14543937 markings, 24013758 edges, 56953 markings/sec, 245 secs
lola: sara not yet started (preprocessing) || 14832012 markings, 24480062 edges, 57615 markings/sec, 250 secs
lola: sara not yet started (preprocessing) || 15124064 markings, 24953578 edges, 58410 markings/sec, 255 secs
lola: sara not yet started (preprocessing) || 15415681 markings, 25430888 edges, 58323 markings/sec, 260 secs
lola: sara not yet started (preprocessing) || 15713453 markings, 25909298 edges, 59554 markings/sec, 265 secs
lola: sara not yet started (preprocessing) || 16004636 markings, 26383389 edges, 58237 markings/sec, 270 secs
lola: sara not yet started (preprocessing) || 16309651 markings, 26859503 edges, 61003 markings/sec, 275 secs
lola: sara not yet started (preprocessing) || 16591665 markings, 27339691 edges, 56403 markings/sec, 280 secs
lola: sara not yet started (preprocessing) || 16882745 markings, 27804065 edges, 58216 markings/sec, 285 secs
lola: sara not yet started (preprocessing) || 17170548 markings, 28274890 edges, 57561 markings/sec, 290 secs
lola: sara not yet started (preprocessing) || 17446942 markings, 28753805 edges, 55279 markings/sec, 295 secs
lola: sara not yet started (preprocessing) || 17759618 markings, 29238160 edges, 62535 markings/sec, 300 secs
lola: sara not yet started (preprocessing) || 18046889 markings, 29752271 edges, 57454 markings/sec, 305 secs
lola: sara not yet started (preprocessing) || 18348192 markings, 30251623 edges, 60261 markings/sec, 310 secs
lola: sara not yet started (preprocessing) || 18626312 markings, 30741601 edges, 55624 markings/sec, 315 secs
lola: sara not yet started (preprocessing) || 18894200 markings, 31258081 edges, 53578 markings/sec, 320 secs
lola: sara not yet started (preprocessing) || 19192683 markings, 31760709 edges, 59697 markings/sec, 325 secs
lola: sara not yet started (preprocessing) || 19469944 markings, 32278674 edges, 55452 markings/sec, 330 secs
lola: sara not yet started (preprocessing) || 19766515 markings, 32781729 edges, 59314 markings/sec, 335 secs
lola: sara not yet started (preprocessing) || 20049857 markings, 33283642 edges, 56668 markings/sec, 340 secs
lola: sara not yet started (preprocessing) || 20338346 markings, 33775079 edges, 57698 markings/sec, 345 secs
lola: sara not yet started (preprocessing) || 20598777 markings, 34209035 edges, 52086 markings/sec, 350 secs
lola: sara not yet started (preprocessing) || 20855985 markings, 34639412 edges, 51442 markings/sec, 355 secs
lola: sara not yet started (preprocessing) || 21106821 markings, 35071621 edges, 50167 markings/sec, 360 secs
lola: sara not yet started (preprocessing) || 21374761 markings, 35538338 edges, 53588 markings/sec, 365 secs
lola: sara not yet started (preprocessing) || 21649923 markings, 35990625 edges, 55032 markings/sec, 370 secs
lola: sara not yet started (preprocessing) || 21932048 markings, 36447339 edges, 56425 markings/sec, 375 secs
lola: sara not yet started (preprocessing) || 22189552 markings, 36901966 edges, 51501 markings/sec, 380 secs
lola: sara not yet started (preprocessing) || 22485130 markings, 37339917 edges, 59116 markings/sec, 385 secs
lola: sara not yet started (preprocessing) || 22740872 markings, 37804823 edges, 51148 markings/sec, 390 secs
lola: sara not yet started (preprocessing) || 23016532 markings, 38244053 edges, 55132 markings/sec, 395 secs
lola: sara not yet started (preprocessing) || 23276234 markings, 38714304 edges, 51940 markings/sec, 400 secs
lola: sara not yet started (preprocessing) || 23556910 markings, 39169100 edges, 56135 markings/sec, 405 secs
lola: sara not yet started (preprocessing) || 23809314 markings, 39642566 edges, 50481 markings/sec, 410 secs
lola: sara not yet started (preprocessing) || 24073181 markings, 40087601 edges, 52773 markings/sec, 415 secs
lola: sara not yet started (preprocessing) || 24336952 markings, 40537602 edges, 52754 markings/sec, 420 secs
lola: sara not yet started (preprocessing) || 24604574 markings, 40999520 edges, 53524 markings/sec, 425 secs
lola: sara not yet started (preprocessing) || 24892020 markings, 41481976 edges, 57489 markings/sec, 430 secs
lola: sara not yet started (preprocessing) || 25170905 markings, 41938084 edges, 55777 markings/sec, 435 secs
lola: sara not yet started (preprocessing) || 25453498 markings, 42401987 edges, 56519 markings/sec, 440 secs
lola: sara not yet started (preprocessing) || 25744926 markings, 42883361 edges, 58286 markings/sec, 445 secs
lola: sara not yet started (preprocessing) || 26025603 markings, 43345775 edges, 56135 markings/sec, 450 secs
lola: sara not yet started (preprocessing) || 26286829 markings, 43777934 edges, 52245 markings/sec, 455 secs
lola: sara not yet started (preprocessing) || 26544381 markings, 44184264 edges, 51510 markings/sec, 460 secs
lola: sara not yet started (preprocessing) || 26799382 markings, 44588006 edges, 51000 markings/sec, 465 secs
lola: sara not yet started (preprocessing) || 27042397 markings, 44989150 edges, 48603 markings/sec, 470 secs
lola: sara not yet started (preprocessing) || 27291355 markings, 45403179 edges, 49792 markings/sec, 475 secs
lola: sara not yet started (preprocessing) || 27554220 markings, 45846268 edges, 52573 markings/sec, 480 secs
lola: sara not yet started (preprocessing) || 27815033 markings, 46263139 edges, 52163 markings/sec, 485 secs
lola: sara not yet started (preprocessing) || 28061993 markings, 46677553 edges, 49392 markings/sec, 490 secs
lola: sara not yet started (preprocessing) || 28314753 markings, 47094231 edges, 50552 markings/sec, 495 secs
lola: sara not yet started (preprocessing) || 28566677 markings, 47506796 edges, 50385 markings/sec, 500 secs
lola: sara not yet started (preprocessing) || 28818606 markings, 47919816 edges, 50386 markings/sec, 505 secs
lola: sara not yet started (preprocessing) || 29075065 markings, 48352947 edges, 51292 markings/sec, 510 secs
lola: sara not yet started (preprocessing) || 29366697 markings, 48845505 edges, 58326 markings/sec, 515 secs
lola: sara not yet started (preprocessing) || 29648134 markings, 49315618 edges, 56287 markings/sec, 520 secs
lola: sara not yet started (preprocessing) || 29941939 markings, 49786319 edges, 58761 markings/sec, 525 secs
lola: sara not yet started (preprocessing) || 30218522 markings, 50246312 edges, 55317 markings/sec, 530 secs
lola: sara not yet started (preprocessing) || 30499463 markings, 50714175 edges, 56188 markings/sec, 535 secs
lola: sara not yet started (preprocessing) || 30774771 markings, 51175869 edges, 55062 markings/sec, 540 secs
lola: sara not yet started (preprocessing) || 31051812 markings, 51643001 edges, 55408 markings/sec, 545 secs
lola: sara not yet started (preprocessing) || 31325619 markings, 52132020 edges, 54761 markings/sec, 550 secs
lola: sara not yet started (preprocessing) || 31569454 markings, 52577914 edges, 48767 markings/sec, 555 secs
lola: sara not yet started (preprocessing) || 31828736 markings, 53040899 edges, 51856 markings/sec, 560 secs
lola: sara not yet started (preprocessing) || 32088215 markings, 53534928 edges, 51896 markings/sec, 565 secs
lola: sara not yet started (preprocessing) || 32348590 markings, 54011878 edges, 52075 markings/sec, 570 secs
lola: sara not yet started (preprocessing) || 32619839 markings, 54477812 edges, 54250 markings/sec, 575 secs
lola: sara not yet started (preprocessing) || 32884453 markings, 54934701 edges, 52923 markings/sec, 580 secs
lola: sara not yet started (preprocessing) || 33114920 markings, 55349441 edges, 46093 markings/sec, 585 secs
lola: sara not yet started (preprocessing) || 33348829 markings, 55771405 edges, 46782 markings/sec, 590 secs
lola: sara not yet started (preprocessing) || 33613420 markings, 56207716 edges, 52918 markings/sec, 595 secs
lola: sara not yet started (preprocessing) || 33868445 markings, 56635518 edges, 51005 markings/sec, 600 secs
lola: sara not yet started (preprocessing) || 34136056 markings, 57075568 edges, 53522 markings/sec, 605 secs
lola: sara not yet started (preprocessing) || 34400001 markings, 57514090 edges, 52789 markings/sec, 610 secs
lola: sara not yet started (preprocessing) || 34654736 markings, 57927551 edges, 50947 markings/sec, 615 secs
lola: sara not yet started (preprocessing) || 34919597 markings, 58364894 edges, 52972 markings/sec, 620 secs
lola: sara not yet started (preprocessing) || 35182977 markings, 58787500 edges, 52676 markings/sec, 625 secs
lola: sara not yet started (preprocessing) || 35445677 markings, 59203073 edges, 52540 markings/sec, 630 secs
lola: sara not yet started (preprocessing) || 35702872 markings, 59624986 edges, 51439 markings/sec, 635 secs
lola: sara not yet started (preprocessing) || 35980043 markings, 60104125 edges, 55434 markings/sec, 640 secs
lola: sara not yet started (preprocessing) || 36272855 markings, 60567252 edges, 58562 markings/sec, 645 secs
lola: sara not yet started (preprocessing) || 36559968 markings, 61041522 edges, 57423 markings/sec, 650 secs
lola: sara not yet started (preprocessing) || 36846033 markings, 61508888 edges, 57213 markings/sec, 655 secs
lola: sara not yet started (preprocessing) || 37141513 markings, 61993965 edges, 59096 markings/sec, 660 secs
lola: sara not yet started (preprocessing) || 37429036 markings, 62488066 edges, 57505 markings/sec, 665 secs
lola: sara not yet started (preprocessing) || 37717145 markings, 62967259 edges, 57622 markings/sec, 670 secs
lola: sara not yet started (preprocessing) || 38010550 markings, 63452168 edges, 58681 markings/sec, 675 secs
lola: sara not yet started (preprocessing) || 38295841 markings, 63927957 edges, 57058 markings/sec, 680 secs
lola: sara not yet started (preprocessing) || 38584458 markings, 64400039 edges, 57723 markings/sec, 685 secs
lola: sara not yet started (preprocessing) || 38871473 markings, 64870140 edges, 57403 markings/sec, 690 secs
lola: sara not yet started (preprocessing) || 39174682 markings, 65366106 edges, 60642 markings/sec, 695 secs
lola: sara not yet started (preprocessing) || 39465201 markings, 65830091 edges, 58104 markings/sec, 700 secs
lola: sara not yet started (preprocessing) || 39743697 markings, 66311252 edges, 55699 markings/sec, 705 secs
lola: sara not yet started (preprocessing) || 40034176 markings, 66799320 edges, 58096 markings/sec, 710 secs
lola: sara not yet started (preprocessing) || 40341247 markings, 67318316 edges, 61414 markings/sec, 715 secs
lola: sara not yet started (preprocessing) || 40643445 markings, 67820977 edges, 60440 markings/sec, 720 secs
lola: sara not yet started (preprocessing) || 40930743 markings, 68283952 edges, 57460 markings/sec, 725 secs
lola: sara not yet started (preprocessing) || 41216706 markings, 68755913 edges, 57193 markings/sec, 730 secs
lola: sara not yet started (preprocessing) || 41511380 markings, 69248124 edges, 58935 markings/sec, 735 secs
lola: sara not yet started (preprocessing) || 41795909 markings, 69720828 edges, 56906 markings/sec, 740 secs
lola: sara not yet started (preprocessing) || 42085177 markings, 70190552 edges, 57854 markings/sec, 745 secs
lola: sara not yet started (preprocessing) || 42357855 markings, 70633380 edges, 54536 markings/sec, 750 secs
lola: sara not yet started (preprocessing) || 42632749 markings, 71082719 edges, 54979 markings/sec, 755 secs
lola: sara not yet started (preprocessing) || 42923281 markings, 71549531 edges, 58106 markings/sec, 760 secs
lola: sara not yet started (preprocessing) || 43212548 markings, 72026808 edges, 57853 markings/sec, 765 secs
lola: sara not yet started (preprocessing) || 43489317 markings, 72499138 edges, 55354 markings/sec, 770 secs
lola: sara not yet started (preprocessing) || 43763238 markings, 72950194 edges, 54784 markings/sec, 775 secs
lola: sara not yet started (preprocessing) || 44018169 markings, 73379625 edges, 50986 markings/sec, 780 secs
lola: sara not yet started (preprocessing) || 44260181 markings, 73781039 edges, 48402 markings/sec, 785 secs
lola: sara not yet started (preprocessing) || 44520471 markings, 74208774 edges, 52058 markings/sec, 790 secs
lola: sara not yet started (preprocessing) || 44757194 markings, 74602735 edges, 47345 markings/sec, 795 secs
lola: sara not yet started (preprocessing) || 44998064 markings, 75018630 edges, 48174 markings/sec, 800 secs
lola: sara not yet started (preprocessing) || 45249131 markings, 75441286 edges, 50213 markings/sec, 805 secs
lola: sara not yet started (preprocessing) || 45508708 markings, 75865716 edges, 51915 markings/sec, 810 secs
lola: sara not yet started (preprocessing) || 45749859 markings, 76272462 edges, 48230 markings/sec, 815 secs
lola: sara not yet started (preprocessing) || 45993277 markings, 76681039 edges, 48684 markings/sec, 820 secs
lola: sara not yet started (preprocessing) || 46254422 markings, 77107881 edges, 52229 markings/sec, 825 secs
lola: sara not yet started (preprocessing) || 46500732 markings, 77535171 edges, 49262 markings/sec, 830 secs
lola: sara not yet started (preprocessing) || 46750130 markings, 77960392 edges, 49880 markings/sec, 835 secs
lola: sara not yet started (preprocessing) || 47008989 markings, 78400036 edges, 51772 markings/sec, 840 secs
lola: sara not yet started (preprocessing) || 47268747 markings, 78850624 edges, 51952 markings/sec, 845 secs
lola: sara not yet started (preprocessing) || 47549449 markings, 79311937 edges, 56140 markings/sec, 850 secs
lola: sara not yet started (preprocessing) || 47829570 markings, 79786037 edges, 56024 markings/sec, 855 secs
lola: sara not yet started (preprocessing) || 48107554 markings, 80244786 edges, 55597 markings/sec, 860 secs
lola: sara not yet started (preprocessing) || 48388147 markings, 80707398 edges, 56119 markings/sec, 865 secs
lola: sara not yet started (preprocessing) || 48665857 markings, 81179008 edges, 55542 markings/sec, 870 secs
lola: sara not yet started (preprocessing) || 48947990 markings, 81642513 edges, 56427 markings/sec, 875 secs
lola: sara not yet started (preprocessing) || 49224365 markings, 82111268 edges, 55275 markings/sec, 880 secs
lola: sara not yet started (preprocessing) || 49500055 markings, 82559754 edges, 55138 markings/sec, 885 secs
lola: sara not yet started (preprocessing) || 49772901 markings, 83006513 edges, 54569 markings/sec, 890 secs
lola: sara not yet started (preprocessing) || 50042228 markings, 83448733 edges, 53865 markings/sec, 895 secs
lola: sara not yet started (preprocessing) || 50320798 markings, 83901750 edges, 55714 markings/sec, 900 secs
lola: sara not yet started (preprocessing) || 50593818 markings, 84354163 edges, 54604 markings/sec, 905 secs
lola: sara not yet started (preprocessing) || 50878269 markings, 84816201 edges, 56890 markings/sec, 910 secs
lola: sara not yet started (preprocessing) || 51170734 markings, 85324727 edges, 58493 markings/sec, 915 secs
lola: sara not yet started (preprocessing) || 51453262 markings, 85793921 edges, 56506 markings/sec, 920 secs
lola: sara not yet started (preprocessing) || 51727950 markings, 86258507 edges, 54938 markings/sec, 925 secs
lola: sara not yet started (preprocessing) || 52017876 markings, 86736149 edges, 57985 markings/sec, 930 secs
lola: sara not yet started (preprocessing) || 52287080 markings, 87211949 edges, 53841 markings/sec, 935 secs
lola: sara not yet started (preprocessing) || 52538746 markings, 87625301 edges, 50333 markings/sec, 940 secs
lola: sara not yet started (preprocessing) || 52780088 markings, 88028284 edges, 48268 markings/sec, 945 secs
lola: sara not yet started (preprocessing) || 53042262 markings, 88459723 edges, 52435 markings/sec, 950 secs
lola: sara not yet started (preprocessing) || 53317991 markings, 88918004 edges, 55146 markings/sec, 955 secs
lola: sara not yet started (preprocessing) || 53571416 markings, 89336597 edges, 50685 markings/sec, 960 secs
lola: sara not yet started (preprocessing) || 53806480 markings, 89738455 edges, 47013 markings/sec, 965 secs
lola: sara not yet started (preprocessing) || 54050381 markings, 90142575 edges, 48780 markings/sec, 970 secs
lola: sara not yet started (preprocessing) || 54319706 markings, 90590829 edges, 53865 markings/sec, 975 secs
lola: sara not yet started (preprocessing) || 54600611 markings, 91070853 edges, 56181 markings/sec, 980 secs
lola: sara not yet started (preprocessing) || 54878587 markings, 91539262 edges, 55595 markings/sec, 985 secs
lola: sara not yet started (preprocessing) || 55154982 markings, 91999199 edges, 55279 markings/sec, 990 secs
lola: sara not yet started (preprocessing) || 55437960 markings, 92472007 edges, 56596 markings/sec, 995 secs
lola: sara not yet started (preprocessing) || 55719411 markings, 92934973 edges, 56290 markings/sec, 1000 secs
lola: sara not yet started (preprocessing) || 55999670 markings, 93388919 edges, 56052 markings/sec, 1005 secs
lola: sara not yet started (preprocessing) || 56269923 markings, 93838265 edges, 54051 markings/sec, 1010 secs
lola: sara not yet started (preprocessing) || 56544212 markings, 94293501 edges, 54858 markings/sec, 1015 secs
lola: sara not yet started (preprocessing) || 56821571 markings, 94746159 edges, 55472 markings/sec, 1020 secs
lola: sara not yet started (preprocessing) || 57071753 markings, 95210860 edges, 50036 markings/sec, 1025 secs
lola: sara not yet started (preprocessing) || 57309073 markings, 95649371 edges, 47464 markings/sec, 1030 secs
lola: sara not yet started (preprocessing) || 57532652 markings, 96071078 edges, 44716 markings/sec, 1035 secs
lola: sara not yet started (preprocessing) || 57757439 markings, 96497731 edges, 44957 markings/sec, 1040 secs
lola: sara not yet started (preprocessing) || 57995296 markings, 96907072 edges, 47571 markings/sec, 1045 secs
lola: sara not yet started (preprocessing) || 58217208 markings, 97321135 edges, 44382 markings/sec, 1050 secs
lola: sara not yet started (preprocessing) || 58440868 markings, 97730759 edges, 44732 markings/sec, 1055 secs
lola: sara not yet started (preprocessing) || 58661040 markings, 98143962 edges, 44034 markings/sec, 1060 secs
lola: sara not yet started (preprocessing) || 58943787 markings, 98616533 edges, 56549 markings/sec, 1065 secs
lola: sara not yet started (preprocessing) || 59226036 markings, 99087927 edges, 56450 markings/sec, 1070 secs
lola: sara not yet started (preprocessing) || 59505012 markings, 99557044 edges, 55795 markings/sec, 1075 secs
lola: sara not yet started (preprocessing) || 59787307 markings, 100037756 edges, 56459 markings/sec, 1080 secs
lola: sara not yet started (preprocessing) || 60079760 markings, 100529100 edges, 58491 markings/sec, 1085 secs
lola: sara not yet started (preprocessing) || 60362746 markings, 101014647 edges, 56597 markings/sec, 1090 secs
lola: sara not yet started (preprocessing) || 60659437 markings, 101520173 edges, 59338 markings/sec, 1095 secs
lola: sara not yet started (preprocessing) || 60954962 markings, 102013346 edges, 59105 markings/sec, 1100 secs
lola: sara not yet started (preprocessing) || 61232569 markings, 102480318 edges, 55521 markings/sec, 1105 secs
lola: sara not yet started (preprocessing) || 61497205 markings, 102939801 edges, 52927 markings/sec, 1110 secs
lola: sara not yet started (preprocessing) || 61780210 markings, 103428331 edges, 56601 markings/sec, 1115 secs
lola: sara not yet started (preprocessing) || 62051901 markings, 103887675 edges, 54338 markings/sec, 1120 secs
lola: sara not yet started (preprocessing) || 62313364 markings, 104329134 edges, 52293 markings/sec, 1125 secs
lola: sara not yet started (preprocessing) || 62591118 markings, 104799250 edges, 55551 markings/sec, 1130 secs
lola: sara not yet started (preprocessing) || 62837423 markings, 105228402 edges, 49261 markings/sec, 1135 secs
lola: sara not yet started (preprocessing) || 63081938 markings, 105634305 edges, 48903 markings/sec, 1140 secs
lola: sara not yet started (preprocessing) || 63316973 markings, 106029688 edges, 47007 markings/sec, 1145 secs
lola: sara not yet started (preprocessing) || 63557206 markings, 106423525 edges, 48047 markings/sec, 1150 secs
lola: sara not yet started (preprocessing) || 63814199 markings, 106854684 edges, 51399 markings/sec, 1155 secs
lola: sara not yet started (preprocessing) || 64086780 markings, 107311336 edges, 54516 markings/sec, 1160 secs
lola: sara not yet started (preprocessing) || 64358674 markings, 107761234 edges, 54379 markings/sec, 1165 secs
lola: sara not yet started (preprocessing) || 64632741 markings, 108222947 edges, 54813 markings/sec, 1170 secs
lola: sara not yet started (preprocessing) || 64912356 markings, 108683284 edges, 55923 markings/sec, 1175 secs
lola: sara not yet started (preprocessing) || 65191027 markings, 109151706 edges, 55734 markings/sec, 1180 secs
lola: sara not yet started (preprocessing) || 65469760 markings, 109628431 edges, 55747 markings/sec, 1185 secs
lola: sara not yet started (preprocessing) || 65741401 markings, 110098262 edges, 54328 markings/sec, 1190 secs
lola: sara not yet started (preprocessing) || 66022132 markings, 110578336 edges, 56146 markings/sec, 1195 secs
lola: sara not yet started (preprocessing) || 66300180 markings, 111043358 edges, 55610 markings/sec, 1200 secs
lola: sara not yet started (preprocessing) || 66579577 markings, 111526707 edges, 55879 markings/sec, 1205 secs
lola: sara not yet started (preprocessing) || 66857217 markings, 112001882 edges, 55528 markings/sec, 1210 secs
lola: sara not yet started (preprocessing) || 67196879 markings, 112566516 edges, 67932 markings/sec, 1215 secs
lola: sara not yet started (preprocessing) || 67507068 markings, 113037882 edges, 62038 markings/sec, 1220 secs
lola: sara not yet started (preprocessing) || 67781323 markings, 113525555 edges, 54851 markings/sec, 1225 secs
lola: sara not yet started (preprocessing) || 68055062 markings, 114010545 edges, 54748 markings/sec, 1230 secs
lola: sara not yet started (preprocessing) || 68367747 markings, 114484070 edges, 62537 markings/sec, 1235 secs
lola: sara not yet started (preprocessing) || 68648793 markings, 114976588 edges, 56209 markings/sec, 1240 secs
lola: sara not yet started (preprocessing) || 68921018 markings, 115461236 edges, 54445 markings/sec, 1245 secs
lola: sara not yet started (preprocessing) || 69238467 markings, 115933533 edges, 63490 markings/sec, 1250 secs
lola: sara not yet started (preprocessing) || 69507663 markings, 116429549 edges, 53839 markings/sec, 1255 secs
lola: sara not yet started (preprocessing) || 69786287 markings, 116912146 edges, 55725 markings/sec, 1260 secs
lola: sara not yet started (preprocessing) || 70076349 markings, 117367727 edges, 58012 markings/sec, 1265 secs
lola: sara not yet started (preprocessing) || 70323881 markings, 117846725 edges, 49506 markings/sec, 1270 secs
lola: sara not yet started (preprocessing) || 70602310 markings, 118307445 edges, 55686 markings/sec, 1275 secs
lola: sara not yet started (preprocessing) || 70870516 markings, 118749420 edges, 53641 markings/sec, 1280 secs
lola: sara not yet started (preprocessing) || 71149087 markings, 119214568 edges, 55714 markings/sec, 1285 secs
lola: sara not yet started (preprocessing) || 71428609 markings, 119681976 edges, 55904 markings/sec, 1290 secs
lola: sara not yet started (preprocessing) || 71717185 markings, 120164229 edges, 57715 markings/sec, 1295 secs
lola: sara not yet started (preprocessing) || 72000526 markings, 120641011 edges, 56668 markings/sec, 1300 secs
lola: sara not yet started (preprocessing) || 72282882 markings, 121107073 edges, 56471 markings/sec, 1305 secs
lola: sara not yet started (preprocessing) || 72563181 markings, 121586857 edges, 56060 markings/sec, 1310 secs
lola: sara not yet started (preprocessing) || 72837744 markings, 122044627 edges, 54913 markings/sec, 1315 secs
lola: sara not yet started (preprocessing) || 73092367 markings, 122464577 edges, 50925 markings/sec, 1320 secs
lola: sara not yet started (preprocessing) || 73365700 markings, 122902983 edges, 54667 markings/sec, 1325 secs
lola: sara not yet started (preprocessing) || 73612555 markings, 123322955 edges, 49371 markings/sec, 1330 secs
lola: sara not yet started (preprocessing) || 73871337 markings, 123745020 edges, 51756 markings/sec, 1335 secs
lola: sara not yet started (preprocessing) || 74156974 markings, 124186181 edges, 57127 markings/sec, 1340 secs
lola: sara not yet started (preprocessing) || 74426666 markings, 124657157 edges, 53938 markings/sec, 1345 secs
lola: sara not yet started (preprocessing) || 74706636 markings, 125129740 edges, 55994 markings/sec, 1350 secs
lola: sara not yet started (preprocessing) || 74955174 markings, 125566248 edges, 49708 markings/sec, 1355 secs
lola: sara not yet started (preprocessing) || 75200774 markings, 125991085 edges, 49120 markings/sec, 1360 secs
lola: sara not yet started (preprocessing) || 75444234 markings, 126404425 edges, 48692 markings/sec, 1365 secs
lola: sara not yet started (preprocessing) || 75700408 markings, 126831287 edges, 51235 markings/sec, 1370 secs
lola: sara not yet started (preprocessing) || 75964820 markings, 127290544 edges, 52882 markings/sec, 1375 secs
lola: sara not yet started (preprocessing) || 76231709 markings, 127745475 edges, 53378 markings/sec, 1380 secs
lola: sara not yet started (preprocessing) || 76507295 markings, 128212192 edges, 55117 markings/sec, 1385 secs
lola: sara not yet started (preprocessing) || 76786690 markings, 128681759 edges, 55879 markings/sec, 1390 secs
lola: sara not yet started (preprocessing) || 77070276 markings, 129156108 edges, 56717 markings/sec, 1395 secs
lola: sara not yet started (preprocessing) || 77390512 markings, 129596179 edges, 64047 markings/sec, 1400 secs
lola: sara not yet started (preprocessing) || 77658957 markings, 130064475 edges, 53689 markings/sec, 1405 secs
lola: sara not yet started (preprocessing) || 77920671 markings, 130533287 edges, 52343 markings/sec, 1410 secs
lola: sara not yet started (preprocessing) || 78173080 markings, 131003147 edges, 50482 markings/sec, 1415 secs
lola: sara not yet started (preprocessing) || 78491846 markings, 131433889 edges, 63753 markings/sec, 1420 secs
lola: sara not yet started (preprocessing) || 78741109 markings, 131884530 edges, 49853 markings/sec, 1425 secs
lola: sara not yet started (preprocessing) || 78981397 markings, 132329762 edges, 48058 markings/sec, 1430 secs
lola: sara not yet started (preprocessing) || 79286446 markings, 132757763 edges, 61010 markings/sec, 1435 secs
lola: sara not yet started (preprocessing) || 79548150 markings, 133227730 edges, 52341 markings/sec, 1440 secs
lola: sara not yet started (preprocessing) || 79822896 markings, 133686238 edges, 54949 markings/sec, 1445 secs
lola: sara not yet started (preprocessing) || 80081870 markings, 134139104 edges, 51795 markings/sec, 1450 secs
lola: sara not yet started (preprocessing) || 80353967 markings, 134602980 edges, 54419 markings/sec, 1455 secs
lola: sara not yet started (preprocessing) || 80630907 markings, 135065268 edges, 55388 markings/sec, 1460 secs
lola: sara not yet started (preprocessing) || 80903594 markings, 135524506 edges, 54537 markings/sec, 1465 secs
lola: sara not yet started (preprocessing) || 81166848 markings, 135987946 edges, 52651 markings/sec, 1470 secs
lola: sara not yet started (preprocessing) || 81449487 markings, 136460131 edges, 56528 markings/sec, 1475 secs
lola: sara not yet started (preprocessing) || 81718620 markings, 136904023 edges, 53827 markings/sec, 1480 secs
lola: sara not yet started (preprocessing) || 81988904 markings, 137351619 edges, 54057 markings/sec, 1485 secs
lola: sara not yet started (preprocessing) || 82262228 markings, 137816813 edges, 54665 markings/sec, 1490 secs
lola: sara not yet started (preprocessing) || 82549839 markings, 138287113 edges, 57522 markings/sec, 1495 secs
lola: sara not yet started (preprocessing) || 82819279 markings, 138733104 edges, 53888 markings/sec, 1500 secs
lola: sara not yet started (preprocessing) || 83076976 markings, 139184440 edges, 51539 markings/sec, 1505 secs
lola: sara not yet started (preprocessing) || 83341250 markings, 139655541 edges, 52855 markings/sec, 1510 secs
lola: sara not yet started (preprocessing) || 83648477 markings, 140152331 edges, 61445 markings/sec, 1515 secs
lola: sara not yet started (preprocessing) || 83898145 markings, 140601842 edges, 49934 markings/sec, 1520 secs
lola: sara not yet started (preprocessing) || 84163039 markings, 141022830 edges, 52979 markings/sec, 1525 secs
lola: sara not yet started (preprocessing) || 84392727 markings, 141449169 edges, 45938 markings/sec, 1530 secs
lola: sara not yet started (preprocessing) || 84650084 markings, 141870470 edges, 51471 markings/sec, 1535 secs
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lola: sara not yet started (preprocessing) || 85185240 markings, 142829623 edges, 56180 markings/sec, 1545 secs
lola: sara not yet started (preprocessing) || 85448189 markings, 143319693 edges, 52590 markings/sec, 1550 secs
lola: sara not yet started (preprocessing) || 85721010 markings, 143788862 edges, 54564 markings/sec, 1555 secs
lola: sara not yet started (preprocessing) || 85986691 markings, 144265204 edges, 53136 markings/sec, 1560 secs
lola: sara not yet started (preprocessing) || 86259202 markings, 144732792 edges, 54502 markings/sec, 1565 secs
lola: sara not yet started (preprocessing) || 86524631 markings, 145188357 edges, 53086 markings/sec, 1570 secs
lola: sara not yet started (preprocessing) || 86788676 markings, 145647897 edges, 52809 markings/sec, 1575 secs
lola: sara not yet started (preprocessing) || 87036812 markings, 146088739 edges, 49627 markings/sec, 1580 secs
lola: sara not yet started (preprocessing) || 87296609 markings, 146556176 edges, 51959 markings/sec, 1585 secs
lola: sara not yet started (preprocessing) || 87595804 markings, 147015028 edges, 59839 markings/sec, 1590 secs
lola: sara not yet started (preprocessing) || 87851936 markings, 147476732 edges, 51226 markings/sec, 1595 secs
lola: sara not yet started (preprocessing) || 88137385 markings, 147933768 edges, 57090 markings/sec, 1600 secs
lola: sara not yet started (preprocessing) || 88397181 markings, 148403924 edges, 51959 markings/sec, 1605 secs
lola: sara not yet started (preprocessing) || 88647846 markings, 148885719 edges, 50133 markings/sec, 1610 secs
lola: sara not yet started (preprocessing) || 88918144 markings, 149368812 edges, 54060 markings/sec, 1615 secs
lola: sara not yet started (preprocessing) || 89182462 markings, 149843465 edges, 52864 markings/sec, 1620 secs
lola: sara not yet started (preprocessing) || 89464646 markings, 150323730 edges, 56437 markings/sec, 1625 secs
lola: sara not yet started (preprocessing) || 89733975 markings, 150787841 edges, 53866 markings/sec, 1630 secs
lola: sara not yet started (preprocessing) || 90014703 markings, 151276638 edges, 56146 markings/sec, 1635 secs
lola: local time limit reached - aborting
lola:
preliminary result: yes no unknown yes no yes no no unknown yes yes no yes yes yes no
lola: memory consumption: 3678536 KB
lola: time consumption: 3570 seconds
lola: Child process aborted or communication problem between parent and child process
lola: ========================================
lola: ...considering subproblem: E (F ((FIREABLE(switch11_3_1) AND FIREABLE(display2_3_0) AND (FIREABLE(display1_7_2) OR FIREABLE(switch11_5_1)) AND (FIREABLE(switch3_2_6) OR FIREABLE(display1_2_4) OR (FIREABLE(switch9_3_4) AND FIREABLE(switch10_4_2))) AND FIREABLE(display1_4_1) AND FIREABLE(display4_6_6))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F ((FIREABLE(switch11_3_1) AND FIREABLE(display2_3_0) AND (FIREABLE(display1_7_2) OR FIREABLE(switch11_5_1)) AND (FIREABLE(switch3_2_6) OR FIREABLE(display1_2_4) OR (FIREABLE(switch9_3_4) AND FIREABLE(switch10_4_2))) AND FIREABLE(display1_4_1) AND FIREABLE(display4_6_6))))
lola: processed formula length: 279
lola: 1 rewrites
lola: closed formula file PermAdmissibility-PT-02-ReachabilityFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: (FIREABLE(switch11_3_1) AND FIREABLE(display2_3_0) AND (FIREABLE(display1_7_2) OR FIREABLE(switch11_5_1)) AND (FIREABLE(switch3_2_6) OR FIREABLE(display1_2_4) OR (FIREABLE(switch9_3_4) AND FIREABLE(switch10_4_2))) AND FIREABLE(display1_4_1) AND FIREABLE(display4_6_6))
lola: state equation: Generated DNF with 114 literals and 6 conjunctive subformulas
lola: state equation: write sara problem file to PermAdmissibility-PT-02-ReachabilityFireability-16-0.sara
lola: state equation: calling and running sara
sara: try reading problem file PermAdmissibility-PT-02-ReachabilityFireability-16-0.sara.
sara: place or transition ordering is non-deterministic
lola: time limit reached - aborting
lola:
preliminary result: yes no unknown yes no yes no no unknown yes yes no yes yes yes no
lola:
preliminary result: yes no unknown yes no yes no no unknown yes yes no yes yes yes no
lola: caught signal User defined signal 1 - aborting LoLA
lola:
preliminary result: yes no unknown yes no yes no no unknown yes yes no yes yes yes no
lola: memory consumption: 16640 KB
lola: time consumption: 3570 seconds
lola: memory consumption: 16640 KB
lola: time consumption: 3570 seconds

BK_STOP 1527041155934

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-02"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-02.tgz
mv PermAdmissibility-PT-02 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool lola"
echo " Input is PermAdmissibility-PT-02, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r112-csrt-152666469600483"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;