About the Execution of M4M.full for IBMB2S565S3960-PT-none
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
696.980 | 13789.00 | 26035.00 | 519.60 | T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 312K
-rw-r--r-- 1 mcc users 4.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 5.2K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.2K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 127K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool mcc4mcc-full
Input is IBMB2S565S3960-PT-none, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r106-smll-152658636800195
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME IBMB2S565S3960-PT-none-ReachabilityDeadlock-0
=== Now, execution of the tool begins
BK_START 1526781123014
BK_STOP 1526781136803
--------------------
content from stderr:
Prefix is 65b80f64.
Reading known information in /usr/share/mcc4mcc/65b80f64-known.json.
Reading learned information in /usr/share/mcc4mcc/65b80f64-learned.json.
Reading value translations in /usr/share/mcc4mcc/65b80f64-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using IBMB2S565S3960-PT-none as instance name.
Using IBMB2S565S3960 as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'ReachabilityDeadlock', 'Place/Transition': True, 'Colored': False, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': True, 'Extended Free Choice': True, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': True, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': True, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': False, 'Safe': False, 'Deadlock': True, 'Reversible': None, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 91, 'Memory': 113.9, 'Tool': 'lola'}, {'Time': 201, 'Memory': 110.88, 'Tool': 'lola'}, {'Time': 130421, 'Memory': 2988.54, 'Tool': 'itstools'}, {'Time': 132633, 'Memory': 3212.27, 'Tool': 'itstools'}].
Learned tools are: [{'Tool': 'itstools'}].
Learned tool itstools is 1433.1978021978023x far from the best tool lola.
ReachabilityDeadlock itstools IBMB2S565S3960-PT-none...
May 20, 2018 1:52:13 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-z3path, /usr/bin/z3, -yices2path, /usr/bin/yices, -ltsminpath, /usr/bin, -smt, -its, -pnfolder, /mcc-data, -examination, ReachabilityDeadlock]
May 20, 2018 1:52:13 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /mcc-data/model.pnml
May 20, 2018 1:52:13 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 79 ms
May 20, 2018 1:52:13 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 273 places.
May 20, 2018 1:52:14 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 179 transitions.
May 20, 2018 1:52:14 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /mcc-data/model.pnml.img.gal : 30 ms
May 20, 2018 1:52:14 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 166 ms
Flatten gal took : 177 ms
May 20, 2018 1:52:14 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /mcc-data/model.pnml.simple.gal : 8 ms
May 20, 2018 1:52:14 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 179 transitions.
Constant places removed 102 places and 1 transitions.
Reduce isomorphic transitions removed 1 transitions.
Performed 119 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 222 rules applied. Total rules applied 222 place count 171 transition count 58
Constant places removed 130 places and 9 transitions.
Reduce isomorphic transitions removed 2 transitions.
Implicit places reduction removed 1 places :[join.s00001163.activated.s00001064]
Performed 3 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 136 rules applied. Total rules applied 358 place count 40 transition count 44
Constant places removed 5 places and 0 transitions.
Iterating post reduction 2 with 5 rules applied. Total rules applied 363 place count 35 transition count 44
Constant places removed 2 places and 2 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 365 place count 33 transition count 42
Constant places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 366 place count 32 transition count 42
Constant places removed 1 places and 1 transitions.
Iterating post reduction 5 with 1 rules applied. Total rules applied 367 place count 31 transition count 41
Constant places removed 1 places and 1 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 368 place count 30 transition count 40
Performed 6 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 7 with 6 Pre rules applied. Total rules applied 368 place count 30 transition count 34
Constant places removed 6 places and 0 transitions.
Iterating post reduction 7 with 6 rules applied. Total rules applied 374 place count 24 transition count 34
Performed 9 Post agglomeration using F-continuation condition.
Constant places removed 9 places and 0 transitions.
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 8 with 11 rules applied. Total rules applied 385 place count 15 transition count 21
Performed 1 Post agglomeration using F-continuation condition.
Constant places removed 1 places and 0 transitions.
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 9 with 2 rules applied. Total rules applied 387 place count 14 transition count 19
Performed 2 Post agglomeration using F-continuation condition.
Constant places removed 2 places and 0 transitions.
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 10 with 3 rules applied. Total rules applied 390 place count 12 transition count 19
Applied a total of 390 rules in 41 ms. Remains 12 /273 variables (removed 261) and now considering 19/179 (removed 160) transitions.
// Phase 1: matrix 19 rows 12 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/mcc-data
May 20, 2018 1:52:14 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /mcc-data/ReachabilityDeadlock.pnml.gal : 0 ms
May 20, 2018 1:52:14 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 19 transitions.
Invoking ITS tools like this :CommandLine [args=[/usr/share/itscl/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201804131302/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /mcc-data/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/mcc-data]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 19 rows 12 cols
May 20, 2018 1:52:14 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 4 ms
its-ctl command run as :
/usr/share/itscl/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201804131302/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /mcc-data/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
May 20, 2018 1:52:15 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 12 variables to be positive in 90 ms
May 20, 2018 1:52:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 19 transitions.
May 20, 2018 1:52:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/19 took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 20, 2018 1:52:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 7 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 20, 2018 1:52:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 19 transitions.
May 20, 2018 1:52:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 20, 2018 1:52:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 19 transitions.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,171972,0.130526,6200,2,1138,5,11519,6,0,67,14225,0
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,3746,0.377775,9480,2,360,7,28446,9,1,345,32345,2
System contains 3746 deadlocks (shown below if less than --print-limit option) !
FORMULA IBMB2S565S3960-PT-none-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
[ 3746 states ] showing 10 first states
[ join.s00002243.activated.s00001065=2 ]
[ join.s00002243.activated.s00001065=3 ]
[ join.s00002243.activated.s00001065=4 ]
[ join.s00002243.activated.s00001065=5 ]
[ join.s00002243.activated.s00001064=1 join.s00002243.activated.s00001065=2 ]
[ join.s00002243.activated.s00001064=1 join.s00002243.activated.s00001065=3 ]
[ join.s00002243.activated.s00001064=1 join.s00002243.activated.s00001065=4 ]
[ join.s00002243.activated.s00001064=1 join.s00002243.activated.s00001065=5 ]
[ join.s00002243.activated.s00001064=2 join.s00002243.activated.s00001065=2 ]
[ join.s00002243.activated.s00001064=2 join.s00002243.activated.s00001065=3 ]
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="IBMB2S565S3960-PT-none"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="mcc4mcc-full"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/IBMB2S565S3960-PT-none.tgz
mv IBMB2S565S3960-PT-none execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool mcc4mcc-full"
echo " Input is IBMB2S565S3960-PT-none, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r106-smll-152658636800195"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;