Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 396K
-rw-r--r-- 1 mcc users 5.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.9K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 105 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 343 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 7.1K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 29K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 193K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is IBM703-PT-none, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r104-smll-152658634300186
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME IBM703-PT-none-CTLFireability-00
FORMULA_NAME IBM703-PT-none-CTLFireability-01
FORMULA_NAME IBM703-PT-none-CTLFireability-02
FORMULA_NAME IBM703-PT-none-CTLFireability-03
FORMULA_NAME IBM703-PT-none-CTLFireability-04
FORMULA_NAME IBM703-PT-none-CTLFireability-05
FORMULA_NAME IBM703-PT-none-CTLFireability-06
FORMULA_NAME IBM703-PT-none-CTLFireability-07
FORMULA_NAME IBM703-PT-none-CTLFireability-08
FORMULA_NAME IBM703-PT-none-CTLFireability-09
FORMULA_NAME IBM703-PT-none-CTLFireability-10
FORMULA_NAME IBM703-PT-none-CTLFireability-11
FORMULA_NAME IBM703-PT-none-CTLFireability-12
FORMULA_NAME IBM703-PT-none-CTLFireability-13
FORMULA_NAME IBM703-PT-none-CTLFireability-14
FORMULA_NAME IBM703-PT-none-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1526823572398

Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,8370,0.195482,6976,2,1236,5,7248,6,0,1316,7571,0


Converting to forward existential form...Done !
original formula: EG(!((((task_s00000705_inputCriterion_s00000257_used>=1)||(task_s00000714_output_s00000264>=1))&&(!((merge_s00000320_input_s00000290>=1)&&(fork_s00000463_activated_s00000274>=1))))))
=> equivalent forward existential formula: [FwdG(Init,!((((task_s00000705_inputCriterion_s00000257_used>=1)||(task_s00000714_output_s00000264>=1))&&(!((merge_s00000320_input_s00000290>=1)&&(fork_s00000463_activated_s00000274>=1))))))] != FALSE
Hit Full ! (commute/partial/dont) 277/0/7
(forward)formula 0,1,1.34274,39824,1,0,117,152085,19,4,5876,115527,114
FORMULA IBM703-PT-none-CTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: !(AG(AF(((task_s00000706_input_s00000263>=1)||(task_s00000725_inputCriterion_s00000257_used>=1)))))
=> equivalent forward existential formula: [FwdG(FwdU(Init,TRUE),!(((task_s00000706_input_s00000263>=1)||(task_s00000725_inputCriterion_s00000257_used>=1))))] != FALSE
Hit Full ! (commute/partial/dont) 280/4/4
(forward)formula 1,1,1.38507,40616,1,0,118,152858,27,5,6367,117966,117
FORMULA IBM703-PT-none-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EG(A((task_s00000707_inputCriterion_s00000257_used>=1) U !((merge_s00000446_input_s00000447>=1))))
=> equivalent forward existential formula: [FwdG(Init,!((E(!(!((merge_s00000446_input_s00000447>=1))) U (!((task_s00000707_inputCriterion_s00000257_used>=1)) * !(!((merge_s00000446_input_s00000447>=1))))) + EG(!(!((merge_s00000446_input_s00000447>=1)))))))] != FALSE
Reverse transition relation is NOT exact ! Due to transitions merge_s00000320_activate_s00000284, merge_s00000320_activate_s00000286, merge_s00000451_activate_s00000284, merge_s00000341_activate_s00000286, merge_s00000451_activate_s00000286, merge_s00000319_activate_s00000284, merge_s00000455_activate_s00000284, merge_s00000453_activate_s00000286, merge_s00000446_activate_s00000284, merge_s00000454_activate_s00000286, merge_s00000319_activate_s00000448, merge_s00000319_activate_s00000286, merge_s00000461_activate_s00000289, merge_s00000455_activate_s00000286, merge_s00000446_activate_s00000286, merge_s00000319_activate_s00000289, merge_s00000455_activate_s00000289, merge_s00000449_activate_s00000286, merge_s00000446_activate_s00000289, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/265/19/284
(forward)formula 2,1,2.95795,79164,1,0,714,303793,612,467,7751,402703,895
FORMULA IBM703-PT-none-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AF((((decision_s00000793_activated>=1) + AF((decision_s00000778_activated>=1))) + (task_s00000733_inputCriterion_s00000257_used>=1)))
=> equivalent forward existential formula: [FwdG(Init,!((((decision_s00000793_activated>=1) + !(EG(!((decision_s00000778_activated>=1))))) + (task_s00000733_inputCriterion_s00000257_used>=1))))] = FALSE
(forward)formula 3,0,5.12296,131260,1,0,1111,686974,622,732,7752,725772,1331
FORMULA IBM703-PT-none-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EG(AX(!((task_s00000749_output_s00000264>=1))))
=> equivalent forward existential formula: [FwdG(Init,!(EX(!(!((task_s00000749_output_s00000264>=1))))))] != FALSE
(forward)formula 4,1,5.88057,145252,1,0,1335,756886,626,913,7752,840092,1512
FORMULA IBM703-PT-none-CTLFireability-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AF(A(((decision_s00000802_input_s00000263>=1)||(task_s00000763_output_s00000264>=1)) U ((decision_s00000805_activated>=1)||(task_s00000761_output_s00000264>=1))))
=> equivalent forward existential formula: [FwdG(Init,!(!((E(!(((decision_s00000805_activated>=1)||(task_s00000761_output_s00000264>=1))) U (!(((decision_s00000802_input_s00000263>=1)||(task_s00000763_output_s00000264>=1))) * !(((decision_s00000805_activated>=1)||(task_s00000761_output_s00000264>=1))))) + EG(!(((decision_s00000805_activated>=1)||(task_s00000761_output_s00000264>=1))))))))] = FALSE
(forward)formula 5,0,6.8364,165316,1,0,1654,892073,638,1124,7764,983417,1882
FORMULA IBM703-PT-none-CTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: E(E((decision_s00000772_activated>=1) U (task_s00000720_inputCriterion_s00000257_used>=1)) U (AF((decision_s00000764_activated>=1)) + AX((task_s00000729_input_s00000263>=1))))
=> equivalent forward existential formula: ([(FwdU(Init,E((decision_s00000772_activated>=1) U (task_s00000720_inputCriterion_s00000257_used>=1))) * !(EG(!((decision_s00000764_activated>=1)))))] != FALSE + [(FwdU(Init,E((decision_s00000772_activated>=1) U (task_s00000720_inputCriterion_s00000257_used>=1))) * !(EX(!((task_s00000729_input_s00000263>=1)))))] != FALSE)
(forward)formula 6,0,7.82655,196480,1,0,1959,1.14951e+06,654,1286,7766,1.1642e+06,2260
FORMULA IBM703-PT-none-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EG((EG((task_s00000737_output_s00000264>=1)) + ((((task_s00000734_output_s00000264>=1)&&(task_s00000735_output_s00000264>=1))||(!(task_s00000729_output_s00000264>=1)))||(((task_s00000746_inputCriterion_s00000257_used>=1)&&(decision_s00000796_input_s00000263>=1))&&((task_s00000704_inputCriterion_s00000257_used>=1)||(task_s00000745_output_s00000264>=1))))))
=> equivalent forward existential formula: [FwdG(Init,(EG((task_s00000737_output_s00000264>=1)) + ((((task_s00000734_output_s00000264>=1)&&(task_s00000735_output_s00000264>=1))||(!(task_s00000729_output_s00000264>=1)))||(((task_s00000746_inputCriterion_s00000257_used>=1)&&(decision_s00000796_input_s00000263>=1))&&((task_s00000704_inputCriterion_s00000257_used>=1)||(task_s00000745_output_s00000264>=1))))))] != FALSE
(forward)formula 7,1,8.13365,205456,1,0,2196,1.20092e+06,662,1469,7773,1.24462e+06,2442
FORMULA IBM703-PT-none-CTLFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AF((merge_s00000457_activated>=1))
=> equivalent forward existential formula: [FwdG(Init,!((merge_s00000457_activated>=1)))] = FALSE
Hit Full ! (commute/partial/dont) 281/0/3
(forward)formula 8,0,8.192,206512,1,0,2198,1.20266e+06,670,1472,8247,1.24946e+06,2445
FORMULA IBM703-PT-none-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EG(EF((merge_s00000455_activated>=1)))
=> equivalent forward existential formula: [FwdG(Init,E(TRUE U (merge_s00000455_activated>=1)))] != FALSE
dead was empty
(forward)formula 9,0,8.27993,208624,1,0,2206,1.21441e+06,676,1478,8719,1.25451e+06,2461
FORMULA IBM703-PT-none-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: AG(AF((merge_s00000320_activated>=1)))
=> equivalent forward existential formula: [FwdG(FwdU(Init,TRUE),!((merge_s00000320_activated>=1)))] = FALSE
Hit Full ! (commute/partial/dont) 281/0/3
(forward)formula 10,0,8.32359,209416,1,0,2207,1.21469e+06,684,1479,9170,1.2561e+06,2464
FORMULA IBM703-PT-none-CTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: E(!(AF((task_s00000755_inputCriterion_s00000257_used>=1))) U ((task_s00000747_inputCriterion_s00000257_used>=1)&&(alpha>=1)))
=> equivalent forward existential formula: [(FwdU(Init,!(!(EG(!((task_s00000755_inputCriterion_s00000257_used>=1)))))) * ((task_s00000747_inputCriterion_s00000257_used>=1)&&(alpha>=1)))] != FALSE
(forward)formula 11,0,8.32438,209416,1,0,2207,1.21469e+06,685,1479,9171,1.2561e+06,2464
FORMULA IBM703-PT-none-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EG(EF(((!(decision_s00000773_activated>=1))||((merge_s00000283_input_s00000263>=1)&&(fork_s00000464_input_s00000263>=1)))))
=> equivalent forward existential formula: [FwdG(Init,E(TRUE U ((!(decision_s00000773_activated>=1))||((merge_s00000283_input_s00000263>=1)&&(fork_s00000464_input_s00000263>=1)))))] != FALSE
(forward)formula 12,1,8.42508,212056,1,0,2209,1.23165e+06,687,1482,9285,1.26553e+06,2474
FORMULA IBM703-PT-none-CTLFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AG(AF((((task_s00000763_input_s00000263>=1)||(fork_s00000466_activated_s00000274>=1))||((merge_s00000452_activated>=1)&&(callToProcess_s00000807_inputCriterion_s00000257_used>=1)))))
=> equivalent forward existential formula: [FwdG(FwdU(Init,TRUE),!((((task_s00000763_input_s00000263>=1)||(fork_s00000466_activated_s00000274>=1))||((merge_s00000452_activated>=1)&&(callToProcess_s00000807_inputCriterion_s00000257_used>=1)))))] = FALSE
Hit Full ! (commute/partial/dont) 275/18/9
(forward)formula 13,0,8.51697,212848,1,0,2210,1.23291e+06,695,1483,9799,1.26875e+06,2477
FORMULA IBM703-PT-none-CTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: AF(E((task_s00000757_inputCriterion_s00000257_used>=1) U ((task_s00000762_output_s00000264>=1)&&(task_s00000746_output_s00000264>=1))))
=> equivalent forward existential formula: [FwdG(Init,!(E((task_s00000757_inputCriterion_s00000257_used>=1) U ((task_s00000762_output_s00000264>=1)&&(task_s00000746_output_s00000264>=1)))))] = FALSE
(forward)formula 14,0,8.51904,213112,1,0,2210,1.23291e+06,700,1483,9800,1.26875e+06,2479
FORMULA IBM703-PT-none-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: !(EG(!((task_s00000746_inputCriterion_s00000257_used>=1))))
=> equivalent forward existential formula: [FwdG(Init,!((task_s00000746_inputCriterion_s00000257_used>=1)))] = FALSE
Hit Full ! (commute/partial/dont) 282/0/2
(forward)formula 15,0,8.53635,213376,1,0,2212,1.23326e+06,708,1486,9900,1.26944e+06,2482
FORMULA IBM703-PT-none-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************


BK_STOP 1526823585305

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 20, 2018 1:39:34 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 20, 2018 1:39:34 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 20, 2018 1:39:35 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 138 ms
May 20, 2018 1:39:35 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 262 places.
May 20, 2018 1:39:35 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 284 transitions.
May 20, 2018 1:39:35 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 19 ms
May 20, 2018 1:39:35 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 101 ms
May 20, 2018 1:39:35 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 8 ms
May 20, 2018 1:39:35 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 1 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="IBM703-PT-none"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/IBM703-PT-none.tgz
mv IBM703-PT-none execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is IBM703-PT-none, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r104-smll-152658634300186"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;