Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
................
/home/mcc/execution
total 111M
-rw-r--r-- 1 mcc users 11K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 36K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1M May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16M May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 6.9K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 121K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 403K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 22K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 67K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 5.3M May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16M May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.2K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 70M May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is GlobalResAllocation-PT-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r093-blw7-152650005700418
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-00
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-01
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-02
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-03
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-04
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-05
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-06
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-07
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-08
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-09
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-10
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-11
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-12
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-13
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-14
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527470684479

FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-00 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((in_critical_s_2_1+in_critical_s_1_1)+in_critical_s_4_1)+in_critical_s_3_1)+in_critical_s_1_2)+in_critical_s_5_1)+in_critical_s_3_2)+in_critical_s_2_2)+in_critical_s_5_2)+in_critical_s_4_2)+in_critical_s_2_3)+in_critical_s_1_3)+in_critical_s_4_3)+in_critical_s_3_3)+in_critical_s_2_4)+in_critical_s_3_4)+in_critical_s_5_3)+in_critical_s_1_4)+in_critical_s_1_5)+in_critical_s_2_5)+in_critical_s_4_4)+in_critical_s_5_4)+in_critical_s_5_5)+in_critical_s_1_6)+in_critical_s_3_5)+in_critical_s_4_5)+in_critical_s_4_6)+in_critical_s_5_6)+in_critical_s_2_6)+in_critical_s_3_6)+in_critical_s_4_7)+in_critical_s_3_7)+in_critical_s_2_7)+in_critical_s_1_7)+in_critical_s_3_8)+in_critical_s_2_8)+in_critical_s_1_8)+in_critical_s_5_7)+in_critical_s_2_9)+in_critical_s_1_9)+in_critical_s_5_8)+in_critical_s_4_8)+in_critical_s_1_10)+in_critical_s_5_9)+in_critical_s_4_9)+in_critical_s_3_9)+in_critical_s_2_10)+in_critical_s_3_10)+in_critical_s_4_10)+in_critical_s_5_10)<=((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3))||(((((pr_in_1+pr_in_2)+pr_in_3)+pr_in_4)+pr_in_5)>=2))&&(((((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9)<=((((pr_in_1+pr_in_2)+pr_in_3)+pr_in_4)+pr_in_5))&&(((((Processes_1+Processes_2)+Processes_3)+Processes_4)+Processes_5)>=1)))&&((((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)>=3)&&(!((((((((((((((((((((((((((((((((((((((((((((((((((in_critical_s_2_1+in_critical_s_1_1)+in_critical_s_4_1)+in_critical_s_3_1)+in_critical_s_1_2)+in_critical_s_5_1)+in_critical_s_3_2)+in_critical_s_2_2)+in_critical_s_5_2)+in_critical_s_4_2)+in_critical_s_2_3)+in_critical_s_1_3)+in_critical_s_4_3)+in_critical_s_3_3)+in_critical_s_2_4)+in_critical_s_3_4)+in_critical_s_5_3)+in_critical_s_1_4)+in_critical_s_1_5)+in_critical_s_2_5)+in_critical_s_4_4)+in_critical_s_5_4)+in_critical_s_5_5)+in_critical_s_1_6)+in_critical_s_3_5)+in_critical_s_4_5)+in_critical_s_4_6)+in_critical_s_5_6)+in_critical_s_2_6)+in_critical_s_3_6)+in_critical_s_4_7)+in_critical_s_3_7)+in_critical_s_2_7)+in_critical_s_1_7)+in_critical_s_3_8)+in_critical_s_2_8)+in_critical_s_1_8)+in_critical_s_5_7)+in_critical_s_2_9)+in_critical_s_1_9)+in_critical_s_5_8)+in_critical_s_4_8)+in_critical_s_1_10)+in_critical_s_5_9)+in_critical_s_4_9)+in_critical_s_3_9)+in_critical_s_2_10)+in_critical_s_3_10)+in_critical_s_4_10)+in_critical_s_5_10)>=1))))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-02 with value :((!(((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)<=(((((((((((((((((((((((((((((((((((((((((((((((((in_critical_s_2_1+in_critical_s_1_1)+in_critical_s_4_1)+in_critical_s_3_1)+in_critical_s_1_2)+in_critical_s_5_1)+in_critical_s_3_2)+in_critical_s_2_2)+in_critical_s_5_2)+in_critical_s_4_2)+in_critical_s_2_3)+in_critical_s_1_3)+in_critical_s_4_3)+in_critical_s_3_3)+in_critical_s_2_4)+in_critical_s_3_4)+in_critical_s_5_3)+in_critical_s_1_4)+in_critical_s_1_5)+in_critical_s_2_5)+in_critical_s_4_4)+in_critical_s_5_4)+in_critical_s_5_5)+in_critical_s_1_6)+in_critical_s_3_5)+in_critical_s_4_5)+in_critical_s_4_6)+in_critical_s_5_6)+in_critical_s_2_6)+in_critical_s_3_6)+in_critical_s_4_7)+in_critical_s_3_7)+in_critical_s_2_7)+in_critical_s_1_7)+in_critical_s_3_8)+in_critical_s_2_8)+in_critical_s_1_8)+in_critical_s_5_7)+in_critical_s_2_9)+in_critical_s_1_9)+in_critical_s_5_8)+in_critical_s_4_8)+in_critical_s_1_10)+in_critical_s_5_9)+in_critical_s_4_9)+in_critical_s_3_9)+in_critical_s_2_10)+in_critical_s_3_10)+in_critical_s_4_10)+in_critical_s_5_10)))&&((((((((((((((((((((((((((((((((((((((((((((((((((((in_critical_s_2_1+in_critical_s_1_1)+in_critical_s_4_1)+in_critical_s_3_1)+in_critical_s_1_2)+in_critical_s_5_1)+in_critical_s_3_2)+in_critical_s_2_2)+in_critical_s_5_2)+in_critical_s_4_2)+in_critical_s_2_3)+in_critical_s_1_3)+in_critical_s_4_3)+in_critical_s_3_3)+in_critical_s_2_4)+in_critical_s_3_4)+in_critical_s_5_3)+in_critical_s_1_4)+in_critical_s_1_5)+in_critical_s_2_5)+in_critical_s_4_4)+in_critical_s_5_4)+in_critical_s_5_5)+in_critical_s_1_6)+in_critical_s_3_5)+in_critical_s_4_5)+in_critical_s_4_6)+in_critical_s_5_6)+in_critical_s_2_6)+in_critical_s_3_6)+in_critical_s_4_7)+in_critical_s_3_7)+in_critical_s_2_7)+in_critical_s_1_7)+in_critical_s_3_8)+in_critical_s_2_8)+in_critical_s_1_8)+in_critical_s_5_7)+in_critical_s_2_9)+in_critical_s_1_9)+in_critical_s_5_8)+in_critical_s_4_8)+in_critical_s_1_10)+in_critical_s_5_9)+in_critical_s_4_9)+in_critical_s_3_9)+in_critical_s_2_10)+in_critical_s_3_10)+in_critical_s_4_10)+in_critical_s_5_10)<=(((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9))||(((((pr_in_1+pr_in_2)+pr_in_3)+pr_in_4)+pr_in_5)<=((((Processes_1+Processes_2)+Processes_3)+Processes_4)+Processes_5)))&&(!((((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9)>=3))))
Read [invariant] property : GlobalResAllocation-PT-05-ReachabilityCardinality-04 with value :(((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)<=(((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-05 with value :(!((((((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9)>=1)&&(((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)<=((((pr_in_1+pr_in_2)+pr_in_3)+pr_in_4)+pr_in_5)))||(!((((((((((((((((((((((((((((((((((((((((((((((((((in_critical_s_2_1+in_critical_s_1_1)+in_critical_s_4_1)+in_critical_s_3_1)+in_critical_s_1_2)+in_critical_s_5_1)+in_critical_s_3_2)+in_critical_s_2_2)+in_critical_s_5_2)+in_critical_s_4_2)+in_critical_s_2_3)+in_critical_s_1_3)+in_critical_s_4_3)+in_critical_s_3_3)+in_critical_s_2_4)+in_critical_s_3_4)+in_critical_s_5_3)+in_critical_s_1_4)+in_critical_s_1_5)+in_critical_s_2_5)+in_critical_s_4_4)+in_critical_s_5_4)+in_critical_s_5_5)+in_critical_s_1_6)+in_critical_s_3_5)+in_critical_s_4_5)+in_critical_s_4_6)+in_critical_s_5_6)+in_critical_s_2_6)+in_critical_s_3_6)+in_critical_s_4_7)+in_critical_s_3_7)+in_critical_s_2_7)+in_critical_s_1_7)+in_critical_s_3_8)+in_critical_s_2_8)+in_critical_s_1_8)+in_critical_s_5_7)+in_critical_s_2_9)+in_critical_s_1_9)+in_critical_s_5_8)+in_critical_s_4_8)+in_critical_s_1_10)+in_critical_s_5_9)+in_critical_s_4_9)+in_critical_s_3_9)+in_critical_s_2_10)+in_critical_s_3_10)+in_critical_s_4_10)+in_critical_s_5_10)>=3))))
Read [invariant] property : GlobalResAllocation-PT-05-ReachabilityCardinality-06 with value :((((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)<=(((((((((((((((((((((((((((((((((((((((((((((((((in_critical_s_2_1+in_critical_s_1_1)+in_critical_s_4_1)+in_critical_s_3_1)+in_critical_s_1_2)+in_critical_s_5_1)+in_critical_s_3_2)+in_critical_s_2_2)+in_critical_s_5_2)+in_critical_s_4_2)+in_critical_s_2_3)+in_critical_s_1_3)+in_critical_s_4_3)+in_critical_s_3_3)+in_critical_s_2_4)+in_critical_s_3_4)+in_critical_s_5_3)+in_critical_s_1_4)+in_critical_s_1_5)+in_critical_s_2_5)+in_critical_s_4_4)+in_critical_s_5_4)+in_critical_s_5_5)+in_critical_s_1_6)+in_critical_s_3_5)+in_critical_s_4_5)+in_critical_s_4_6)+in_critical_s_5_6)+in_critical_s_2_6)+in_critical_s_3_6)+in_critical_s_4_7)+in_critical_s_3_7)+in_critical_s_2_7)+in_critical_s_1_7)+in_critical_s_3_8)+in_critical_s_2_8)+in_critical_s_1_8)+in_critical_s_5_7)+in_critical_s_2_9)+in_critical_s_1_9)+in_critical_s_5_8)+in_critical_s_4_8)+in_critical_s_1_10)+in_critical_s_5_9)+in_critical_s_4_9)+in_critical_s_3_9)+in_critical_s_2_10)+in_critical_s_3_10)+in_critical_s_4_10)+in_critical_s_5_10))||(((((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)<=((((Processes_1+Processes_2)+Processes_3)+Processes_4)+Processes_5))&&(((((pr_released_4+pr_released_5)+pr_released_1)+pr_released_2)+pr_released_3)>=2))&&(!((((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9)<=((((pr_in_1+pr_in_2)+pr_in_3)+pr_in_4)+pr_in_5)))))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-07 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((in_critical_s_2_1+in_critical_s_1_1)+in_critical_s_4_1)+in_critical_s_3_1)+in_critical_s_1_2)+in_critical_s_5_1)+in_critical_s_3_2)+in_critical_s_2_2)+in_critical_s_5_2)+in_critical_s_4_2)+in_critical_s_2_3)+in_critical_s_1_3)+in_critical_s_4_3)+in_critical_s_3_3)+in_critical_s_2_4)+in_critical_s_3_4)+in_critical_s_5_3)+in_critical_s_1_4)+in_critical_s_1_5)+in_critical_s_2_5)+in_critical_s_4_4)+in_critical_s_5_4)+in_critical_s_5_5)+in_critical_s_1_6)+in_critical_s_3_5)+in_critical_s_4_5)+in_critical_s_4_6)+in_critical_s_5_6)+in_critical_s_2_6)+in_critical_s_3_6)+in_critical_s_4_7)+in_critical_s_3_7)+in_critical_s_2_7)+in_critical_s_1_7)+in_critical_s_3_8)+in_critical_s_2_8)+in_critical_s_1_8)+in_critical_s_5_7)+in_critical_s_2_9)+in_critical_s_1_9)+in_critical_s_5_8)+in_critical_s_4_8)+in_critical_s_1_10)+in_critical_s_5_9)+in_critical_s_4_9)+in_critical_s_3_9)+in_critical_s_2_10)+in_critical_s_3_10)+in_critical_s_4_10)+in_critical_s_5_10)>=2)||(((((Processes_1+Processes_2)+Processes_3)+Processes_4)+Processes_5)>=3))&&(((((((((((((((((((((((((((((((((((((((((((((((((((in_critical_s_2_1+in_critical_s_1_1)+in_critical_s_4_1)+in_critical_s_3_1)+in_critical_s_1_2)+in_critical_s_5_1)+in_critical_s_3_2)+in_critical_s_2_2)+in_critical_s_5_2)+in_critical_s_4_2)+in_critical_s_2_3)+in_critical_s_1_3)+in_critical_s_4_3)+in_critical_s_3_3)+in_critical_s_2_4)+in_critical_s_3_4)+in_critical_s_5_3)+in_critical_s_1_4)+in_critical_s_1_5)+in_critical_s_2_5)+in_critical_s_4_4)+in_critical_s_5_4)+in_critical_s_5_5)+in_critical_s_1_6)+in_critical_s_3_5)+in_critical_s_4_5)+in_critical_s_4_6)+in_critical_s_5_6)+in_critical_s_2_6)+in_critical_s_3_6)+in_critical_s_4_7)+in_critical_s_3_7)+in_critical_s_2_7)+in_critical_s_1_7)+in_critical_s_3_8)+in_critical_s_2_8)+in_critical_s_1_8)+in_critical_s_5_7)+in_critical_s_2_9)+in_critical_s_1_9)+in_critical_s_5_8)+in_critical_s_4_8)+in_critical_s_1_10)+in_critical_s_5_9)+in_critical_s_4_9)+in_critical_s_3_9)+in_critical_s_2_10)+in_critical_s_3_10)+in_critical_s_4_10)+in_critical_s_5_10)>=2)||((((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9)<=((((Processes_1+Processes_2)+Processes_3)+Processes_4)+Processes_5))))&&(!((((((pr_in_1+pr_in_2)+pr_in_3)+pr_in_4)+pr_in_5)>=3)||(((((pr_in_1+pr_in_2)+pr_in_3)+pr_in_4)+pr_in_5)<=(((((((((Resources_1+Resources_2)+Resources_3)+Resources_4)+Resources_5)+Resources_6)+Resources_7)+Resources_8)+Resources_10)+Resources_9)))))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-08 with value :((!((in_critical_s_5_2<=in_critical_s_2_5)&&(in_critical_s_5_7<=in_critical_s_2_1)))&&(in_critical_s_3_6>=1))
Read [invariant] property : GlobalResAllocation-PT-05-ReachabilityCardinality-09 with value :((!((in_critical_s_3_4>=2)&&(in_critical_s_2_10<=in_critical_s_3_2)))||(in_critical_s_4_9>=3))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-10 with value :((!((in_critical_s_5_8<=in_critical_s_3_4)||(in_critical_s_2_10<=in_critical_s_2_1)))&&(((pr_in_3>=2)||(Resources_6<=pr_released_1))&&(in_critical_s_4_5>=1)))
Read [invariant] property : GlobalResAllocation-PT-05-ReachabilityCardinality-11 with value :(!(((in_critical_s_5_2<=in_critical_s_3_8)&&(in_critical_s_1_7>=3))&&((in_critical_s_5_5<=Processes_5)&&(Resources_4>=2))))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-12 with value :(in_critical_s_1_5>=3)
Read [invariant] property : GlobalResAllocation-PT-05-ReachabilityCardinality-13 with value :((!((Processes_2>=2)&&(in_critical_s_2_8>=3)))||(in_critical_s_5_6<=in_critical_s_3_5))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-14 with value :(((!(in_critical_s_1_3<=in_critical_s_3_6))||((Resources_3<=in_critical_s_2_8)||(in_critical_s_1_1<=in_critical_s_2_5)))&&(((in_critical_s_5_10>=3)&&(pr_in_1<=in_critical_s_1_6))&&(!(Processes_5<=in_critical_s_5_10))))
Read [reachable] property : GlobalResAllocation-PT-05-ReachabilityCardinality-15 with value :(in_critical_s_4_1>=3)
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 5280
// Phase 1: matrix 5280 rows 75 cols
invariant :Resources_8 + in_critical_s_3_8 + in_critical_s_2_8 + in_critical_s_1_8 + in_critical_s_5_8 + in_critical_s_4_8 = 1
invariant :4'Processes_3 + in_critical_s_3_1 + in_critical_s_3_2 + in_critical_s_3_3 + in_critical_s_3_4 + in_critical_s_3_5 + in_critical_s_3_6 + in_critical_s_3_7 + in_critical_s_3_8 + in_critical_s_3_9 + in_critical_s_3_10 + pr_released_3 = 4
invariant :4'Processes_2 + in_critical_s_2_1 + in_critical_s_2_2 + in_critical_s_2_3 + in_critical_s_2_4 + in_critical_s_2_5 + in_critical_s_2_6 + in_critical_s_2_7 + in_critical_s_2_8 + in_critical_s_2_9 + in_critical_s_2_10 + pr_released_2 = 4
invariant :4'Processes_5 + pr_released_5 + pr_in_5 = 4
invariant :Resources_3 + -1'in_critical_s_1_1 + -1'in_critical_s_4_1 + -1'in_critical_s_1_2 + -1'in_critical_s_4_2 + in_critical_s_2_3 + in_critical_s_3_3 + in_critical_s_5_3 + -1'in_critical_s_1_4 + -1'in_critical_s_1_5 + -1'in_critical_s_4_4 + -1'in_critical_s_1_6 + -1'in_critical_s_4_5 + -1'in_critical_s_4_6 + -1'in_critical_s_4_7 + -1'in_critical_s_1_7 + -1'in_critical_s_1_8 + -1'in_critical_s_1_9 + -1'in_critical_s_4_8 + -1'in_critical_s_1_10 + -1'in_critical_s_4_9 + pr_in_1 + pr_in_4 + -1'in_critical_s_4_10 = 1
invariant :4'Processes_5 + in_critical_s_5_1 + in_critical_s_5_2 + in_critical_s_5_3 + in_critical_s_5_4 + in_critical_s_5_5 + in_critical_s_5_6 + in_critical_s_5_7 + in_critical_s_5_8 + in_critical_s_5_9 + in_critical_s_5_10 + pr_released_5 = 4
invariant :-1'in_critical_s_2_1 + -1'in_critical_s_2_2 + -1'in_critical_s_2_3 + -1'in_critical_s_2_4 + -1'in_critical_s_2_5 + -1'in_critical_s_2_6 + -1'in_critical_s_2_7 + -1'in_critical_s_2_8 + -1'in_critical_s_2_9 + pr_in_2 + -1'in_critical_s_2_10 = 0
invariant :4'Processes_4 + pr_in_4 + pr_released_4 = 4
invariant :Resources_10 + in_critical_s_1_10 + in_critical_s_2_10 + in_critical_s_3_10 + in_critical_s_4_10 + in_critical_s_5_10 = 1
invariant :Resources_9 + in_critical_s_2_9 + in_critical_s_1_9 + in_critical_s_5_9 + in_critical_s_4_9 + in_critical_s_3_9 = 1
invariant :Resources_2 + in_critical_s_1_2 + in_critical_s_3_2 + in_critical_s_2_2 + in_critical_s_5_2 + in_critical_s_4_2 = 1
invariant :Resources_5 + in_critical_s_1_5 + in_critical_s_2_5 + in_critical_s_5_5 + in_critical_s_3_5 + in_critical_s_4_5 = 1
invariant :4'Processes_1 + pr_in_1 + pr_released_1 = 4
invariant :Resources_6 + in_critical_s_1_6 + in_critical_s_4_6 + in_critical_s_5_6 + in_critical_s_2_6 + in_critical_s_3_6 = 1
invariant :in_critical_s_4_1 + in_critical_s_4_2 + in_critical_s_4_3 + in_critical_s_4_4 + in_critical_s_4_5 + in_critical_s_4_6 + in_critical_s_4_7 + in_critical_s_4_8 + in_critical_s_4_9 + -1'pr_in_4 + in_critical_s_4_10 = 0
invariant :-4'Processes_3 + -4'Processes_5 + Resources_4 + -1'in_critical_s_3_1 + -1'in_critical_s_5_1 + -1'in_critical_s_3_2 + -1'in_critical_s_5_2 + -1'in_critical_s_3_3 + in_critical_s_2_4 + -1'in_critical_s_5_3 + in_critical_s_1_4 + in_critical_s_4_4 + -1'in_critical_s_5_5 + -1'in_critical_s_3_5 + -1'in_critical_s_5_6 + -1'in_critical_s_3_6 + -1'in_critical_s_3_7 + -1'in_critical_s_3_8 + -1'in_critical_s_5_7 + -1'in_critical_s_5_8 + -1'in_critical_s_5_9 + -1'in_critical_s_3_9 + -1'in_critical_s_3_10 + -1'in_critical_s_5_10 + -1'pr_released_5 + -1'pr_released_3 = -7
invariant :Resources_7 + in_critical_s_4_7 + in_critical_s_3_7 + in_critical_s_2_7 + in_critical_s_1_7 + in_critical_s_5_7 = 1
invariant :Resources_1 + in_critical_s_2_1 + in_critical_s_1_1 + in_critical_s_4_1 + in_critical_s_3_1 + in_critical_s_5_1 = 1
invariant :in_critical_s_1_1 + in_critical_s_1_2 + in_critical_s_1_3 + in_critical_s_1_4 + in_critical_s_1_5 + in_critical_s_1_6 + in_critical_s_1_7 + in_critical_s_1_8 + in_critical_s_1_9 + in_critical_s_1_10 + -1'pr_in_1 = 0
invariant :4'Processes_3 + pr_in_3 + pr_released_3 = 4
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation\_PT\_05\_flat\_flat,1.06604e+08,926.377,5522128,2,175538,5,9.46956e+06,6,0,9632,3.16832e+06,0
Total reachable state count : 106603672

Verifying 14 reachability properties.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-00 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-00 does not hold.
No reachable states exhibit your property : GlobalResAllocation-PT-05-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-00,0,1004.12,5522160,1,0,5,9.46956e+06,7,0,205331,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-02 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : GlobalResAllocation-PT-05-ReachabilityCardinality-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-02,0,1134.88,5522192,1,0,5,9.46956e+06,8,0,881181,3.16832e+06,0
Invariant property GlobalResAllocation-PT-05-ReachabilityCardinality-04 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-04,1,1134.89,5522192,2,76,6,9.46956e+06,9,0,881196,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-05 is true.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-05,1,1134.9,5522256,2,76,7,9.46956e+06,10,0,881264,3.16832e+06,0
Invariant property GlobalResAllocation-PT-05-ReachabilityCardinality-06 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-07 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-06,6.35916e+07,1701.83,6307216,2,324205,8,9.46956e+06,11,0,3.28457e+06,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-07 does not hold.
No reachable states exhibit your property : GlobalResAllocation-PT-05-ReachabilityCardinality-07

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-07,0,1705.19,6417176,1,0,8,9.46956e+06,12,0,3.28525e+06,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-08 is true.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-08,142,1725.97,6309716,2,834,8,9.46956e+06,4,0,9642,3.16832e+06,0
Invariant property GlobalResAllocation-PT-05-ReachabilityCardinality-09 is true.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-09,0,1726.06,6309904,1,0,8,9.46956e+06,5,0,9649,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-10 is true.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-10,19033,1726.62,6309964,2,10540,8,9.46956e+06,6,0,9676,3.16832e+06,0
Invariant property GlobalResAllocation-PT-05-ReachabilityCardinality-11 is true.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-11,0,1726.73,6309964,1,0,8,9.46956e+06,7,0,9690,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-12 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : GlobalResAllocation-PT-05-ReachabilityCardinality-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-12,0,1726.81,6309964,1,0,8,9.46956e+06,8,0,9691,3.16832e+06,0
Invariant property GlobalResAllocation-PT-05-ReachabilityCardinality-13 is true.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-13,0,1726.97,6309964,1,0,8,9.46956e+06,9,0,9700,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-14 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : GlobalResAllocation-PT-05-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-14,0,1726.99,6309964,1,0,8,9.46956e+06,10,0,9725,3.16832e+06,0
Reachability property GlobalResAllocation-PT-05-ReachabilityCardinality-15 does not hold.
FORMULA GlobalResAllocation-PT-05-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : GlobalResAllocation-PT-05-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-PT-05-ReachabilityCardinality-15,0,1727.01,6309964,1,0,8,9.46956e+06,11,0,9726,3.16832e+06,0

BK_STOP 1527472454258

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 1:24:46 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 28, 2018 1:24:46 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 1:24:47 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 1653 ms
May 28, 2018 1:24:47 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 75 places.
May 28, 2018 1:24:49 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 56105 transitions.
May 28, 2018 1:24:59 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 10308 ms
May 28, 2018 1:25:15 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 56105 transitions.
May 28, 2018 1:25:15 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (56105) to apply POR reductions. Disabling POR matrices.
May 28, 2018 1:25:18 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 16444 ms
May 28, 2018 1:25:21 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 15217 ms
May 28, 2018 1:25:21 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 380 ms
May 28, 2018 1:25:21 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 5 ms
May 28, 2018 1:25:21 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 15735ms conformant to PINS in folder :/home/mcc/execution
May 28, 2018 1:25:24 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 56105 transitions.
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 14 in 21374 ms.
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-00(UNSAT) depth K=0 took 172 ms
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-02(UNSAT) depth K=0 took 28 ms
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-04(UNSAT) depth K=0 took 34 ms
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-05(UNSAT) depth K=0 took 119 ms
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-06(UNSAT) depth K=0 took 119 ms
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-07(UNSAT) depth K=0 took 23 ms
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-08(UNSAT) depth K=0 took 56 ms
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-09(UNSAT) depth K=0 took 24 ms
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-10(UNSAT) depth K=0 took 64 ms
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-11(UNSAT) depth K=0 took 20 ms
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-12(UNSAT) depth K=0 took 64 ms
May 28, 2018 1:25:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-13(UNSAT) depth K=0 took 20 ms
May 28, 2018 1:25:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-14(UNSAT) depth K=0 took 489 ms
May 28, 2018 1:25:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-15(UNSAT) depth K=0 took 87 ms
May 28, 2018 1:25:51 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 56105 transitions.
May 28, 2018 1:26:04 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 20 place invariants in 506 ms
May 28, 2018 1:28:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-00(UNSAT) depth K=1 took 193277 ms
May 28, 2018 1:30:00 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 75 variables to be positive in 236421 ms
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:78)
at java.lang.Thread.run(Thread.java:748)
May 28, 2018 1:34:35 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-02(UNSAT) depth K=1 took 339864 ms
May 28, 2018 1:35:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-04(UNSAT) depth K=1 took 73360 ms
May 28, 2018 1:41:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate GlobalResAllocation-PT-05-ReachabilityCardinality-00
May 28, 2018 1:41:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for GlobalResAllocation-PT-05-ReachabilityCardinality-00
May 28, 2018 1:41:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-00(FALSE) depth K=0 took 699900 ms
May 28, 2018 1:44:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-05(UNSAT) depth K=1 took 507143 ms
virtual memory exhausted: Cannot allocate memory
May 28, 2018 1:49:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-06(UNSAT) depth K=1 took 293233 ms
May 28, 2018 1:49:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-07(UNSAT) depth K=1 took 41092 ms
May 28, 2018 1:50:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-08(UNSAT) depth K=1 took 37457 ms
May 28, 2018 1:50:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-09(UNSAT) depth K=1 took 11315 ms
May 28, 2018 1:50:46 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-10(UNSAT) depth K=1 took 7901 ms
May 28, 2018 1:51:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-11(UNSAT) depth K=1 took 22578 ms
May 28, 2018 1:51:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-12(UNSAT) depth K=1 took 10010 ms
May 28, 2018 1:51:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-13(UNSAT) depth K=1 took 11274 ms
May 28, 2018 1:51:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate GlobalResAllocation-PT-05-ReachabilityCardinality-02
May 28, 2018 1:51:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for GlobalResAllocation-PT-05-ReachabilityCardinality-02
May 28, 2018 1:51:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-02(FALSE) depth K=0 took 602057 ms
May 28, 2018 1:51:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-14(UNSAT) depth K=1 took 12524 ms
May 28, 2018 1:51:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-15(UNSAT) depth K=1 took 10794 ms
May 28, 2018 1:51:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-PT-05-ReachabilityCardinality-06
May 28, 2018 1:51:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-06(SAT) depth K=0 took 12329 ms
May 28, 2018 1:53:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate GlobalResAllocation-PT-05-ReachabilityCardinality-07
May 28, 2018 1:53:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for GlobalResAllocation-PT-05-ReachabilityCardinality-07
May 28, 2018 1:53:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-PT-05-ReachabilityCardinality-07(FALSE) depth K=0 took 115277 ms
May 28, 2018 1:54:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
May 28, 2018 1:54:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying GlobalResAllocation-PT-05-ReachabilityCardinality-06 SMT depth 2
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 28, 2018 1:54:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 2
May 28, 2018 1:54:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 2
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
May 28, 2018 1:54:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying GlobalResAllocation-PT-05-ReachabilityCardinality-08 K-induction depth 0
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
May 28, 2018 1:54:13 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 3/ 14 properties. Interrupting other analysis methods.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-PT-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-PT-05.tgz
mv GlobalResAllocation-PT-05 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is GlobalResAllocation-PT-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r093-blw7-152650005700418"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;