fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r093-blw7-152650005600376
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for GlobalResAllocation-COL-06

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15757.180 3600000.00 11362609.00 818.70 TFTF?F?FT??????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.............
/home/mcc/execution
total 188K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.7K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 117 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 355 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 28K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is GlobalResAllocation-COL-06, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r093-blw7-152650005600376
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-00
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-01
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-02
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-03
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-04
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-05
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-06
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-07
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-08
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-09
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-10
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-11
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-12
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-13
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-14
FORMULA_NAME GlobalResAllocation-COL-06-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527453825205

20:43:47.032 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
20:43:47.036 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
FORMULA GlobalResAllocation-COL-06-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-06-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-06-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-06-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-06-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-06-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : GlobalResAllocation-COL-06-ReachabilityCardinality-04 with value :((((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)+resources_10)+resources_11)>=3)
Read [invariant] property : GlobalResAllocation-COL-06-ReachabilityCardinality-06 with value :((((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)+prreleased_5)<=(((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)+processes_5))
Read [invariant] property : GlobalResAllocation-COL-06-ReachabilityCardinality-07 with value :(!((((((((prin_0+prin_1)+prin_2)+prin_3)+prin_4)+prin_5)>=3)&&((((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)+resources_10)+resources_11)>=3))&&(((((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)+prreleased_5)<=(((((prin_0+prin_1)+prin_2)+prin_3)+prin_4)+prin_5))&&((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)+incriticals_18)+incriticals_19)+incriticals_20)+incriticals_21)+incriticals_22)+incriticals_23)+incriticals_24)+incriticals_25)+incriticals_26)+incriticals_27)+incriticals_28)+incriticals_29)+incriticals_30)+incriticals_31)+incriticals_32)+incriticals_33)+incriticals_34)+incriticals_35)+incriticals_36)+incriticals_37)+incriticals_38)+incriticals_39)+incriticals_40)+incriticals_41)+incriticals_42)+incriticals_43)+incriticals_44)+incriticals_45)+incriticals_46)+incriticals_47)+incriticals_48)+incriticals_49)+incriticals_50)+incriticals_51)+incriticals_52)+incriticals_53)+incriticals_54)+incriticals_55)+incriticals_56)+incriticals_57)+incriticals_58)+incriticals_59)+incriticals_60)+incriticals_61)+incriticals_62)+incriticals_63)+incriticals_64)+incriticals_65)+incriticals_66)+incriticals_67)+incriticals_68)+incriticals_69)+incriticals_70)+incriticals_71)>=1))))
Read [reachable] property : GlobalResAllocation-COL-06-ReachabilityCardinality-09 with value :(!((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)+incriticals_18)+incriticals_19)+incriticals_20)+incriticals_21)+incriticals_22)+incriticals_23)+incriticals_24)+incriticals_25)+incriticals_26)+incriticals_27)+incriticals_28)+incriticals_29)+incriticals_30)+incriticals_31)+incriticals_32)+incriticals_33)+incriticals_34)+incriticals_35)+incriticals_36)+incriticals_37)+incriticals_38)+incriticals_39)+incriticals_40)+incriticals_41)+incriticals_42)+incriticals_43)+incriticals_44)+incriticals_45)+incriticals_46)+incriticals_47)+incriticals_48)+incriticals_49)+incriticals_50)+incriticals_51)+incriticals_52)+incriticals_53)+incriticals_54)+incriticals_55)+incriticals_56)+incriticals_57)+incriticals_58)+incriticals_59)+incriticals_60)+incriticals_61)+incriticals_62)+incriticals_63)+incriticals_64)+incriticals_65)+incriticals_66)+incriticals_67)+incriticals_68)+incriticals_69)+incriticals_70)+incriticals_71)<=(((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)+processes_5)))
Read [invariant] property : GlobalResAllocation-COL-06-ReachabilityCardinality-10 with value :(((((((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)+processes_5)<=(((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)+resources_10)+resources_11))&&((((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)+resources_10)+resources_11)>=2))||((((((prin_0+prin_1)+prin_2)+prin_3)+prin_4)+prin_5)<=(((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)+processes_5)))||(((((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)+prreleased_5)>=2)||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)+incriticals_18)+incriticals_19)+incriticals_20)+incriticals_21)+incriticals_22)+incriticals_23)+incriticals_24)+incriticals_25)+incriticals_26)+incriticals_27)+incriticals_28)+incriticals_29)+incriticals_30)+incriticals_31)+incriticals_32)+incriticals_33)+incriticals_34)+incriticals_35)+incriticals_36)+incriticals_37)+incriticals_38)+incriticals_39)+incriticals_40)+incriticals_41)+incriticals_42)+incriticals_43)+incriticals_44)+incriticals_45)+incriticals_46)+incriticals_47)+incriticals_48)+incriticals_49)+incriticals_50)+incriticals_51)+incriticals_52)+incriticals_53)+incriticals_54)+incriticals_55)+incriticals_56)+incriticals_57)+incriticals_58)+incriticals_59)+incriticals_60)+incriticals_61)+incriticals_62)+incriticals_63)+incriticals_64)+incriticals_65)+incriticals_66)+incriticals_67)+incriticals_68)+incriticals_69)+incriticals_70)+incriticals_71)>=1)))
Read [invariant] property : GlobalResAllocation-COL-06-ReachabilityCardinality-11 with value :(((((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)+resources_10)+resources_11)>=2)||((!((((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)+processes_5)>=3))&&((((((prin_0+prin_1)+prin_2)+prin_3)+prin_4)+prin_5)<=(((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)+resources_10)+resources_11))))
Read [reachable] property : GlobalResAllocation-COL-06-ReachabilityCardinality-12 with value :((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)+incriticals_18)+incriticals_19)+incriticals_20)+incriticals_21)+incriticals_22)+incriticals_23)+incriticals_24)+incriticals_25)+incriticals_26)+incriticals_27)+incriticals_28)+incriticals_29)+incriticals_30)+incriticals_31)+incriticals_32)+incriticals_33)+incriticals_34)+incriticals_35)+incriticals_36)+incriticals_37)+incriticals_38)+incriticals_39)+incriticals_40)+incriticals_41)+incriticals_42)+incriticals_43)+incriticals_44)+incriticals_45)+incriticals_46)+incriticals_47)+incriticals_48)+incriticals_49)+incriticals_50)+incriticals_51)+incriticals_52)+incriticals_53)+incriticals_54)+incriticals_55)+incriticals_56)+incriticals_57)+incriticals_58)+incriticals_59)+incriticals_60)+incriticals_61)+incriticals_62)+incriticals_63)+incriticals_64)+incriticals_65)+incriticals_66)+incriticals_67)+incriticals_68)+incriticals_69)+incriticals_70)+incriticals_71)>=2)
Read [invariant] property : GlobalResAllocation-COL-06-ReachabilityCardinality-13 with value :(!((((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)+prreleased_5)>=1))
Read [reachable] property : GlobalResAllocation-COL-06-ReachabilityCardinality-14 with value :((!(((((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)+processes_5)>=2)&&((((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)+resources_10)+resources_11)>=1)))||((!((((((prin_0+prin_1)+prin_2)+prin_3)+prin_4)+prin_5)<=(((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)+processes_5)))&&(((((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)+resources_10)+resources_11)>=3)&&((((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)+resources_10)+resources_11)>=2))))
Read [reachable] property : GlobalResAllocation-COL-06-ReachabilityCardinality-15 with value :((!((((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)+resources_10)+resources_11)<=(((((prin_0+prin_1)+prin_2)+prin_3)+prin_4)+prin_5)))&&((((((((processes_0+processes_1)+processes_2)+processes_3)+processes_4)+processes_5)<=(((((prin_0+prin_1)+prin_2)+prin_3)+prin_4)+prin_5))||((((((prreleased_0+prreleased_1)+prreleased_2)+prreleased_3)+prreleased_4)+prreleased_5)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)+incriticals_18)+incriticals_19)+incriticals_20)+incriticals_21)+incriticals_22)+incriticals_23)+incriticals_24)+incriticals_25)+incriticals_26)+incriticals_27)+incriticals_28)+incriticals_29)+incriticals_30)+incriticals_31)+incriticals_32)+incriticals_33)+incriticals_34)+incriticals_35)+incriticals_36)+incriticals_37)+incriticals_38)+incriticals_39)+incriticals_40)+incriticals_41)+incriticals_42)+incriticals_43)+incriticals_44)+incriticals_45)+incriticals_46)+incriticals_47)+incriticals_48)+incriticals_49)+incriticals_50)+incriticals_51)+incriticals_52)+incriticals_53)+incriticals_54)+incriticals_55)+incriticals_56)+incriticals_57)+incriticals_58)+incriticals_59)+incriticals_60)+incriticals_61)+incriticals_62)+incriticals_63)+incriticals_64)+incriticals_65)+incriticals_66)+incriticals_67)+incriticals_68)+incriticals_69)+incriticals_70)+incriticals_71)))&&(!((((((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)+resources_6)+resources_7)+resources_8)+resources_9)+resources_10)+resources_11)>=1))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 11388
// Phase 1: matrix 11388 rows 102 cols
invariant :resources_3 + incriticals_3 + incriticals_15 + incriticals_27 + incriticals_39 + incriticals_51 + incriticals_63 = 1
invariant :-4'processes_3 + -4'processes_5 + resources_0 + incriticals_0 + incriticals_12 + incriticals_24 + -1'incriticals_37 + -1'incriticals_38 + -1'incriticals_39 + -1'incriticals_40 + -1'incriticals_41 + -1'incriticals_42 + -1'incriticals_43 + -1'incriticals_44 + -1'incriticals_45 + -1'incriticals_46 + -1'incriticals_47 + incriticals_48 + -1'incriticals_61 + -1'incriticals_62 + -1'incriticals_63 + -1'incriticals_64 + -1'incriticals_65 + -1'incriticals_66 + -1'incriticals_67 + -1'incriticals_68 + -1'incriticals_69 + -1'incriticals_70 + -1'incriticals_71 + -1'prreleased_3 + -1'prreleased_5 = -7
invariant :-4'processes_4 + resources_7 + prin_0 + -1'incriticals_0 + -1'incriticals_1 + -1'incriticals_2 + -1'incriticals_3 + -1'incriticals_4 + -1'incriticals_5 + -1'incriticals_6 + -1'incriticals_8 + -1'incriticals_9 + -1'incriticals_10 + -1'incriticals_11 + incriticals_19 + incriticals_31 + incriticals_43 + -1'incriticals_48 + -1'incriticals_49 + -1'incriticals_50 + -1'incriticals_51 + -1'incriticals_52 + -1'incriticals_53 + -1'incriticals_54 + -1'incriticals_56 + -1'incriticals_57 + -1'incriticals_58 + -1'incriticals_59 + incriticals_67 + -1'prreleased_4 = -3
invariant :resources_1 + incriticals_1 + incriticals_13 + incriticals_25 + incriticals_37 + incriticals_49 + incriticals_61 = 1
invariant :4'processes_2 + incriticals_24 + incriticals_25 + incriticals_26 + incriticals_27 + incriticals_28 + incriticals_29 + incriticals_30 + incriticals_31 + incriticals_32 + incriticals_33 + incriticals_34 + incriticals_35 + prreleased_2 = 4
invariant :-4'processes_1 + resources_4 + incriticals_4 + -1'incriticals_12 + -1'incriticals_13 + -1'incriticals_14 + -1'incriticals_15 + -1'incriticals_17 + -1'incriticals_18 + -1'incriticals_19 + -1'incriticals_20 + -1'incriticals_21 + -1'incriticals_22 + -1'incriticals_23 + incriticals_28 + incriticals_40 + incriticals_52 + incriticals_64 + -1'prreleased_1 = -3
invariant :4'processes_3 + prin_3 + prreleased_3 = 4
invariant :4'processes_3 + incriticals_36 + incriticals_37 + incriticals_38 + incriticals_39 + incriticals_40 + incriticals_41 + incriticals_42 + incriticals_43 + incriticals_44 + incriticals_45 + incriticals_46 + incriticals_47 + prreleased_3 = 4
invariant :resources_10 + incriticals_10 + incriticals_22 + incriticals_34 + incriticals_46 + incriticals_58 + incriticals_70 = 1
invariant :4'processes_1 + prin_1 + prreleased_1 = 4
invariant :resources_9 + incriticals_9 + incriticals_21 + incriticals_33 + incriticals_45 + incriticals_57 + incriticals_69 = 1
invariant :resources_2 + incriticals_2 + incriticals_14 + incriticals_26 + incriticals_38 + incriticals_50 + incriticals_62 = 1
invariant :4'processes_0 + prin_0 + prreleased_0 = 4
invariant :resources_11 + incriticals_11 + incriticals_23 + incriticals_35 + incriticals_47 + incriticals_59 + incriticals_71 = 1
invariant :4'processes_5 + prin_5 + prreleased_5 = 4
invariant :4'processes_4 + prin_4 + prreleased_4 = 4
invariant :resources_8 + incriticals_8 + incriticals_20 + incriticals_32 + incriticals_44 + incriticals_56 + incriticals_68 = 1
invariant :-1'prin_0 + incriticals_0 + incriticals_1 + incriticals_2 + incriticals_3 + incriticals_4 + incriticals_5 + incriticals_6 + incriticals_7 + incriticals_8 + incriticals_9 + incriticals_10 + incriticals_11 = 0
invariant :4'processes_4 + incriticals_48 + incriticals_49 + incriticals_50 + incriticals_51 + incriticals_52 + incriticals_53 + incriticals_54 + incriticals_55 + incriticals_56 + incriticals_57 + incriticals_58 + incriticals_59 + prreleased_4 = 4
invariant :resources_6 + incriticals_6 + incriticals_18 + incriticals_30 + incriticals_42 + incriticals_54 + incriticals_66 = 1
invariant :4'processes_1 + incriticals_12 + incriticals_13 + incriticals_14 + incriticals_15 + incriticals_16 + incriticals_17 + incriticals_18 + incriticals_19 + incriticals_20 + incriticals_21 + incriticals_22 + incriticals_23 + prreleased_1 = 4
invariant :4'processes_5 + incriticals_60 + incriticals_61 + incriticals_62 + incriticals_63 + incriticals_64 + incriticals_65 + incriticals_66 + incriticals_67 + incriticals_68 + incriticals_69 + incriticals_70 + incriticals_71 + prreleased_5 = 4
invariant :resources_5 + incriticals_5 + incriticals_17 + incriticals_29 + incriticals_41 + incriticals_53 + incriticals_65 = 1
invariant :prin_2 + -1'incriticals_24 + -1'incriticals_25 + -1'incriticals_26 + -1'incriticals_27 + -1'incriticals_28 + -1'incriticals_29 + -1'incriticals_30 + -1'incriticals_31 + -1'incriticals_32 + -1'incriticals_33 + -1'incriticals_34 + -1'incriticals_35 = 0
Compilation finished in 302066 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 399 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>360 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>360 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
FORMULA GlobalResAllocation-COL-06-ReachabilityCardinality-07 FALSE TECHNIQUES SAT_SMT BMC(1)
WARNING : LTSmin timed out (>360 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>360 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>360 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>360 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>360 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>360 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>360 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, GlobalResAllocationCOL06ReachabilityCardinality15==true], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 8:43:46 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 27, 2018 8:43:46 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 8:43:46 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 741 ms
May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 5 places.
May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :Proc->processes,prin,prreleased,
Res->resources,
PR->incriticals,

May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r1 symmetric to r2 in transition enter2
May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r3 symmetric to r1 in transition enter3
May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r1 symmetric to r2 in transition enter3
May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r3 symmetric to r4 in transition enter4
May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r4 symmetric to r1 in transition enter4
May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r1 symmetric to r2 in transition enter4
May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r1 symmetric to r2 in transition release2
May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 7 transitions.
May 27, 2018 8:43:47 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 27, 2018 8:43:47 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
May 27, 2018 8:43:49 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 125202.0 instantiations of transitions. Total transitions/syncs built is 11472
May 27, 2018 8:43:51 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property GlobalResAllocation-COL-06-ReachabilityCardinality-00 is trivially true : it is verified in initial state.
May 27, 2018 8:43:51 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property GlobalResAllocation-COL-06-ReachabilityCardinality-01 is trivially false : it is not verified in initial state.
May 27, 2018 8:43:51 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property GlobalResAllocation-COL-06-ReachabilityCardinality-02 is trivially true : it is verified in initial state.
May 27, 2018 8:43:51 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property GlobalResAllocation-COL-06-ReachabilityCardinality-03 is trivially false : it is not verified in initial state.
May 27, 2018 8:43:51 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property GlobalResAllocation-COL-06-ReachabilityCardinality-05 is trivially false : it is not verified in initial state.
May 27, 2018 8:43:52 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 4591 ms
May 27, 2018 8:44:09 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 11328 transitions. Expanding to a total of 11472 deterministic transitions.
May 27, 2018 8:44:09 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 61 ms.
May 27, 2018 8:44:09 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (11460) to apply POR reductions. Disabling POR matrices.
May 27, 2018 8:44:09 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 4830 ms
May 27, 2018 8:44:10 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 4385 ms
May 27, 2018 8:44:10 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 340 ms
May 27, 2018 8:44:10 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 3 ms
May 27, 2018 8:44:11 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 5844ms conformant to PINS in folder :/home/mcc/execution
May 27, 2018 8:44:12 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 11328 transitions. Expanding to a total of 11472 deterministic transitions.
May 27, 2018 8:44:12 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 120 ms.
May 27, 2018 8:44:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 10 in 6549 ms.
May 27, 2018 8:44:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-04(UNSAT) depth K=0 took 25 ms
May 27, 2018 8:44:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-06(UNSAT) depth K=0 took 4 ms
May 27, 2018 8:44:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-07(UNSAT) depth K=0 took 13 ms
May 27, 2018 8:44:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-09(UNSAT) depth K=0 took 25 ms
May 27, 2018 8:44:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-10(UNSAT) depth K=0 took 1288 ms
May 27, 2018 8:44:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-11(UNSAT) depth K=0 took 29 ms
May 27, 2018 8:44:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-12(UNSAT) depth K=0 took 16 ms
May 27, 2018 8:44:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-13(UNSAT) depth K=0 took 17 ms
May 27, 2018 8:44:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-14(UNSAT) depth K=0 took 11 ms
May 27, 2018 8:44:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-15(UNSAT) depth K=0 took 7 ms
May 27, 2018 8:44:19 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 11328 transitions. Expanding to a total of 11472 deterministic transitions.
May 27, 2018 8:44:19 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 26 ms.
May 27, 2018 8:44:24 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 24 place invariants in 1079 ms
May 27, 2018 8:51:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-04(UNSAT) depth K=1 took 446768 ms
ITS-tools command line returned an error code 137
May 27, 2018 9:03:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-06(UNSAT) depth K=1 took 679608 ms
May 27, 2018 9:03:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: Result is SAT, found a counter-example trace to a state that contradicts invariant/never predicate GlobalResAllocation-COL-06-ReachabilityCardinality-07
May 27, 2018 9:03:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-07(FALSE) depth K=1 took 2624 ms
May 27, 2018 9:06:05 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 102 variables to be positive in 1301972 ms
May 27, 2018 9:07:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-COL-06-ReachabilityCardinality-04
May 27, 2018 9:07:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-04(SAT) depth K=0 took 91620 ms
May 27, 2018 9:07:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-COL-06-ReachabilityCardinality-06
May 27, 2018 9:07:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-06(SAT) depth K=0 took 18919 ms
May 27, 2018 9:08:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesGlobalResAllocation-COL-06-ReachabilityCardinality-09
May 27, 2018 9:08:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-09(SAT) depth K=0 took 39727 ms
May 27, 2018 9:37:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-06-ReachabilityCardinality-09(UNSAT) depth K=1 took 2089853 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-COL-06"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-COL-06.tgz
mv GlobalResAllocation-COL-06 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is GlobalResAllocation-COL-06, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r093-blw7-152650005600376"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;