Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 196K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.4K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 117 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 355 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 28K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is GlobalResAllocation-COL-03, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r093-blw7-152650005600362
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-00
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-01
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-02
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-03
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-04
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-05
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-06
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-07
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-08
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-09
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-10
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-11
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-12
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-13
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-14
FORMULA_NAME GlobalResAllocation-COL-03-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527449263868

19:27:45.865 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
19:27:45.867 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : GlobalResAllocation-COL-03-ReachabilityCardinality-02 with value :((((((prreleased_0+prreleased_1)+prreleased_2)<=(((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5))&&(((processes_0+processes_1)+processes_2)<=((prreleased_0+prreleased_1)+prreleased_2)))||(((prin_0+prin_1)+prin_2)<=(((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)))||((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)>=3))
Read [reachable] property : GlobalResAllocation-COL-03-ReachabilityCardinality-06 with value :((!(((prreleased_0+prreleased_1)+prreleased_2)>=3))&&(!(((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)<=((prreleased_0+prreleased_1)+prreleased_2))||((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)>=1))))
Read [invariant] property : GlobalResAllocation-COL-03-ReachabilityCardinality-08 with value :(((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)<=(((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5))||(((prreleased_0+prreleased_1)+prreleased_2)<=(((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)))||(!((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)<=((prin_0+prin_1)+prin_2))))||((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)>=3))
Read [reachable] property : GlobalResAllocation-COL-03-ReachabilityCardinality-09 with value :((((((prreleased_0+prreleased_1)+prreleased_2)<=((prin_0+prin_1)+prin_2))||((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)>=1))&&(((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)<=((prreleased_0+prreleased_1)+prreleased_2))&&((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)>=2)))&&(!(((processes_0+processes_1)+processes_2)>=1)))
Read [invariant] property : GlobalResAllocation-COL-03-ReachabilityCardinality-10 with value :(((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)<=((processes_0+processes_1)+processes_2))||(((processes_0+processes_1)+processes_2)>=3))&&((((prin_0+prin_1)+prin_2)>=2)&&(((prreleased_0+prreleased_1)+prreleased_2)>=1)))||((((((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)>=3)||(((prin_0+prin_1)+prin_2)>=3))||(((prin_0+prin_1)+prin_2)<=(((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5))))
Read [invariant] property : GlobalResAllocation-COL-03-ReachabilityCardinality-13 with value :(((prin_0+prin_1)+prin_2)<=(((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17))
Read [reachable] property : GlobalResAllocation-COL-03-ReachabilityCardinality-14 with value :((((((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17)<=((prreleased_0+prreleased_1)+prreleased_2))&&(((processes_0+processes_1)+processes_2)>=3))&&(((((prreleased_0+prreleased_1)+prreleased_2)<=(((((((((((((((((incriticals_0+incriticals_1)+incriticals_2)+incriticals_3)+incriticals_4)+incriticals_5)+incriticals_6)+incriticals_7)+incriticals_8)+incriticals_9)+incriticals_10)+incriticals_11)+incriticals_12)+incriticals_13)+incriticals_14)+incriticals_15)+incriticals_16)+incriticals_17))&&(((processes_0+processes_1)+processes_2)>=3))&&(((prreleased_0+prreleased_1)+prreleased_2)>=1)))
Read [reachable] property : GlobalResAllocation-COL-03-ReachabilityCardinality-15 with value :(!((((processes_0+processes_1)+processes_2)<=(((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5))||(!(((prreleased_0+prreleased_1)+prreleased_2)<=(((((resources_0+resources_1)+resources_2)+resources_3)+resources_4)+resources_5)))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 693
// Phase 1: matrix 693 rows 33 cols
invariant :4'processes_0 + prin_0 + prreleased_0 = 4
invariant :resources_2 + incriticals_2 + incriticals_8 + incriticals_14 = 1
invariant :4'processes_1 + incriticals_6 + incriticals_7 + incriticals_8 + incriticals_9 + incriticals_10 + incriticals_11 + prreleased_1 = 4
invariant :4'processes_1 + prin_1 + prreleased_1 = 4
invariant :4'processes_2 + prin_2 + prreleased_2 = 4
invariant :-4'processes_1 + resources_1 + incriticals_1 + -1'incriticals_6 + -1'incriticals_8 + -1'incriticals_9 + -1'incriticals_10 + -1'incriticals_11 + incriticals_13 + -1'prreleased_1 = -3
invariant :resources_3 + incriticals_3 + incriticals_9 + incriticals_15 = 1
invariant :resources_4 + incriticals_4 + incriticals_10 + incriticals_16 = 1
invariant :4'processes_0 + incriticals_0 + incriticals_1 + incriticals_2 + incriticals_3 + incriticals_4 + incriticals_5 + prreleased_0 = 4
invariant :-4'processes_0 + -4'processes_2 + resources_0 + -1'incriticals_1 + -1'incriticals_2 + -1'incriticals_3 + -1'incriticals_4 + -1'incriticals_5 + incriticals_6 + -1'incriticals_13 + -1'incriticals_14 + -1'incriticals_15 + -1'incriticals_16 + -1'incriticals_17 + -1'prreleased_0 + -1'prreleased_2 = -7
invariant :resources_5 + incriticals_5 + incriticals_11 + incriticals_17 = 1
invariant :4'processes_2 + incriticals_12 + incriticals_13 + incriticals_14 + incriticals_15 + incriticals_16 + incriticals_17 + prreleased_2 = 4
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation\_COL\_03\_flat\_flat,6320,0.802505,24736,2,3215,5,43335,6,0,1122,30602,0
Total reachable state count : 6320

Verifying 8 reachability properties.
Invariant property GlobalResAllocation-COL-03-ReachabilityCardinality-02 is true.
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-03-ReachabilityCardinality-02,0,0.849172,24768,1,0,5,43335,7,0,1809,30602,0
Reachability property GlobalResAllocation-COL-03-ReachabilityCardinality-06 does not hold.
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : GlobalResAllocation-COL-03-ReachabilityCardinality-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-03-ReachabilityCardinality-06,0,0.864857,24868,1,0,5,43335,8,0,1983,30602,0
Invariant property GlobalResAllocation-COL-03-ReachabilityCardinality-08 is true.
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-03-ReachabilityCardinality-08,0,0.892129,24868,1,0,5,43335,9,0,2392,30602,0
Reachability property GlobalResAllocation-COL-03-ReachabilityCardinality-09 is true.
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-03-ReachabilityCardinality-09,1908,0.930422,24868,2,3177,6,43335,10,0,2928,30602,0
Invariant property GlobalResAllocation-COL-03-ReachabilityCardinality-10 is true.
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-03-ReachabilityCardinality-10,0,0.948684,24868,1,0,6,43335,11,0,3011,30602,0
Invariant property GlobalResAllocation-COL-03-ReachabilityCardinality-13 is true.
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-03-ReachabilityCardinality-13,0,0.973264,24868,1,0,6,43335,12,0,3468,30602,0
Reachability property GlobalResAllocation-COL-03-ReachabilityCardinality-14 does not hold.
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : GlobalResAllocation-COL-03-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-03-ReachabilityCardinality-14,0,0.97721,24868,1,0,6,43335,13,0,3502,30602,0
Reachability property GlobalResAllocation-COL-03-ReachabilityCardinality-15 does not hold.
FORMULA GlobalResAllocation-COL-03-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : GlobalResAllocation-COL-03-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
GlobalResAllocation-COL-03-ReachabilityCardinality-15,0,0.990151,24868,1,0,6,43335,14,0,3652,30602,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527449270173

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 7:27:45 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 27, 2018 7:27:45 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 7:27:45 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 597 ms
May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 5 places.
May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :Proc->processes,prin,prreleased,
Res->resources,
PR->incriticals,

May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r1 symmetric to r2 in transition enter2
May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r3 symmetric to r1 in transition enter3
May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r1 symmetric to r2 in transition enter3
May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r3 symmetric to r4 in transition enter4
May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r4 symmetric to r1 in transition enter4
May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r1 symmetric to r2 in transition enter4
May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer detectBindingSymmetry
INFO: r1 symmetric to r2 in transition release2
May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 7 transitions.
May 27, 2018 7:27:46 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 27, 2018 7:27:46 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
May 27, 2018 7:27:46 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 4080.0 instantiations of transitions. Total transitions/syncs built is 717
May 27, 2018 7:27:46 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 580 ms
May 27, 2018 7:27:48 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 440 ms
May 27, 2018 7:27:48 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 339 ms
May 27, 2018 7:27:48 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 29 ms
May 27, 2018 7:27:48 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 27, 2018 7:27:48 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 681 transitions. Expanding to a total of 717 deterministic transitions.
May 27, 2018 7:27:48 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 12 ms.
May 27, 2018 7:27:48 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 681 transitions. Expanding to a total of 717 deterministic transitions.
May 27, 2018 7:27:48 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 3 ms.
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 8 in 803 ms.
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 12 place invariants in 82 ms
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-03-ReachabilityCardinality-02(UNSAT) depth K=0 took 10 ms
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-03-ReachabilityCardinality-06(UNSAT) depth K=0 took 4 ms
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-03-ReachabilityCardinality-08(UNSAT) depth K=0 took 21 ms
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-03-ReachabilityCardinality-09(UNSAT) depth K=0 took 22 ms
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-03-ReachabilityCardinality-10(UNSAT) depth K=0 took 9 ms
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-03-ReachabilityCardinality-13(UNSAT) depth K=0 took 11 ms
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-03-ReachabilityCardinality-14(UNSAT) depth K=0 took 15 ms
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property GlobalResAllocation-COL-03-ReachabilityCardinality-15(UNSAT) depth K=0 took 2 ms
May 27, 2018 7:27:49 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 681 transitions. Expanding to a total of 717 deterministic transitions.
May 27, 2018 7:27:49 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 3 ms.
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
May 27, 2018 7:27:49 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (define-fun trsrc515 ((src (Array Int Int))(dst (Array Int Int))) Bool (and (_enabledsrc__515 src) (= (store (store (store (store (store (store (store (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5 (- (select (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5) 1)) 2 (- (select src 2) 1)) 11 (+ (select src 11) 4)) 26 (+ (select src 26) 1)) 26 (+ (select (store (store (store (store (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5 (- (select (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5) 1)) 2 (- (select src 2) 1)) 11 (+ (select src 11) 4)) 26 (+ (select src 26) 1)) 26) 1)) 26 (+ (select (store (store (store (store (store (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5 (- (select (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5) 1)) 2 (- (select src 2) 1)) 11 (+ (select src 11) 4)) 26 (+ (select src 26) 1)) 26 (+ (select (store (store (store (store (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5 (- (select (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5) 1)) 2 (- (select src 2) 1)) 11 (+ (select src 11) 4)) 26 (+ (select src 26) 1)) 26) 1)) 26) 1)) 26 (+ (select (store (store (store (store (store (store (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5 (- (select (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5) 1)) 2 (- (select src 2) 1)) 11 (+ (select src 11) 4)) 26 (+ (select src 26) 1)) 26 (+ (select (store (store (store (store (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5 (- (select (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5) 1)) 2 (- (select src 2) 1)) 11 (+ (select src 11) 4)) 26 (+ (select src 26) 1)) 26) 1)) 26 (+ (select (store (store (store (store (store (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5 (- (select (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5) 1)) 2 (- (select src 2) 1)) 11 (+ (select src 11) 4)) 26 (+ (select src 26) 1)) 26 (+ (select (store (store (store (store (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5 (- (select (store (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5 (- (select (store (store src 5 (- (select src 5) 1)) 5 (- (select (store src 5 (- (select src 5) 1)) 5) 1)) 5) 1)) 5) 1)) 2 (- (select src 2) 1)) 11 (+ (select src 11) 4)) 26 (+ (select src 26) 1)) 26) 1)) 26) 1)) 26) 1)) dst))) with error
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying GlobalResAllocation-COL-03-ReachabilityCardinality-02 SMT depth 1
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 1
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 1
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 27, 2018 7:27:49 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (define-fun tr515 ((step Int)) Bool (trsrc515 (select s step) (select s (+ step 1)))) with error (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
Exception in thread "Thread-8" java.lang.RuntimeException: Error when declaring system variables to SMT solver.(error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.init(NextBMCSolver.java:93)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:59)
at fr.lip6.move.gal.gal2smt.smt.ISMTSolver.init(ISMTSolver.java:17)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:278)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
May 27, 2018 7:27:49 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 0/ 8 properties. Interrupting other analysis methods.
May 27, 2018 7:27:49 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1795ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-COL-03"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-COL-03.tgz
mv GlobalResAllocation-COL-03 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is GlobalResAllocation-COL-03, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r093-blw7-152650005600362"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;