Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...............
/home/mcc/execution
total 400K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.9K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.8K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 241K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is FlexibleBarrier-PT-08b, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r093-blw7-152650005300138
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-00
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-01
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-02
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-03
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-04
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-05
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-06
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-07
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-08
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-09
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-10
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-11
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-12
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-13
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-14
FORMULA_NAME FlexibleBarrier-PT-08b-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527375174019

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1057 rows 920 cols
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-00 with value :(((!((i0.i0.i0.i0.i0.i0.i0.u9.p138==0)||(i0.u15.p620==1)))&&(((i0.i0.i0.i0.i0.i0.i0.u8.p25==0)||(i1.u17.p811==1))||((i0.i0.i0.i0.i0.i0.i0.u9.p131==0)||(i1.u18.p918==1))))||((i1.u17.p900==0)||(i0.i0.i0.u13.p430==1)))
Read [reachable] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-01 with value :((!((i0.i0.i0.u13.p441>=2)||(i0.i0.i0.i0.i0.i0.i0.u9.p107>=2)))&&(i0.i0.u14.p546>=1))
Read [reachable] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-02 with value :(((!((i0.i0.i0.i0.i0.i0.i0.u8.p11==0)||(i0.i0.u14.p569==1)))&&(!(i0.i0.i0.u13.p511>=3)))&&((i1.u17.p748==0)||(i0.i0.i0.i0.u12.p396==1)))
Read [reachable] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-03 with value :((((i0.u15.p624>=1)&&((i0.i0.i0.u13.p491==0)||(i0.i0.i0.i0.i0.i0.i0.u9.p158==1)))&&(!(i1.u17.p886>=2)))&&(i0.i0.i0.i0.i0.i0.i0.u8.p65>=3))
Read [reachable] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-04 with value :(!((i0.i0.i0.i0.i0.i0.i0.u9.p129==0)||(i0.i0.i0.i0.i0.i0.i0.u9.p159==1)))
Read [reachable] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-05 with value :(!((i0.u15.p612==0)||(i0.i0.i0.i0.i0.i0.u10.p178==1)))
Read [reachable] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-06 with value :(i0.i0.i0.i0.i0.i0.i0.u8.p78>=1)
Read [reachable] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-07 with value :(((((i0.i0.i0.u13.p487==0)||(i0.i0.i0.i0.i0.i0.u10.p198==1))&&(i0.i0.i0.i0.u12.p359>=2))||(((i0.u15.p653==0)||(i0.i0.i0.i0.i0.i0.u10.p258==1))&&(i0.i0.i0.i0.i0.i0.i0.u9.p137>=2)))&&(!((i1.u17.p748>=2)||(i0.i0.i0.i0.i0.i0.u10.p187>=3))))
Read [invariant] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-08 with value :((i0.i0.i0.i0.i0.i0.u10.p207==0)||(i0.i0.i0.i0.i0.i0.i0.u9.p142==1))
Read [invariant] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-09 with value :(!(i0.i0.i0.i0.u12.p366>=3))
Read [reachable] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-10 with value :((i1.u17.p873>=1)&&((((i0.i0.i0.i0.i0.i0.i0.u9.p100==0)||(i0.i0.u14.p570==1))||(i0.i0.i0.i0.i0.i0.u10.p176>=1))&&(((i0.i0.u14.p574==0)||(i0.i0.i0.u26.p3==1))&&(i1.u17.p814>=1))))
Read [invariant] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-11 with value :(((i0.i0.i0.i0.i0.u11.p288==0)||(i0.i0.i0.i0.i0.i0.i0.u8.p59==1))||(!((i0.i0.i0.i0.i0.i0.u10.p257==0)||(i0.i0.i0.i0.i0.i0.u10.p212==1))))
Read [invariant] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-12 with value :((i0.i0.i0.i0.i0.i0.u10.p250>=3)||(!(i0.i0.i0.i0.i0.i0.i0.u8.p58>=2)))
Read [invariant] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-13 with value :((((i1.u17.p662>=2)||((i0.i0.i0.i0.i0.i0.u10.p230==0)||(i0.u15.p627==1)))&&(!(i0.i0.i0.i0.u27.p4>=3)))||(i0.i0.i0.i0.u12.p350>=2))
Read [reachable] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-14 with value :(i0.i0.i0.u13.p494>=3)
Read [reachable] property : FlexibleBarrier-PT-08b-ReachabilityCardinality-15 with value :((!(((i1.u17.p760==0)||(i1.u17.p874==1))&&((i0.i0.i0.i0.i0.i0.i0.u9.p94==0)||(i0.i0.i0.u13.p442==1))))&&(!(i0.i0.i0.i0.u12.p349>=1)))
built 4 ordering constraints for composite.
built 162 ordering constraints for composite.
built 154 ordering constraints for composite.
built 144 ordering constraints for composite.
built 130 ordering constraints for composite.
built 112 ordering constraints for composite.
built 90 ordering constraints for composite.
built 64 ordering constraints for composite.
built 156 ordering constraints for composite.
invariant :p0 + p1 + p2 + p3 + p428 + p429 + p430 + p431 + p432 + p433 + p434 + p435 + p436 + p437 + p438 + p439 + p440 + p441 + p442 + p443 + p444 + p445 + p446 + p447 + p448 + p449 + p450 + p451 + p452 + p453 + p454 + p455 + p456 + p457 + p458 + p459 + p460 + p461 + p462 + p463 + p464 + p465 + p466 + p467 + p468 + p469 + p470 + p471 + p472 + p473 + p474 + p475 + p476 + p477 + p478 + p479 + p480 + p481 + p482 + p483 + p484 + p485 + p486 + p487 + p488 + p489 + p490 + p491 + p492 + p493 + p494 + p495 + p496 + p497 + p498 + p499 + p500 + p501 + p502 + p503 + p504 + p505 + p506 + p507 + p508 + p509 + p510 + p511 = 1
invariant :p0 + p1 + p2 + p3 + p4 + p5 + p6 + p176 + p177 + p178 + p179 + p180 + p181 + p182 + p183 + p184 + p185 + p186 + p187 + p188 + p189 + p190 + p191 + p192 + p193 + p194 + p195 + p196 + p197 + p198 + p199 + p200 + p201 + p202 + p203 + p204 + p205 + p206 + p207 + p208 + p209 + p210 + p211 + p212 + p213 + p214 + p215 + p216 + p217 + p218 + p219 + p220 + p221 + p222 + p223 + p224 + p225 + p226 + p227 + p228 + p229 + p230 + p231 + p232 + p233 + p234 + p235 + p236 + p237 + p238 + p239 + p240 + p241 + p242 + p243 + p244 + p245 + p246 + p247 + p248 + p249 + p250 + p251 + p252 + p253 + p254 + p255 + p256 + p257 + p258 + p259 = 1
invariant :p0 + p1 + p2 + p3 + p4 + p344 + p345 + p346 + p347 + p348 + p349 + p350 + p351 + p352 + p353 + p354 + p355 + p356 + p357 + p358 + p359 + p360 + p361 + p362 + p363 + p364 + p365 + p366 + p367 + p368 + p369 + p370 + p371 + p372 + p373 + p374 + p375 + p376 + p377 + p378 + p379 + p380 + p381 + p382 + p383 + p384 + p385 + p386 + p387 + p388 + p389 + p390 + p391 + p392 + p393 + p394 + p395 + p396 + p397 + p398 + p399 + p400 + p401 + p402 + p403 + p404 + p405 + p406 + p407 + p408 + p409 + p410 + p411 + p412 + p413 + p414 + p415 + p416 + p417 + p418 + p419 + p420 + p421 + p422 + p423 + p424 + p425 + p426 + p427 = 1
invariant :p0 + p1 + p2 + p512 + p513 + p514 + p515 + p516 + p517 + p518 + p519 + p520 + p521 + p522 + p523 + p524 + p525 + p526 + p527 + p528 + p529 + p530 + p531 + p532 + p533 + p534 + p535 + p536 + p537 + p538 + p539 + p540 + p541 + p542 + p543 + p544 + p545 + p546 + p547 + p548 + p549 + p550 + p551 + p552 + p553 + p554 + p555 + p556 + p557 + p558 + p559 + p560 + p561 + p562 + p563 + p564 + p565 + p566 + p567 + p568 + p569 + p570 + p571 + p572 + p573 + p574 + p575 + p576 + p577 + p578 + p579 + p580 + p581 + p582 + p583 + p584 + p585 + p586 + p587 + p588 + p589 + p590 + p591 + p592 + p593 + p594 + p595 = 1
invariant :p0 + p655 + p908 + p909 + p910 + p911 + p912 + p913 + p914 + p915 + p916 + p917 + p918 + p919 = 1
invariant :p0 + p655 + p656 + p657 + p658 + p659 + p660 + p661 + p662 + p663 + p664 + p665 + p666 + p667 + p668 + p669 + p670 + p671 + p672 + p673 + p674 + p675 + p676 + p677 + p678 + p679 + p680 + p681 + p682 + p683 + p684 + p685 + p686 + p687 + p688 + p689 + p690 + p691 + p692 + p693 + p694 + p695 + p696 + p697 + p698 + p699 + p700 + p701 + p702 + p703 + p704 + p705 + p706 + p707 + p708 + p709 + p710 + p711 + p712 + p713 + p714 + p715 + p716 + p717 + p718 + p719 + p720 + p721 + p722 + p723 + p724 + p725 + p726 + p727 + p728 + p729 + p730 + p731 + p732 + p733 + p734 + p735 + p736 + p737 + p738 + p739 + p740 + p741 + p742 + p743 + p744 + p745 + p746 + p747 + p748 + p749 + p750 + p751 + p752 + p753 + p754 + p755 + p756 + p757 + p758 + p759 + p760 + p761 + p762 + p763 + p764 + p765 + p766 + p767 + p768 + p769 + p770 + p771 + p772 + p773 + p774 + p775 + p776 + p777 + p778 + p779 + p780 + p781 + p782 + p783 + p784 + p785 + p786 + p787 + p788 + p789 + p790 + p791 + p792 + p793 + p794 + p795 + p796 + p797 + p798 + p799 + p800 + p801 + p802 + p803 + p804 + p805 + p806 + p807 + p808 + p809 + p810 + p811 + p812 + p813 + p814 + p815 + p816 + p817 + p818 + p819 + p820 + p821 + p822 + p823 + p824 + p825 + p826 + p827 + p828 + p829 + p830 + p831 + p832 + p833 + p834 + p835 + p836 + p837 + p838 + p839 + p840 + p841 + p842 + p843 + p844 + p845 + p846 + p847 + p848 + p849 + p850 + p851 + p852 + p853 + p854 + p855 + p856 + p857 + p858 + p859 + p860 + p861 + p862 + p863 + p864 + p865 + p866 + p867 + p868 + p869 + p870 + p871 + p872 + p873 + p874 + p875 + p876 + p877 + p878 + p879 + p880 + p881 + p882 + p883 + p884 + p885 + p886 + p887 + p888 + p889 + p890 + p891 + p892 + p893 + p894 + p895 + p896 + p897 + p898 + p899 + p900 + p901 + p902 + p903 + p904 + p905 + p906 + p907 = 1
invariant :p0 + p1 + p2 + p3 + p4 + p5 + p260 + p261 + p262 + p263 + p264 + p265 + p266 + p267 + p268 + p269 + p270 + p271 + p272 + p273 + p274 + p275 + p276 + p277 + p278 + p279 + p280 + p281 + p282 + p283 + p284 + p285 + p286 + p287 + p288 + p289 + p290 + p291 + p292 + p293 + p294 + p295 + p296 + p297 + p298 + p299 + p300 + p301 + p302 + p303 + p304 + p305 + p306 + p307 + p308 + p309 + p310 + p311 + p312 + p313 + p314 + p315 + p316 + p317 + p318 + p319 + p320 + p321 + p322 + p323 + p324 + p325 + p326 + p327 + p328 + p329 + p330 + p331 + p332 + p333 + p334 + p335 + p336 + p337 + p338 + p339 + p340 + p341 + p342 + p343 = 1
invariant :p0 + p1 + p2 + p3 + p4 + p5 + p6 + p7 + p92 + p93 + p94 + p95 + p96 + p97 + p98 + p99 + p100 + p101 + p102 + p103 + p104 + p105 + p106 + p107 + p108 + p109 + p110 + p111 + p112 + p113 + p114 + p115 + p116 + p117 + p118 + p119 + p120 + p121 + p122 + p123 + p124 + p125 + p126 + p127 + p128 + p129 + p130 + p131 + p132 + p133 + p134 + p135 + p136 + p137 + p138 + p139 + p140 + p141 + p142 + p143 + p144 + p145 + p146 + p147 + p148 + p149 + p150 + p151 + p152 + p153 + p154 + p155 + p156 + p157 + p158 + p159 + p160 + p161 + p162 + p163 + p164 + p165 + p166 + p167 + p168 + p169 + p170 + p171 + p172 + p173 + p174 + p175 = 1
invariant :p0 + p1 + p2 + p3 + p4 + p5 + p6 + p7 + p8 + p9 + p10 + p11 + p12 + p13 + p14 + p15 + p16 + p17 + p18 + p19 + p20 + p21 + p22 + p23 + p24 + p25 + p26 + p27 + p28 + p29 + p30 + p31 + p32 + p33 + p34 + p35 + p36 + p37 + p38 + p39 + p40 + p41 + p42 + p43 + p44 + p45 + p46 + p47 + p48 + p49 + p50 + p51 + p52 + p53 + p54 + p55 + p56 + p57 + p58 + p59 + p60 + p61 + p62 + p63 + p64 + p65 + p66 + p67 + p68 + p69 + p70 + p71 + p72 + p73 + p74 + p75 + p76 + p77 + p78 + p79 + p80 + p81 + p82 + p83 + p84 + p85 + p86 + p87 + p88 + p89 + p90 + p91 = 1
invariant :p0 + p1 + p596 + p597 + p598 + p599 + p600 + p601 + p602 + p603 + p604 + p605 + p606 + p607 + p608 + p609 + p610 + p611 + p612 + p613 + p614 + p615 + p616 + p617 + p618 + p619 + p620 + p621 + p622 + p623 + p624 + p625 + p626 + p627 + p628 + p629 + p630 + p631 + p632 + p633 + p634 + p635 + p636 + p637 + p638 + p639 + p640 + p641 + p642 + p643 + p644 + p645 + p646 + p647 + p648 + p649 + p650 + p651 + p652 + p653 + p654 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 9738 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 112 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality01==true], workingDir=/home/mcc/execution]
LTSmin run took 67229 ms.
Found Violation
FORMULA FlexibleBarrier-PT-08b-ReachabilityCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality02==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality02==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality03==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality03==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality04==true], workingDir=/home/mcc/execution]
LTSmin run took 5339 ms.
Found Violation
FORMULA FlexibleBarrier-PT-08b-ReachabilityCardinality-04 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality05==true], workingDir=/home/mcc/execution]
LTSmin run took 18415 ms.
Found Violation
FORMULA FlexibleBarrier-PT-08b-ReachabilityCardinality-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality06==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality06==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality07==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality07==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality08==true], workingDir=/home/mcc/execution]
LTSmin run took 5499 ms.
Found Violation
FORMULA FlexibleBarrier-PT-08b-ReachabilityCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality09==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality09==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality10==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality10==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality11==true], workingDir=/home/mcc/execution]
LTSmin run took 99797 ms.
Found Violation
FORMULA FlexibleBarrier-PT-08b-ReachabilityCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality12==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality12==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality13==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality13==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality14==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality14==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality15==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality15==true], workingDir=/home/mcc/execution]
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality00==true], workingDir=/home/mcc/execution]
LTSmin run took 557018 ms.
Found Violation
FORMULA FlexibleBarrier-PT-08b-ReachabilityCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, FlexibleBarrierPT08bReachabilityCardinality02==true], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 26, 2018 10:52:55 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 26, 2018 10:52:55 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 26, 2018 10:52:56 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 108 ms
May 26, 2018 10:52:56 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 920 places.
May 26, 2018 10:52:56 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1057 transitions.
May 26, 2018 10:52:56 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 26, 2018 10:52:56 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 39 ms
May 26, 2018 10:52:56 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 166 ms
May 26, 2018 10:52:56 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 26, 2018 10:52:56 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 214 ms
May 26, 2018 10:52:56 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 208 ms
May 26, 2018 10:52:56 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1057 transitions.
May 26, 2018 10:52:56 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 131 ms
May 26, 2018 10:52:56 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 26, 2018 10:52:57 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 131 ms
May 26, 2018 10:52:57 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 26, 2018 10:52:57 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 49 redundant transitions.
May 26, 2018 10:52:57 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 10 ms
May 26, 2018 10:52:57 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 26, 2018 10:52:57 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 10 place invariants in 519 ms
May 26, 2018 10:52:59 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 920 variables to be positive in 2082 ms
May 26, 2018 10:52:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1057 transitions.
May 26, 2018 10:52:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1057 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 10:52:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 110 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 10:52:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1057 transitions.
May 26, 2018 10:52:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 35 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 10:53:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1057 transitions.
May 26, 2018 10:53:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/1057) took 2364 ms. Total solver calls (SAT/UNSAT): 5207(96/5111)
May 26, 2018 10:53:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/1057) took 5732 ms. Total solver calls (SAT/UNSAT): 12452(342/12110)
May 26, 2018 10:53:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/1057) took 8950 ms. Total solver calls (SAT/UNSAT): 17994(572/17422)
May 26, 2018 10:53:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/1057) took 12058 ms. Total solver calls (SAT/UNSAT): 25619(837/24782)
May 26, 2018 10:53:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/1057) took 15274 ms. Total solver calls (SAT/UNSAT): 33944(1122/32822)
May 26, 2018 10:53:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/1057) took 18294 ms. Total solver calls (SAT/UNSAT): 42062(1371/40691)
May 26, 2018 10:53:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(182/1057) took 21321 ms. Total solver calls (SAT/UNSAT): 49482(1616/47866)
May 26, 2018 10:53:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(225/1057) took 24361 ms. Total solver calls (SAT/UNSAT): 56921(1859/55062)
May 26, 2018 10:53:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(302/1057) took 27374 ms. Total solver calls (SAT/UNSAT): 65009(2081/62928)
May 26, 2018 10:53:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(425/1057) took 30390 ms. Total solver calls (SAT/UNSAT): 75265(2218/73047)
May 26, 2018 10:53:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(551/1057) took 33401 ms. Total solver calls (SAT/UNSAT): 84868(2405/82463)
May 26, 2018 10:53:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(677/1057) took 36423 ms. Total solver calls (SAT/UNSAT): 95238(2542/92696)
May 26, 2018 10:53:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(811/1057) took 39440 ms. Total solver calls (SAT/UNSAT): 104792(2694/102098)
May 26, 2018 10:53:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(910/1057) took 42478 ms. Total solver calls (SAT/UNSAT): 111536(3153/108383)
May 26, 2018 10:53:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(966/1057) took 45506 ms. Total solver calls (SAT/UNSAT): 115980(3377/112603)
May 26, 2018 10:53:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 47405 ms. Total solver calls (SAT/UNSAT): 118985(3377/115608)
May 26, 2018 10:53:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 1057 transitions.
May 26, 2018 10:53:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 123 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 10:53:47 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 51141ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 137

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FlexibleBarrier-PT-08b"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/FlexibleBarrier-PT-08b.tgz
mv FlexibleBarrier-PT-08b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is FlexibleBarrier-PT-08b, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r093-blw7-152650005300138"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;