About the Execution of Tapaal for DLCround-PT-05a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 145.180 | 331.00 | 110.00 | 2.50 | TTTFFFFFTFTTFTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 424K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.0K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.4K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 259K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool tapaal
Input is DLCround-PT-05a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r072-smll-152649744600033
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-00
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-01
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-02
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-03
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-04
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-05
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-06
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-07
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-08
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-09
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1526684660292
tapaal
---> tapaal --- TAPAAL
Total timeout: 3590
Time left: 3590
**********************************************
* TAPAAL verifying ReachabilityCardinality *
**********************************************
/home/mcc/tmp
/home/mcc/tmp/tmp.fcXSWigUeS
/home/mcc/tmp/tmp.BQqDhTPArA
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)
Time left: 3590
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
/home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --write-simplified /home/mcc/tmp/tmp.fcXSWigUeS --write-reduced /home/mcc/tmp/tmp.BQqDhTPArA -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./ReachabilityCardinality.xml
FORMULA DLCround-PT-05a-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 0 was solved
Query is satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 1 was solved
Query is satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 2 was solved
Query is satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 3 was solved
Query is NOT satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 4 was solved
Query is NOT satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 5 was solved
Query is NOT satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 6 was solved
Query is NOT satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 7 was solved
Query is NOT satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 8 was solved
Query is satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 9 was solved
Query is NOT satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 10 was solved
Query is satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 11 was solved
Query is satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 12 was solved
Query is NOT satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 13 was solved
Query is satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 14 was solved
Query is satisfied.
FORMULA DLCround-PT-05a-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX
Query index 15 was solved
Query is satisfied.
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Solution found by parallel simplification (step 0)
Time left: 3590
---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (0 in total)
Each query is verified by 4 parallel strategies for 256 seconds
All queries are solved
Time left: 3590
BK_STOP 1526684660623
--------------------
content from stderr:
CPN OverApproximation is only usable on colored models
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-05a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="tapaal"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-05a.tgz
mv DLCround-PT-05a execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool tapaal"
echo " Input is DLCround-PT-05a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r072-smll-152649744600033"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;