Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 708K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.5K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.7K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 547K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DLCround-PT-04b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r069-smll-152649741700027
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-04b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527235756392

Flatten gal took : 502 ms
Constant places removed 1 places and 1 transitions.
Performed 1024 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 1025 rules applied. Total rules applied 1025 place count 1679 transition count 1339
Constant places removed 1026 places and 2 transitions.
Reduce isomorphic transitions removed 27 transitions.
Performed 22 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 1075 rules applied. Total rules applied 2100 place count 653 transition count 1288
Constant places removed 22 places and 0 transitions.
Reduce isomorphic transitions removed 4 transitions.
Performed 4 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 30 rules applied. Total rules applied 2130 place count 631 transition count 1280
Constant places removed 4 places and 0 transitions.
Iterating post reduction 3 with 4 rules applied. Total rules applied 2134 place count 627 transition count 1280
Performed 4 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 4 with 4 Pre rules applied. Total rules applied 2134 place count 627 transition count 1276
Constant places removed 4 places and 0 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 2138 place count 623 transition count 1276
Symmetric choice reduction at 5 with 111 rule applications. Total rules 2249 place count 623 transition count 1276
Constant places removed 111 places and 111 transitions.
Iterating post reduction 5 with 111 rules applied. Total rules applied 2360 place count 512 transition count 1165
Performed 15 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 6 with 15 Pre rules applied. Total rules applied 2360 place count 512 transition count 1150
Constant places removed 15 places and 0 transitions.
Iterating post reduction 6 with 15 rules applied. Total rules applied 2375 place count 497 transition count 1150
Symmetric choice reduction at 7 with 9 rule applications. Total rules 2384 place count 497 transition count 1150
Constant places removed 9 places and 60 transitions.
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 7 with 13 rules applied. Total rules applied 2397 place count 488 transition count 1086
Performed 169 Post agglomeration using F-continuation condition.
Constant places removed 169 places and 0 transitions.
Iterating post reduction 8 with 169 rules applied. Total rules applied 2566 place count 319 transition count 912
Symmetric choice reduction at 9 with 20 rule applications. Total rules 2586 place count 319 transition count 912
Constant places removed 20 places and 160 transitions.
Iterating post reduction 9 with 20 rules applied. Total rules applied 2606 place count 299 transition count 752
Performed 26 Post agglomeration using F-continuation condition.
Constant places removed 26 places and 0 transitions.
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 10 with 35 rules applied. Total rules applied 2641 place count 273 transition count 855
Applied a total of 2641 rules in 788 ms. Remains 273 /1680 variables (removed 1407) and now considering 855/2364 (removed 1509) transitions.
Normalized transition count is 787
// Phase 1: matrix 787 rows 273 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 787
// Phase 1: matrix 787 rows 273 cols
invariant :p1173 + p1176 + p1177 = 1
invariant :p784 + p791 + p803 + p805 + p809 + p811 + p821 + p829 + p831 + p846 + p848 + p873 + p889 = 1
invariant :p1323 + p1326 + p1327 = 1
invariant :p1553 + p1556 + p1557 = 1
invariant :p20 + p33 + p39 + p48 + p64 + p73 + p102 = 1
invariant :p1293 + p1296 + p1297 = 1
invariant :p329 + p342 + p348 + p357 + p373 + p382 + p411 = 1
invariant :p1343 + p1346 + p1347 = 1
invariant :p1213 + p1216 + p1217 = 1
invariant :p1503 + p1506 + p1507 = 1
invariant :p1103 + p1106 + p1107 = 1
invariant :p1393 + p1396 + p1397 = 1
invariant :p1353 + p1356 + p1357 = 1
invariant :p1643 + p1646 + p1647 = 1
invariant :p1183 + p1186 + p1187 = 1
invariant :p1193 + p1196 + p1197 = 1
invariant :p1443 + p1446 + p1447 = 1
invariant :p1283 + p1286 + p1287 = 1
invariant :p1623 + p1626 + p1627 = 1
invariant :p1373 + p1376 + p1377 = 1
invariant :p1633 + p1636 + p1637 = 1
invariant :p1513 + p1516 + p1517 = 1
invariant :p1243 + p1246 + p1247 = 1
invariant :p1473 + p1476 + p1477 = 1
invariant :p1233 + p1236 + p1237 = 1
invariant :p1413 + p1416 + p1417 = 1
invariant :p1483 + p1486 + p1487 = 1
invariant :p1223 + p1226 + p1227 = 1
invariant :p1263 + p1266 + p1267 = 1
invariant :p1133 + p1136 + p1137 = 1
invariant :p424 + p431 + p443 + p445 + p449 + p451 + p461 + p469 + p471 + p486 + p488 + p513 + p529 = 1
invariant :p1313 + p1316 + p1317 = 1
invariant :p1163 + p1166 + p1167 = 1
invariant :p226 + p239 + p245 + p254 + p270 + p279 + p308 = 1
invariant :p1673 + p1676 + p1677 = 1
invariant :p1523 + p1526 + p1527 = 1
invariant :p1603 + p1606 + p1607 = 1
invariant :p1563 + p1566 + p1567 = 1
invariant :p1093 + p1096 + p1097 = 1
invariant :p1203 + p1206 + p1207 = 1
invariant :p1533 + p1536 + p1537 = 1
invariant :p1303 + p1306 + p1307 = 1
invariant :p1333 + p1336 + p1337 = 1
invariant :p664 + p671 + p683 + p685 + p689 + p691 + p701 + p709 + p711 + p726 + p728 + p753 + p769 = 1
invariant :p1543 + p1546 + p1547 = 1
invariant :p1253 + p1256 + p1257 = 1
invariant :p1273 + p1276 + p1277 = 1
invariant :p1613 + p1616 + p1617 = 1
invariant :p1433 + p1436 + p1437 = 1
invariant :p1573 + p1576 + p1577 = 1
invariant :p1583 + p1586 + p1587 = 1
invariant :p1363 + p1366 + p1367 = 1
invariant :p1113 + p1116 + p1117 = 1
invariant :p123 + p136 + p142 + p151 + p167 + p176 + p205 = 1
invariant :p1663 + p1666 + p1667 = 1
invariant :p1153 + p1156 + p1157 = 1
invariant :p544 + p551 + p563 + p565 + p569 + p571 + p581 + p589 + p591 + p606 + p608 + p633 + p649 = 1
invariant :p1453 + p1456 + p1457 = 1
invariant :p1653 + p1656 + p1657 = 1
invariant :p904 + p911 + p923 + p925 + p929 + p931 + p941 + p949 + p951 + p966 + p968 + p993 + p1009 = 1
invariant :p1403 + p1406 + p1407 = 1
invariant :p1083 + p1086 + p1087 = 1
invariant :p1143 + p1146 + p1147 = 1
invariant :p1123 + p1126 + p1127 = 1
invariant :p1423 + p1426 + p1427 = 1
invariant :p1593 + p1596 + p1597 = 1
invariant :p1493 + p1496 + p1497 = 1
invariant :p1383 + p1386 + p1387 = 1
invariant :p1463 + p1466 + p1467 = 1
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 1 ordering constraints for composite.
built 600 ordering constraints for composite.
built 528 ordering constraints for composite.
built 456 ordering constraints for composite.
built 384 ordering constraints for composite.
built 312 ordering constraints for composite.
built 240 ordering constraints for composite.
built 180 ordering constraints for composite.
built 120 ordering constraints for composite.
built 600 ordering constraints for composite.
built 591 ordering constraints for composite.
built 582 ordering constraints for composite.
built 573 ordering constraints for composite.
built 564 ordering constraints for composite.
built 555 ordering constraints for composite.
built 546 ordering constraints for composite.
built 537 ordering constraints for composite.
built 528 ordering constraints for composite.
built 519 ordering constraints for composite.
built 510 ordering constraints for composite.
built 501 ordering constraints for composite.
built 492 ordering constraints for composite.
built 483 ordering constraints for composite.
built 474 ordering constraints for composite.
built 465 ordering constraints for composite.
built 456 ordering constraints for composite.
built 447 ordering constraints for composite.
built 438 ordering constraints for composite.
built 429 ordering constraints for composite.
built 420 ordering constraints for composite.
built 410 ordering constraints for composite.
built 399 ordering constraints for composite.
built 389 ordering constraints for composite.
built 378 ordering constraints for composite.
built 368 ordering constraints for composite.
built 357 ordering constraints for composite.
built 347 ordering constraints for composite.
built 336 ordering constraints for composite.
built 326 ordering constraints for composite.
built 315 ordering constraints for composite.
built 305 ordering constraints for composite.
built 294 ordering constraints for composite.
built 284 ordering constraints for composite.
built 273 ordering constraints for composite.
built 263 ordering constraints for composite.
built 252 ordering constraints for composite.
built 242 ordering constraints for composite.
built 231 ordering constraints for composite.
built 221 ordering constraints for composite.
built 210 ordering constraints for composite.
built 200 ordering constraints for composite.
built 189 ordering constraints for composite.
built 179 ordering constraints for composite.
built 168 ordering constraints for composite.
built 158 ordering constraints for composite.
built 147 ordering constraints for composite.
built 137 ordering constraints for composite.
built 126 ordering constraints for composite.
built 116 ordering constraints for composite.
built 105 ordering constraints for composite.
built 95 ordering constraints for composite.
built 84 ordering constraints for composite.
built 74 ordering constraints for composite.
built 63 ordering constraints for composite.
built 53 ordering constraints for composite.
built 42 ordering constraints for composite.
built 32 ordering constraints for composite.
built 21 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,3.77906e+37,4.40862,42016,140,26,4347,223,1515,6755,95,415,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,800512,6.16108,99008,278,46,213866,512,5733,580269,392,907,2678

System contains 800512 deadlocks (shown below if less than --print-limit option) !
FORMULA DLCround-PT-04b-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 800512 states ] showing 10 first states
[ i1={[ u136={[ p1673=1 ]
} i0={[ u135={[ p1663=1 ]
} i0={[ u134={[ p1653=1 ]
} i0={[ u133={[ p1643=1 ]
} i0={[ u132={[ p1633=1 ]
} i0={[ u131={[ p1623=1 ]
} i0={[ u130={[ p1613=1 ]
} i0={[ u129={[ p1603=1 ]
} i0={[ u128={[ p1593=1 ]
} i0={[ u127={[ p1583=1 ]
} i0={[ u126={[ p1573=1 ]
} i0={[ u125={[ p1563=1 ]
} i0={[ u124={[ p1553=1 ]
} i0={[ u123={[ p1543=1 ]
} i0={[ u122={[ p1533=1 ]
} i0={[ u121={[ p1523=1 ]
} i0={[ u120={[ p1513=1 ]
} i0={[ u119={[ p1503=1 ]
} i0={[ u118={[ p1493=1 ]
} i0={[ u117={[ p1483=1 ]
} i0={[ u116={[ p1473=1 ]
} i0={[ u115={[ p1463=1 ]
} i0={[ u114={[ p1453=1 ]
} i0={[ u113={[ p1443=1 ]
} i0={[ u112={[ p1433=1 ]
} i0={[ u111={[ p1423=1 ]
} i0={[ u110={[ p1413=1 ]
} i0={[ u109={[ p1403=1 ]
} i0={[ u108={[ p1393=1 ]
} i0={[ u107={[ p1383=1 ]
} i0={[ u106={[ p1373=1 ]
} i0={[ u105={[ p1363=1 ]
} i0={[ u104={[ p1353=1 ]
} i0={[ u103={[ p1343=1 ]
} i0={[ u102={[ p1333=1 ]
} i0={[ u101={[ p1323=1 ]
} i0={[ u100={[ p1313=1 ]
} i0={[ u99={[ p1303=1 ]
} i0={[ u98={[ p1293=1 ]
} i0={[ u97={[ p1283=1 ]
} i0={[ u96={[ p1273=1 ]
} i0={[ u95={[ p1263=1 ]
} i0={[ u94={[ p1253=1 ]
} i0={[ u93={[ p1243=1 ]
} i0={[ u92={[ p1233=1 ]
} i0={[ u91={[ p1223=1 ]
} i0={[ u90={[ p1213=1 ]
} i0={[ u89={[ p1203=1 ]
} i0={[ u88={[ p1193=1 ]
} i0={[ u87={[ p1183=1 ]
} i0={[ u86={[ p1173=1 ]
} i0={[ u85={[ p1163=1 ]
} i0={[ u84={[ p1153=1 ]
} i0={[ u83={[ p1143=1 ]
} i0={[ u82={[ p1133=1 ]
} i0={[ u81={[ p1123=1 ]
} i0={[ u80={[ p1113=1 ]
} i0={[ u79={[ p1103=1 ]
} i0={[ u78={[ p1093=1 ]
} u77={[ p1083=1 ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} i0={[ u17={[ p904=1 ]
[ p931=1 ]
[ p951=1 ]
[ p941=1 ]
[ p968=1 ]
} i0={[ u16={[ p784=1 ]
[ p811=1 ]
[ p831=1 ]
[ p821=1 ]
[ p848=1 ]
} i0={[ u15={[ p664=1 ]
[ p691=1 ]
[ p711=1 ]
[ p701=1 ]
[ p728=1 ]
} i0={[ u14={[ p544=1 ]
[ p571=1 ]
[ p591=1 ]
[ p581=1 ]
[ p608=1 ]
} i0={[ u13={[ p424=1 ]
[ p451=1 ]
[ p471=1 ]
[ p461=1 ]
[ p488=1 ]
} i0={[ u12={[ p329=1 ]
[ p342=1 ]
[ p373=1 ]
[ p382=1 ]
} i0={[ u11={[ p226=1 ]
[ p239=1 ]
[ p270=1 ]
[ p279=1 ]
} i0={[ u10={[ p123=1 ]
[ p136=1 ]
[ p167=1 ]
[ p176=1 ]
} u9={[ p20=1 ]
[ p33=1 ]
[ p64=1 ]
[ p73=1 ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527235776287

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 8:09:18 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 8:09:18 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 8:09:18 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 246 ms
May 25, 2018 8:09:18 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1680 places.
May 25, 2018 8:09:19 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2364 transitions.
May 25, 2018 8:09:19 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 25, 2018 8:09:19 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 58 ms
May 25, 2018 8:09:19 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 496 ms
May 25, 2018 8:09:19 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 15 ms
May 25, 2018 8:09:20 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 2364 transitions.
May 25, 2018 8:09:21 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 25, 2018 8:09:21 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 855 transitions.
May 25, 2018 8:09:21 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 159 ms
May 25, 2018 8:09:21 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 140 ms
May 25, 2018 8:09:21 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 25, 2018 8:09:21 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 147 ms
May 25, 2018 8:09:21 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 25, 2018 8:09:22 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 69 place invariants in 143 ms
May 25, 2018 8:09:23 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 273 variables to be positive in 1611 ms
May 25, 2018 8:09:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 855 transitions.
May 25, 2018 8:09:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/855 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 8:09:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 101 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 8:09:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 855 transitions.
May 25, 2018 8:09:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 72 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 8:09:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 855 transitions.
May 25, 2018 8:09:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/855) took 3040 ms. Total solver calls (SAT/UNSAT): 1541(101/1440)
May 25, 2018 8:09:28 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 987 redundant transitions.
May 25, 2018 8:09:28 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 66 ms
May 25, 2018 8:09:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(161/855) took 6065 ms. Total solver calls (SAT/UNSAT): 4721(345/4376)
May 25, 2018 8:09:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(218/855) took 9077 ms. Total solver calls (SAT/UNSAT): 9474(549/8925)
May 25, 2018 8:09:34 AM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (assert (and (>= (select s0 43) 1) (>= (select s0 213) 1))) with error
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 8:09:35 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 13600ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-04b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-04b.tgz
mv DLCround-PT-04b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DLCround-PT-04b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r069-smll-152649741700027"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;