Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.5K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 871K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is DLCround-PT-12a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r068-smll-152649741200131
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-00
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-01
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-02
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-03
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-04
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-05
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-06
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-07
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-08
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-09
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-12a-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1526705076587

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : DLCround-PT-12a-ReachabilityCardinality-00 with value :(!(((u235.p376==0)||(u41.p182==1))||(!(u3.p15>=3))))
Read [invariant] property : DLCround-PT-12a-ReachabilityCardinality-01 with value :(!(((u7.p58>=2)||((u96.p237==0)||(u25.p166==1)))&&((u152.p293>=2)&&((u110.p251==0)||(u193.p334==1)))))
Read [reachable] property : DLCround-PT-12a-ReachabilityCardinality-02 with value :(((((u37.p178==0)||(u140.p281==1))||((u115.p256==0)||(u243.p384==1)))&&((u270.p411>=2)||(u214.p355>=2)))||((u157.p298>=2)&&((u60.p201==0)||(u97.p238==1))))
Read [reachable] property : DLCround-PT-12a-ReachabilityCardinality-03 with value :((((u47.p188>=2)||(u2.p11>=1))&&((u17.p156>=2)&&((u224.p365==0)||(u231.p372==1))))&&((((u5.p38==0)||(u232.p373==1))&&((u220.p361==0)||(u151.p292==1)))&&(u173.p314>=2)))
Read [reachable] property : DLCround-PT-12a-ReachabilityCardinality-04 with value :(u148.p289>=2)
Read [reachable] property : DLCround-PT-12a-ReachabilityCardinality-05 with value :(!((!(u144.p285>=3))&&(((u5.p35==0)||(u11.p93==1))||((u272.p413==0)||(u103.p244==1)))))
Read [reachable] property : DLCround-PT-12a-ReachabilityCardinality-06 with value :(((!((u10.p85==0)||(u272.p413==1)))&&(!(u166.p307>=3)))&&(!((u140.p281>=3)&&((u147.p288==0)||(u130.p271==1)))))
Read [reachable] property : DLCround-PT-12a-ReachabilityCardinality-07 with value :((!(((u180.p321==0)||(u137.p278==1))||(u9.p71>=2)))&&((u29.p170==0)||(u248.p389==1)))
Read [invariant] property : DLCround-PT-12a-ReachabilityCardinality-08 with value :((((u132.p273==0)||(u115.p256==1))||(!(u12.p104>=2)))||((!((u277.p418==0)||(u79.p220==1)))||(((u4.p22==0)||(u6.p39==1))||(u45.p186>=2))))
Read [reachable] property : DLCround-PT-12a-ReachabilityCardinality-09 with value :(u4.p27>=3)
Read [invariant] property : DLCround-PT-12a-ReachabilityCardinality-10 with value :((((u16.p143>=3)||(u253.p394>=1))&&(!(u88.p229>=3)))||(!(u77.p218>=1)))
Read [invariant] property : DLCround-PT-12a-ReachabilityCardinality-11 with value :(!(u6.p42>=2))
Read [reachable] property : DLCround-PT-12a-ReachabilityCardinality-12 with value :((u223.p364>=3)&&((u243.p384==0)||(u79.p220==1)))
Read [reachable] property : DLCround-PT-12a-ReachabilityCardinality-13 with value :((((u226.p367>=3)&&((u10.p84==0)||(u60.p201==1)))&&(((u260.p401==0)||(u101.p242==1))&&(u6.p47>=1)))||((!((u26.p167==0)||(u56.p197==1)))||((u77.p218>=3)&&(u40.p181>=2))))
Read [reachable] property : DLCround-PT-12a-ReachabilityCardinality-14 with value :(((u61.p202==0)||(u186.p327==1))&&(u218.p359>=2))
Read [invariant] property : DLCround-PT-12a-ReachabilityCardinality-15 with value :(((((u214.p355==0)||(u186.p327==1))&&((u2.p12==0)||(u59.p200==1)))&&(!(u69.p210>=3)))||(!(((u230.p371==0)||(u222.p363==1))&&(u72.p213>=3))))
built 521 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround\_PT\_12a\_flat\_flat\_mod,2.401e+16,3.70799,31164,562,21,13046,1269,3643,12199,68,1233,0
Total reachable state count : 24010000000000001

Verifying 16 reachability properties.
Reachability property DLCround-PT-12a-ReachabilityCardinality-00 does not hold.
FORMULA DLCround-PT-12a-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-12a-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-00,0,3.71251,31192,1,0,13046,1269,3655,12199,75,1233,482
Invariant property DLCround-PT-12a-ReachabilityCardinality-01 is true.
FORMULA DLCround-PT-12a-ReachabilityCardinality-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-01,0,3.7147,31312,1,0,13046,1269,3672,12199,77,1233,676
Reachability property DLCround-PT-12a-ReachabilityCardinality-02 does not hold.
FORMULA DLCround-PT-12a-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-12a-ReachabilityCardinality-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-02,0,3.71657,31312,1,0,13046,1269,3691,12199,77,1233,676
Reachability property DLCround-PT-12a-ReachabilityCardinality-03 does not hold.
FORMULA DLCround-PT-12a-ReachabilityCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-12a-ReachabilityCardinality-03

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-03,0,3.7215,31312,1,0,13046,1269,3719,12199,80,1233,1216
Reachability property DLCround-PT-12a-ReachabilityCardinality-04 does not hold.
FORMULA DLCround-PT-12a-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-12a-ReachabilityCardinality-04

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-04,0,3.72196,31312,1,0,13046,1269,3720,12199,80,1233,1216
Reachability property DLCround-PT-12a-ReachabilityCardinality-05 does not hold.
FORMULA DLCround-PT-12a-ReachabilityCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-12a-ReachabilityCardinality-05

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-05,0,3.72479,31312,1,0,13046,1269,3736,12199,84,1233,1954
Reachability property DLCround-PT-12a-ReachabilityCardinality-06 does not hold.
FORMULA DLCround-PT-12a-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-12a-ReachabilityCardinality-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-06,0,3.72822,31312,1,0,13046,1269,3753,12199,84,1233,2300
Reachability property DLCround-PT-12a-ReachabilityCardinality-07 does not hold.
FORMULA DLCround-PT-12a-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-12a-ReachabilityCardinality-07

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-07,0,3.73091,31312,1,0,13046,1269,3766,12199,85,1233,2960
Invariant property DLCround-PT-12a-ReachabilityCardinality-08 is true.
FORMULA DLCround-PT-12a-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-08,0,3.73484,31312,1,0,13046,1269,3791,12199,91,1233,3963
Reachability property DLCround-PT-12a-ReachabilityCardinality-09 does not hold.
FORMULA DLCround-PT-12a-ReachabilityCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-12a-ReachabilityCardinality-09

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-09,0,3.73582,31312,1,0,13046,1269,3793,12199,92,1233,3963
Invariant property DLCround-PT-12a-ReachabilityCardinality-10 is true.
FORMULA DLCround-PT-12a-ReachabilityCardinality-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-10,0,3.73833,31312,1,0,13046,1269,3804,12199,94,1233,4706
Invariant property DLCround-PT-12a-ReachabilityCardinality-11 is true.
FORMULA DLCround-PT-12a-ReachabilityCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-11,0,3.73939,31312,1,0,13046,1269,3807,12199,95,1233,4706
Reachability property DLCround-PT-12a-ReachabilityCardinality-12 does not hold.
FORMULA DLCround-PT-12a-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-12a-ReachabilityCardinality-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-12,0,3.7403,31312,1,0,13046,1269,3812,12199,95,1233,4710
Reachability property DLCround-PT-12a-ReachabilityCardinality-13 does not hold.
FORMULA DLCround-PT-12a-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-12a-ReachabilityCardinality-13

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-13,0,3.74472,31312,1,0,13046,1269,3837,12199,96,1233,5122
Reachability property DLCround-PT-12a-ReachabilityCardinality-14 does not hold.
FORMULA DLCround-PT-12a-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-12a-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-14,0,3.74559,31312,1,0,13046,1269,3843,12199,96,1233,5122
Invariant property DLCround-PT-12a-ReachabilityCardinality-15 is true.
FORMULA DLCround-PT-12a-ReachabilityCardinality-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-12a-ReachabilityCardinality-15,0,3.74848,31312,1,0,13046,1269,3865,12199,98,1233,6010
ITS tools runner thread asked to quit. Dying gracefully.

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 19, 2018 4:44:38 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 19, 2018 4:44:38 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 19, 2018 4:44:39 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 310 ms
May 19, 2018 4:44:39 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 419 places.
May 19, 2018 4:44:39 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3407 transitions.
May 19, 2018 4:44:39 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 19, 2018 4:44:39 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 77 ms
May 19, 2018 4:44:40 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 864 ms
May 19, 2018 4:44:40 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 19, 2018 4:44:40 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 19, 2018 4:44:41 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 538 ms
May 19, 2018 4:44:41 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 701 ms
May 19, 2018 4:44:41 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 19, 2018 4:44:42 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 5800 redundant transitions.
May 19, 2018 4:44:42 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 65 ms
May 19, 2018 4:44:42 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-12a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-12a.tgz
mv DLCround-PT-12a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is DLCround-PT-12a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r068-smll-152649741200131"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;