Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 368K
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.3K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 200K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is DLCround-PT-04a, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r068-smll-152649741000021
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-00
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-01
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-02
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-03
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-04
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-05
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-06
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-07
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-08
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-09
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-10
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-11
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-12
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-13
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-14
FORMULA_NAME DLCround-PT-04a-ReachabilityFireability-15

=== Now, execution of the tool begins

BK_START 1526644063469

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityFireability.pnml.gal, -t, CGAL, -reachable-file, ReachabilityFireability.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityFireability.pnml.gal -t CGAL -reachable-file ReachabilityFireability.prop --nowitness
Loading property file ReachabilityFireability.prop.
Read [reachable] property : DLCround-PT-04a-ReachabilityFireability-00 with value :(((!(((u5.p37>=1)&&(u11.p80>=1))&&((u7.p54>=1)&&(u27.p96>=1))))&&((u9.p74>=1)&&((u6.p47>=1)&&(u63.p132>=1))))&&(((((u5.p37>=1)&&(u66.p135>=1))&&((u12.p81>=1)&&(u5.p37>=1)))||(((u29.p98>=1)&&(u2.p14>=1))&&((u6.p42>=1)&&(u19.p88>=1))))&&((u5.p37>=1)&&(u54.p123>=1))))
Read [invariant] property : DLCround-PT-04a-ReachabilityFireability-01 with value :((!((!((u4.p25>=1)&&(u16.p85>=1)))&&(((u9.p77>=1)&&(u69.p138>=1))&&((u6.p47>=1)&&(u50.p119>=1)))))||(!(((u9.p74>=1)&&(u45.p114>=1))&&(!((u6.p41>=1)&&(u25.p94>=1))))))
Read [reachable] property : DLCround-PT-04a-ReachabilityFireability-02 with value :(((u6.p47>=1)&&(u19.p88>=1))&&((u21.p90>=1)&&(u6.p45>=1)))
Read [reachable] property : DLCround-PT-04a-ReachabilityFireability-03 with value :(((((u2.p14>=1)&&(u37.p106>=1))||(((u9.p71>=1)&&(u68.p137>=1))||(u6.p39>=1)))&&(((u6.p41>=1)||((u1.p7>=1)&&(u34.p103>=1)))&&((u52.p121>=1)&&(u8.p67>=1))))&&((((u1.p1>=1)&&(u34.p103>=1))&&((u5.p33>=1)&&(u11.p80>=1)))&&((u3.p15>=1)&&(u38.p107>=1))))
Read [reachable] property : DLCround-PT-04a-ReachabilityFireability-04 with value :((((!((u9.p76>=1)&&(u47.p116>=1)))&&(((u3.p21>=1)&&(u31.p100>=1))&&(u1.p7>=1)))||(!((u1.p7>=1)&&(u34.p103>=1))))&&((u7.p54>=1)&&(u61.p130>=1)))
Read [reachable] property : DLCround-PT-04a-ReachabilityFireability-05 with value :(((u7.p57>=1)&&(u61.p130>=1))&&((!(((u21.p90>=1)&&(u2.p14>=1))||((u28.p97>=1)&&(u7.p57>=1))))||((((u7.p52>=1)&&(u58.p127>=1))||((u13.p82>=1)&&(u2.p14>=1)))&&(u2.p10>=1))))
Read [invariant] property : DLCround-PT-04a-ReachabilityFireability-06 with value :(!(((u9.p74>=1)&&(u66.p135>=1))&&((((u5.p32>=1)&&(u11.p80>=1))&&((u3.p16>=1)&&(u38.p107>=1)))&&(((u9.p74>=1)&&(u45.p114>=1))||((u9.p73>=1)&&(u47.p116>=1))))))
Read [invariant] property : DLCround-PT-04a-ReachabilityFireability-07 with value :(!(((((u30.p99>=1)&&(u7.p57>=1))&&((u5.p33>=1)&&(u11.p80>=1)))&&(((u1.p7>=1)&&(u26.p95>=1))||((u6.p41>=1)&&(u55.p124>=1))))&&(((u6.p46>=1)&&(u55.p124>=1))||(((u44.p113>=1)&&(u9.p77>=1))||((u3.p15>=1)&&(u38.p107>=1))))))
Read [reachable] property : DLCround-PT-04a-ReachabilityFireability-08 with value :((((u67.p136>=1)&&(u9.p75>=1))&&((u7.p57>=1)&&(u30.p99>=1)))&&(((((u9.p72>=1)&&(u43.p112>=1))&&((u10.p79>=1)&&(u5.p37>=1)))&&(u8.p60>=1))&&((u7.p49>=1)&&(u31.p100>=1))))
Read [reachable] property : DLCround-PT-04a-ReachabilityFireability-09 with value :((u9.p71>=1)&&(u8.p63>=1))
Read [reachable] property : DLCround-PT-04a-ReachabilityFireability-10 with value :((u5.p32>=1)&&(u53.p122>=1))
Read [reachable] property : DLCround-PT-04a-ReachabilityFireability-11 with value :(((u6.p47>=1)&&(u20.p89>=1))&&(((u9.p73>=1)&&(u45.p114>=1))&&((u6.p46>=1)&&(u54.p123>=1))))
Read [reachable] property : DLCround-PT-04a-ReachabilityFireability-12 with value :((((((u5.p36>=1)&&(u15.p84>=1))&&((u7.p56>=1)&&(u33.p102>=1)))&&(u7.p51>=1))||(!((u6.p43>=1)&&(u57.p126>=1))))&&(((((u8.p62>=1)&&(u64.p133>=1))||((u8.p66>=1)&&(u63.p132>=1)))||(!((u7.p53>=1)&&(u60.p129>=1))))&&((((u7.p56>=1)&&(u58.p127>=1))&&((u8.p64>=1)&&(u63.p132>=1)))&&(((u5.p33>=1)&&(u11.p80>=1))&&((u5.p38>=1)&&(u51.p120>=1))))))
Read [reachable] property : DLCround-PT-04a-ReachabilityFireability-13 with value :((u8.p62>=1)&&(((!((u9.p78>=1)&&(u69.p138>=1)))||(!((u6.p43>=1)&&(u23.p92>=1))))&&((u7.p49>=1)&&(u31.p100>=1))))
Read [invariant] property : DLCround-PT-04a-ReachabilityFireability-14 with value :(((!((u9.p78>=1)||(u7.p58>=1)))||(!((u1.p4>=1)&&(u10.p79>=1))))||(!((u1.p1>=1)&&(u42.p111>=1))))
Read [reachable] property : DLCround-PT-04a-ReachabilityFireability-15 with value :((((((u8.p59>=1)&&(u39.p108>=1))||((u7.p56>=1)&&(u61.p130>=1)))&&(((u7.p49>=1)&&(u59.p128>=1))&&((u17.p86>=1)&&(u5.p35>=1))))&&((((u6.p46>=1)&&(u25.p94>=1))||((u8.p63>=1)&&(u39.p108>=1)))&&(((u5.p37>=1)&&(u16.p85>=1))&&((u7.p58>=1)&&(u31.p100>=1)))))&&(u5.p38>=1))
built 121 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 122
// Phase 1: matrix 122 rows 139 cols
invariant :p94 + -1'p138 = 0
invariant :p115 + -1'p138 = 0
invariant :p104 + -1'p138 = 0
invariant :p118 + -1'p138 = 0
invariant :p133 + -1'p138 = 0
invariant :p84 + -1'p138 = 0
invariant :p39 + p40 + p41 + p42 + p43 + p44 + p45 + p46 + p47 + p48 + -1'p138 = 0
invariant :p109 + -1'p138 = 0
invariant :p1 + p2 + p3 + p4 + p5 + p6 + p7 + -1'p138 = 0
invariant :p59 + p60 + p61 + p62 + p63 + p64 + p65 + p66 + p67 + p68 + -1'p138 = 0
invariant :p131 + -1'p138 = 0
invariant :p105 + -1'p138 = 0
invariant :p136 + -1'p138 = 0
invariant :p92 + -1'p138 = 0
invariant :p114 + -1'p138 = 0
invariant :p91 + -1'p138 = 0
invariant :p102 + -1'p138 = 0
invariant :p128 + -1'p138 = 0
invariant :p117 + -1'p138 = 0
invariant :p137 + -1'p138 = 0
invariant :p93 + -1'p138 = 0
invariant :p106 + -1'p138 = 0
invariant :p83 + -1'p138 = 0
invariant :p107 + -1'p138 = 0
invariant :p110 + -1'p138 = 0
invariant :p127 + -1'p138 = 0
invariant :p81 + -1'p138 = 0
invariant :p126 + -1'p138 = 0
invariant :p96 + -1'p138 = 0
invariant :p119 + -1'p138 = 0
invariant :p99 + -1'p138 = 0
invariant :p113 + -1'p138 = 0
invariant :p101 + -1'p138 = 0
invariant :p135 + -1'p138 = 0
invariant :p98 + -1'p138 = 0
invariant :p124 + -1'p138 = 0
invariant :p82 + -1'p138 = 0
invariant :p112 + -1'p138 = 0
invariant :p95 + -1'p138 = 0
invariant :p134 + -1'p138 = 0
invariant :p90 + -1'p138 = 0
invariant :p89 + -1'p138 = 0
invariant :p100 + -1'p138 = 0
invariant :p85 + -1'p138 = 0
invariant :p86 + -1'p138 = 0
invariant :p87 + -1'p138 = 0
invariant :p22 + p23 + p24 + p25 + p26 + p27 + p28 + -1'p138 = 0
invariant :p111 + -1'p138 = 0
invariant :p29 + p30 + p31 + p32 + p33 + p34 + p35 + p36 + p37 + p38 + -1'p138 = 0
invariant :p121 + -1'p138 = 0
invariant :p49 + p50 + p51 + p52 + p53 + p54 + p55 + p56 + p57 + p58 + -1'p138 = 0
invariant :p122 + -1'p138 = 0
invariant :p108 + -1'p138 = 0
invariant :p15 + p16 + p17 + p18 + p19 + p20 + p21 + -1'p138 = 0
invariant :p132 + -1'p138 = 0
invariant :p103 + -1'p138 = 0
invariant :p69 + p70 + p71 + p72 + p73 + p74 + p75 + p76 + p77 + p78 + -1'p138 = 0
invariant :p0 + p138 = 1
invariant :p88 + -1'p138 = 0
invariant :p97 + -1'p138 = 0
invariant :p130 + -1'p138 = 0
invariant :p8 + p9 + p10 + p11 + p12 + p13 + p14 + -1'p138 = 0
invariant :p125 + -1'p138 = 0
invariant :p80 + -1'p138 = 0
invariant :p116 + -1'p138 = 0
invariant :p123 + -1'p138 = 0
invariant :p120 + -1'p138 = 0
invariant :p129 + -1'p138 = 0
invariant :p79 + -1'p138 = 0
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround\_PT\_04a\_flat\_flat\_mod,2.401e+08,0.231909,6512,146,21,1172,453,883,970,68,641,0
Total reachable state count : 240100001

Verifying 16 reachability properties.
Reachability property DLCround-PT-04a-ReachabilityFireability-00 is true.
FORMULA DLCround-PT-04a-ReachabilityFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-00,216090,0.23456,6904,78,31,1172,453,927,970,75,641,201
Invariant property DLCround-PT-04a-ReachabilityFireability-01 is true.
FORMULA DLCround-PT-04a-ReachabilityFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-01,0,0.236249,6924,1,0,1172,453,953,970,76,641,357
Reachability property DLCround-PT-04a-ReachabilityFireability-02 does not hold.
FORMULA DLCround-PT-04a-ReachabilityFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-04a-ReachabilityFireability-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-02,0,0.236707,6924,1,0,1172,453,964,970,79,641,357
Reachability property DLCround-PT-04a-ReachabilityFireability-03 is true.
FORMULA DLCround-PT-04a-ReachabilityFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-03,490,0.239106,6924,79,46,1172,453,1003,970,81,641,488
Reachability property DLCround-PT-04a-ReachabilityFireability-04 is true.
FORMULA DLCround-PT-04a-ReachabilityFireability-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-04,1.8963e+07,0.240357,6924,87,31,1172,453,1022,970,82,641,580
Reachability property DLCround-PT-04a-ReachabilityFireability-05 does not hold.
FORMULA DLCround-PT-04a-ReachabilityFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-04a-ReachabilityFireability-05

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-05,0,0.242097,6924,1,0,1172,453,1042,970,82,641,805
Invariant property DLCround-PT-04a-ReachabilityFireability-06 does not hold.
FORMULA DLCround-PT-04a-ReachabilityFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-06,343000,0.243219,6924,78,37,1232,453,1062,970,82,641,826
Invariant property DLCround-PT-04a-ReachabilityFireability-07 does not hold.
FORMULA DLCround-PT-04a-ReachabilityFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-07,30870,0.245149,6924,80,44,1493,453,1087,970,82,641,1008
Reachability property DLCround-PT-04a-ReachabilityFireability-08 does not hold.
FORMULA DLCround-PT-04a-ReachabilityFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-04a-ReachabilityFireability-08

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-08,0,0.246041,6924,1,0,1493,453,1115,970,86,641,1009
Reachability property DLCround-PT-04a-ReachabilityFireability-09 is true.
FORMULA DLCround-PT-04a-ReachabilityFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-09,2.401e+06,0.246373,6924,77,35,1520,453,1118,970,86,641,1009
Reachability property DLCround-PT-04a-ReachabilityFireability-10 is true.
FORMULA DLCround-PT-04a-ReachabilityFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-10,2.401e+07,0.246763,6924,76,29,1572,453,1120,970,86,641,1010
Reachability property DLCround-PT-04a-ReachabilityFireability-11 does not hold.
FORMULA DLCround-PT-04a-ReachabilityFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-04a-ReachabilityFireability-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-11,0,0.247361,6924,1,0,1573,453,1136,970,88,641,1012
Reachability property DLCround-PT-04a-ReachabilityFireability-12 does not hold.
FORMULA DLCround-PT-04a-ReachabilityFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-04a-ReachabilityFireability-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-12,0,0.250069,6924,1,0,1818,453,1198,970,93,641,1198
Reachability property DLCround-PT-04a-ReachabilityFireability-13 is true.
FORMULA DLCround-PT-04a-ReachabilityFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-13,216090,0.251507,6924,79,49,1935,453,1211,970,93,641,1321
Invariant property DLCround-PT-04a-ReachabilityFireability-14 is true.
FORMULA DLCround-PT-04a-ReachabilityFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-14,0,0.252845,6924,1,0,2105,453,1224,1080,93,641,1531
Reachability property DLCround-PT-04a-ReachabilityFireability-15 does not hold.
FORMULA DLCround-PT-04a-ReachabilityFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-04a-ReachabilityFireability-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-04a-ReachabilityFireability-15,0,0.254632,6924,1,0,2201,453,1269,1129,99,641,1632
ITS tools runner thread asked to quit. Dying gracefully.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1526644069056

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 18, 2018 11:47:45 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 18, 2018 11:47:45 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 18, 2018 11:47:45 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 138 ms
May 18, 2018 11:47:45 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 139 places.
May 18, 2018 11:47:46 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 823 transitions.
May 18, 2018 11:47:46 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 18, 2018 11:47:46 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 39 ms
May 18, 2018 11:47:46 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 247 ms
May 18, 2018 11:47:46 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 18, 2018 11:47:46 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 18, 2018 11:47:46 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 178 ms
May 18, 2018 11:47:46 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 229 ms
May 18, 2018 11:47:46 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 18, 2018 11:47:47 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 823 transitions.
May 18, 2018 11:47:47 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 823 transitions.
May 18, 2018 11:47:47 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1216 redundant transitions.
May 18, 2018 11:47:47 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityFireability.pnml.gal : 20 ms
May 18, 2018 11:47:47 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityFireability.prop : 1 ms
May 18, 2018 11:47:47 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 69 place invariants in 37 ms
May 18, 2018 11:47:47 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
May 18, 2018 11:47:47 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.checkProperties(Gal2SMTFrontEnd.java:131)
at fr.lip6.move.gal.application.SMTRunner$2.run(SMTRunner.java:110)
at java.lang.Thread.run(Thread.java:748)
May 18, 2018 11:47:48 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1191ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-04a"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-04a.tgz
mv DLCround-PT-04a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is DLCround-PT-04a, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r068-smll-152649741000021"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;