fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r067-smll-152649739700172
Last Updated
June 26, 2018

About the Execution of Irma.struct for DLCshifumi-PT-3a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2534.330 16682.00 15140.00 641.50 TTFFFFTFTFTTTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
/home/mcc/execution
total 936K
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.9K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 778K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-structural
Input is DLCshifumi-PT-3a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r067-smll-152649739700172
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-00
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-01
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-02
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-03
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-04
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-05
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-06
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-07
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-08
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-09
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-10
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-11
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-12
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-13
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-14
FORMULA_NAME DLCshifumi-PT-3a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1526654363389


BK_STOP 1526654380071

--------------------
content from stderr:

Prefix is 75f5f979.
Reading known information in /usr/share/mcc4mcc/75f5f979-known.json.
Reading learned information in /usr/share/mcc4mcc/75f5f979-learned.json.
Reading value translations in /usr/share/mcc4mcc/75f5f979-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using DLCshifumi-PT-3a as instance name.
Using DLCshifumi as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'CTLFireability', 'Place/Transition': True, 'Colored': False, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': False, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': None, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': True, 'Safe': True, 'Deadlock': None, 'Reversible': None, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 17640, 'Memory': 2216.52, 'Tool': 'marcie'}, {'Time': 20326, 'Memory': 2216.29, 'Tool': 'marcie'}, {'Time': 35881, 'Memory': 876.61, 'Tool': 'itstools'}, {'Time': 38732, 'Memory': 882.52, 'Tool': 'itstools'}, {'Time': 3539260, 'Memory': 7638.26, 'Tool': 'lola'}, {'Time': 3539998, 'Memory': 7584.29, 'Tool': 'lola'}].
Learned tools are: [{'Tool': 'itstools'}].
Learned tool itstools is 2.0340702947845806x far from the best tool marcie.
CTLFireability marcie DLCshifumi-PT-3a...
timeout --kill-after=10s --signal=SIGINT 1m for testing only
check for maximal unmarked siphon

Marcie rev. 8852M (built: crohr on 2017-05-03)
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: marcie --net-file=model.pnml --mcc-file=CTLFireability.xml --memory=6

parse successfull
net created successfully

Net: DLCshifumi_PT_3a
(NrP: 544 NrTr: 3097 NrArc: 11545)

ok
check for constant places
ok
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
parse formulas
formulas created successfully
place and transition orderings generation:0m 0.013sec

ok

net check time: 0m 0.005sec

init dd package: 0m 1.793sec


RS generation: 0m 0.293sec


-> reachability set: #nodes 544 (5.4e+02) #states 909,543,680,129,861,140,820,205,019,889,143,001 (35)



starting MCC model checker
--------------------------

checking: AG [AF [IS_FIREABLE [t925]]]
normalized: ~ [E [true U EG [~ [IS_FIREABLE [t925]]]]]

..
EG iterations: 2
-> the formula is FALSE

FORMULA DLCshifumi-PT-3a-CTLFireability-02 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.532sec

checking: AG [~ [IS_FIREABLE [t1523]]]
normalized: ~ [E [true U IS_FIREABLE [t1523]]]

-> the formula is FALSE

FORMULA DLCshifumi-PT-3a-CTLFireability-05 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.803sec

checking: EX [AX [EF [IS_FIREABLE [t1305]]]]
normalized: EX [~ [EX [~ [E [true U IS_FIREABLE [t1305]]]]]]

..-> the formula is TRUE

FORMULA DLCshifumi-PT-3a-CTLFireability-06 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.167sec

checking: EF [AG [AX [IS_FIREABLE [t2701]]]]
normalized: E [true U ~ [E [true U EX [~ [IS_FIREABLE [t2701]]]]]]

.-> the formula is FALSE

FORMULA DLCshifumi-PT-3a-CTLFireability-07 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.218sec

checking: EX [EX [AG [IS_FIREABLE [t3070]]]]
normalized: EX [EX [~ [E [true U ~ [IS_FIREABLE [t3070]]]]]]

..-> the formula is FALSE

FORMULA DLCshifumi-PT-3a-CTLFireability-09 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.219sec

checking: EF [~ [~ [~ [~ [IS_FIREABLE [t1659]]]]]]
normalized: E [true U IS_FIREABLE [t1659]]

-> the formula is TRUE

FORMULA DLCshifumi-PT-3a-CTLFireability-10 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.682sec

checking: IS_FIREABLE [t908]
normalized: IS_FIREABLE [t908]

-> the formula is FALSE

FORMULA DLCshifumi-PT-3a-CTLFireability-13 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.000sec

checking: EF [AG [~ [[IS_FIREABLE [t1611] | IS_FIREABLE [t1445]]]]]
normalized: E [true U ~ [E [true U [IS_FIREABLE [t1611] | IS_FIREABLE [t1445]]]]]

-> the formula is FALSE

FORMULA DLCshifumi-PT-3a-CTLFireability-03 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.153sec

checking: AX [EF [[[IS_FIREABLE [t2201] & IS_FIREABLE [t1909]] | IS_FIREABLE [t1524]]]]
normalized: ~ [EX [~ [E [true U [IS_FIREABLE [t1524] | [IS_FIREABLE [t2201] & IS_FIREABLE [t1909]]]]]]]

.-> the formula is TRUE

FORMULA DLCshifumi-PT-3a-CTLFireability-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.719sec

checking: AF [EF [[[IS_FIREABLE [t1036] & IS_FIREABLE [t1342]] & [IS_FIREABLE [t842] & IS_FIREABLE [t768]]]]]
normalized: ~ [EG [~ [E [true U [[IS_FIREABLE [t1036] & IS_FIREABLE [t1342]] & [IS_FIREABLE [t842] & IS_FIREABLE [t768]]]]]]]


EG iterations: 0
-> the formula is FALSE

FORMULA DLCshifumi-PT-3a-CTLFireability-04 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.013sec

checking: E [A [IS_FIREABLE [t98] U IS_FIREABLE [t1765]] U [EG [IS_FIREABLE [t108]] | EF [IS_FIREABLE [t637]]]]
normalized: E [[~ [E [~ [IS_FIREABLE [t1765]] U [~ [IS_FIREABLE [t1765]] & ~ [IS_FIREABLE [t98]]]]] & ~ [EG [~ [IS_FIREABLE [t1765]]]]] U [E [true U IS_FIREABLE [t637]] | EG [IS_FIREABLE [t108]]]]

.
EG iterations: 1
..
EG iterations: 2
-> the formula is TRUE

FORMULA DLCshifumi-PT-3a-CTLFireability-08 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 1.060sec

checking: AX [EG [[[IS_FIREABLE [t971] | IS_FIREABLE [t2106]] | [IS_FIREABLE [t852] | IS_FIREABLE [t1427]]]]]
normalized: ~ [EX [~ [EG [[[IS_FIREABLE [t852] | IS_FIREABLE [t1427]] | [IS_FIREABLE [t971] | IS_FIREABLE [t2106]]]]]]]

.
EG iterations: 1
.-> the formula is TRUE

FORMULA DLCshifumi-PT-3a-CTLFireability-12 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.456sec

checking: [EF [[[~ [IS_FIREABLE [t337]] & ~ [IS_FIREABLE [t2766]]] & IS_FIREABLE [t593]]] & AG [IS_FIREABLE [t1495]]]
normalized: [~ [E [true U ~ [IS_FIREABLE [t1495]]]] & E [true U [IS_FIREABLE [t593] & [~ [IS_FIREABLE [t2766]] & ~ [IS_FIREABLE [t337]]]]]]

-> the formula is FALSE

FORMULA DLCshifumi-PT-3a-CTLFireability-15 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.363sec

checking: [EF [AF [~ [IS_FIREABLE [t2203]]]] & E [EX [IS_FIREABLE [t1039]] U [[IS_FIREABLE [t2085] & IS_FIREABLE [t1376]] & [IS_FIREABLE [t2045] & IS_FIREABLE [t1084]]]]]
normalized: [E [EX [IS_FIREABLE [t1039]] U [[IS_FIREABLE [t2045] & IS_FIREABLE [t1084]] & [IS_FIREABLE [t2085] & IS_FIREABLE [t1376]]]] & E [true U ~ [EG [IS_FIREABLE [t2203]]]]]

.
EG iterations: 1
.-> the formula is TRUE

FORMULA DLCshifumi-PT-3a-CTLFireability-00 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 1.464sec

checking: [~ [[E [IS_FIREABLE [t527] U IS_FIREABLE [t2201]] | IS_FIREABLE [t2992]]] & [[EF [~ [IS_FIREABLE [t420]]] | [~ [~ [IS_FIREABLE [t2594]]] & [~ [IS_FIREABLE [t3020]] & [IS_FIREABLE [t2808] | IS_FIREABLE [t1129]]]]] & ~ [EF [[IS_FIREABLE [t819] & IS_FIREABLE [t2651]]]]]]
normalized: [[~ [E [true U [IS_FIREABLE [t819] & IS_FIREABLE [t2651]]]] & [[IS_FIREABLE [t2594] & [[IS_FIREABLE [t2808] | IS_FIREABLE [t1129]] & ~ [IS_FIREABLE [t3020]]]] | E [true U ~ [IS_FIREABLE [t420]]]]] & ~ [[IS_FIREABLE [t2992] | E [IS_FIREABLE [t527] U IS_FIREABLE [t2201]]]]]

-> the formula is TRUE

FORMULA DLCshifumi-PT-3a-CTLFireability-01 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.544sec

checking: [~ [~ [[[[IS_FIREABLE [t2983] | IS_FIREABLE [t2181]] | IS_FIREABLE [t2317]] & ~ [~ [IS_FIREABLE [t946]]]]]] | [A [[IS_FIREABLE [t2096] & IS_FIREABLE [t2752]] U [IS_FIREABLE [t1398] & IS_FIREABLE [t2022]]] & E [[IS_FIREABLE [t2582] & IS_FIREABLE [t867]] U [IS_FIREABLE [t592] & IS_FIREABLE [t1156]]]]]
normalized: [[E [[IS_FIREABLE [t2582] & IS_FIREABLE [t867]] U [IS_FIREABLE [t592] & IS_FIREABLE [t1156]]] & [~ [EG [~ [[IS_FIREABLE [t1398] & IS_FIREABLE [t2022]]]]] & ~ [E [~ [[IS_FIREABLE [t1398] & IS_FIREABLE [t2022]]] U [~ [[IS_FIREABLE [t2096] & IS_FIREABLE [t2752]]] & ~ [[IS_FIREABLE [t1398] & IS_FIREABLE [t2022]]]]]]]] | [IS_FIREABLE [t946] & [IS_FIREABLE [t2317] | [IS_FIREABLE [t2983] | IS_FIREABLE [t2181]]]]]

.
EG iterations: 1
-> the formula is FALSE

FORMULA DLCshifumi-PT-3a-CTLFireability-14 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.557sec

totally nodes used: 4727957(4.7e+06)
number of garbage collections: 0
fire ops cache: hits/miss/sum: 20747838 25277069 46024907
used/not used/entry size/cache size: 20879847 46229017 16 1024MB
basic ops cache: hits/miss/sum: 4206248 4721599 8927847
used/not used/entry size/cache size: 7357543 9419673 12 192MB
unary ops cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 8388608 8 64MB
abstract ops cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 8388608 12 96MB
state nr cache: hits/miss/sum: 261 544 805
used/not used/entry size/cache size: 544 2096608 32 64MB
max state cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 8388608 32 256MB
uniqueHash elements/entry size/size: 67108864 4 256MB
0 62539614
1 4414074
2 151699
3 3423
4 54
5 0
6 0
7 0
8 0
9 0
>= 10 0

Total processing time: 0m11.439sec

.........................................................

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-3a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="irma4mcc-structural"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-3a.tgz
mv DLCshifumi-PT-3a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-structural"
echo " Input is DLCshifumi-PT-3a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r067-smll-152649739700172"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;