About the Execution of Irma.struct for DLCround-PT-13a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
833.260 | 20319.00 | 48238.00 | 773.10 | FFTTTTFTTTFTFTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.7K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.7K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 987K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-structural
Input is DLCround-PT-13a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r067-smll-152649739700145
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-00
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-01
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-02
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-03
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-04
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-05
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-06
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-07
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-08
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-09
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-13a-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1526647055141
BK_STOP 1526647075460
--------------------
content from stderr:
Prefix is 75f5f979.
Reading known information in /usr/share/mcc4mcc/75f5f979-known.json.
Reading learned information in /usr/share/mcc4mcc/75f5f979-learned.json.
Reading value translations in /usr/share/mcc4mcc/75f5f979-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using DLCround-PT-13a as instance name.
Using DLCround as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'ReachabilityCardinality', 'Place/Transition': True, 'Colored': False, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': False, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': None, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': True, 'Safe': True, 'Deadlock': None, 'Reversible': None, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 9192, 'Memory': 576.62, 'Tool': 'itstools'}, {'Time': 14308, 'Memory': 199.7, 'Tool': 'lola'}].
Learned tools are: [{'Tool': 'lola'}].
Learned tool lola is 1.5565709312445606x far from the best tool itstools.
ReachabilityCardinality itstools DLCround-PT-13a...
May 18, 2018 12:37:44 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-z3path, /usr/bin/z3, -yices2path, /usr/bin/yices, -ltsminpath, /usr/bin, -smt, -its, -pnfolder, /mcc-data, -examination, ReachabilityCardinality]
May 18, 2018 12:37:44 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /mcc-data/model.pnml
May 18, 2018 12:37:44 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 361 ms
May 18, 2018 12:37:44 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 463 places.
May 18, 2018 12:37:45 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3847 transitions.
May 18, 2018 12:37:45 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 18, 2018 12:37:46 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 957 ms
Using solver Z3 to compute partial order matrices.
Built C files in :
/mcc-data
May 18, 2018 12:37:46 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 18, 2018 12:37:46 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 18, 2018 12:37:47 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 498 ms
May 18, 2018 12:37:47 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 439 ms
May 18, 2018 12:37:47 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 18, 2018 12:37:48 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 6598 redundant transitions.
May 18, 2018 12:37:48 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /mcc-data/ReachabilityCardinality.pnml.gal : 111 ms
May 18, 2018 12:37:48 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /mcc-data/ReachabilityCardinality.prop : 1 ms
Invoking ITS tools like this :CommandLine [args=[/usr/share/itscl/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201804131302/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /mcc-data/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/mcc-data]
its-reach command run as :
/usr/share/itscl/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201804131302/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /mcc-data/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : DLCround-PT-13a-ReachabilityCardinality-00 with value :(((u5.p37==0)||(u99.p249==1))&&((((u140.p290==0)||(u289.p439==1))&&(u101.p251>=1))&&((u112.p262>=3)&&((u1.p7==0)||(u85.p235==1)))))
Read [reachable] property : DLCround-PT-13a-ReachabilityCardinality-01 with value :((u44.p194>=2)&&((u6.p45>=2)||((u7.p58==0)||(u8.p68==1))))
Read [invariant] property : DLCround-PT-13a-ReachabilityCardinality-02 with value :(((u171.p321==0)||(u166.p316==1))&&(((u94.p244==0)||(u72.p222==1))||(u170.p320>=3)))
Read [invariant] property : DLCround-PT-13a-ReachabilityCardinality-03 with value :(!(u215.p365>=2))
Read [invariant] property : DLCround-PT-13a-ReachabilityCardinality-04 with value :(((u6.p39==0)||(u270.p420==1))||(((u19.p169>=3)&&((u28.p178==0)||(u221.p371==1)))&&(((u308.p458==0)||(u15.p133==1))||((u11.p90==0)||(u36.p186==1)))))
Read [invariant] property : DLCround-PT-13a-ReachabilityCardinality-05 with value :((!(u7.p56>=2))||((u9.p76==0)||(u147.p297==1)))
Read [reachable] property : DLCround-PT-13a-ReachabilityCardinality-06 with value :((u278.p428>=2)&&((u196.p346==0)||(u193.p343==1)))
Read [invariant] property : DLCround-PT-13a-ReachabilityCardinality-07 with value :(!((((u240.p390==0)||(u17.p152==1))&&(u7.p50>=2))&&(!(u23.p173>=3))))
Read [invariant] property : DLCround-PT-13a-ReachabilityCardinality-08 with value :(((u18.p168==0)||(u85.p235==1))||((!((u137.p287==0)||(u1.p5==1)))||(((u80.p230==0)||(u15.p133==1))&&(u4.p23>=3))))
Read [invariant] property : DLCround-PT-13a-ReachabilityCardinality-09 with value :(((u22.p172==0)||(u50.p200==1))&&((((u95.p245==0)||(u287.p437==1))&&((u11.p91==0)||(u10.p81==1)))||((u8.p66==0)||(u121.p271==1))))
Read [reachable] property : DLCround-PT-13a-ReachabilityCardinality-10 with value :(!(((u9.p75>=3)||((u205.p355==0)||(u68.p218==1)))&&((u12.p99==0)||(u296.p446==1))))
Read [invariant] property : DLCround-PT-13a-ReachabilityCardinality-11 with value :(!(u95.p245>=2))
Read [reachable] property : DLCround-PT-13a-ReachabilityCardinality-12 with value :(u13.p113>=3)
Read [invariant] property : DLCround-PT-13a-ReachabilityCardinality-13 with value :((u239.p389==0)||(u119.p269==1))
Read [invariant] property : DLCround-PT-13a-ReachabilityCardinality-14 with value :(((u14.p119==0)||(u93.p243==1))&&((u45.p195==0)||(u112.p262==1)))
Read [invariant] property : DLCround-PT-13a-ReachabilityCardinality-15 with value :((((u18.p163>=2)&&((u16.p143==0)||(u14.p126==1)))||((u99.p249==0)||(u39.p189==1)))&&(!(u89.p239>=2)))
built 589 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround\_PT\_13a\_flat\_flat\_mod,2.401e+17,4.79753,38524,632,21,16115,1402,4114,15275,68,1324,0
Total reachable state count : 240100000000000001
Verifying 16 reachability properties.
Reachability property DLCround-PT-13a-ReachabilityCardinality-00 does not hold.
FORMULA DLCround-PT-13a-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-13a-ReachabilityCardinality-00
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-00,0,4.80162,38524,1,0,16115,1402,4138,15275,76,1324,316
Reachability property DLCround-PT-13a-ReachabilityCardinality-01 does not hold.
FORMULA DLCround-PT-13a-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-13a-ReachabilityCardinality-01
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-01,0,4.80391,38652,1,0,16115,1402,4151,15275,82,1324,376
Invariant property DLCround-PT-13a-ReachabilityCardinality-02 is true.
FORMULA DLCround-PT-13a-ReachabilityCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-02,0,4.80619,38652,1,0,16115,1402,4162,15275,82,1324,610
Invariant property DLCround-PT-13a-ReachabilityCardinality-03 is true.
FORMULA DLCround-PT-13a-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-03,0,4.80649,38652,1,0,16115,1402,4165,15275,83,1324,610
Invariant property DLCround-PT-13a-ReachabilityCardinality-04 is true.
FORMULA DLCround-PT-13a-ReachabilityCardinality-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-04,0,4.81108,38652,1,0,16115,1402,4189,15275,89,1324,2746
Invariant property DLCround-PT-13a-ReachabilityCardinality-05 is true.
FORMULA DLCround-PT-13a-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-05,0,4.81318,38652,1,0,16115,1402,4200,15275,94,1324,2894
Reachability property DLCround-PT-13a-ReachabilityCardinality-06 does not hold.
FORMULA DLCround-PT-13a-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-13a-ReachabilityCardinality-06
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-06,0,4.81366,38652,1,0,16115,1402,4206,15275,94,1324,2894
Invariant property DLCround-PT-13a-ReachabilityCardinality-07 is true.
FORMULA DLCround-PT-13a-ReachabilityCardinality-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-07,0,4.81478,38652,1,0,16115,1402,4220,15275,96,1324,2988
Invariant property DLCround-PT-13a-ReachabilityCardinality-08 is true.
FORMULA DLCround-PT-13a-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-08,0,4.81866,38652,1,0,16115,1402,4238,15275,99,1324,4092
Invariant property DLCround-PT-13a-ReachabilityCardinality-09 is true.
FORMULA DLCround-PT-13a-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-09,0,4.82455,38652,1,0,16115,1402,4257,15275,102,1324,5824
Reachability property DLCround-PT-13a-ReachabilityCardinality-10 does not hold.
FORMULA DLCround-PT-13a-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-13a-ReachabilityCardinality-10
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-10,0,4.82942,38652,1,0,16115,1402,4270,15275,103,1324,6650
Invariant property DLCround-PT-13a-ReachabilityCardinality-11 is true.
FORMULA DLCround-PT-13a-ReachabilityCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-11,0,4.82996,38652,1,0,16115,1402,4272,15275,103,1324,6650
Reachability property DLCround-PT-13a-ReachabilityCardinality-12 does not hold.
FORMULA DLCround-PT-13a-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-13a-ReachabilityCardinality-12
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-12,0,4.83043,38652,1,0,16115,1402,4274,15275,104,1324,6650
Invariant property DLCround-PT-13a-ReachabilityCardinality-13 is true.
FORMULA DLCround-PT-13a-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-13,0,4.83127,38652,1,0,16115,1402,4278,15275,104,1324,6914
Invariant property DLCround-PT-13a-ReachabilityCardinality-14 is true.
FORMULA DLCround-PT-13a-ReachabilityCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-14,0,4.83328,38652,1,0,16115,1402,4287,15275,104,1324,7344
Invariant property DLCround-PT-13a-ReachabilityCardinality-15 is true.
FORMULA DLCround-PT-13a-ReachabilityCardinality-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-13a-ReachabilityCardinality-15,0,4.83604,38652,1,0,16115,1402,4305,15275,107,1324,7992
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-13a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="irma4mcc-structural"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-13a.tgz
mv DLCround-PT-13a execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-structural"
echo " Input is DLCround-PT-13a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r067-smll-152649739700145"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;