Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
/home/mcc/execution
total 928K
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.3K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 762K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-structural
Input is DLCround-PT-11a, examination is UpperBounds
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r067-smll-152649739600114
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of positive values
NUM_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-11a-UpperBounds-00
FORMULA_NAME DLCround-PT-11a-UpperBounds-01
FORMULA_NAME DLCround-PT-11a-UpperBounds-02
FORMULA_NAME DLCround-PT-11a-UpperBounds-03
FORMULA_NAME DLCround-PT-11a-UpperBounds-04
FORMULA_NAME DLCround-PT-11a-UpperBounds-05
FORMULA_NAME DLCround-PT-11a-UpperBounds-06
FORMULA_NAME DLCround-PT-11a-UpperBounds-07
FORMULA_NAME DLCround-PT-11a-UpperBounds-08
FORMULA_NAME DLCround-PT-11a-UpperBounds-09
FORMULA_NAME DLCround-PT-11a-UpperBounds-10
FORMULA_NAME DLCround-PT-11a-UpperBounds-11
FORMULA_NAME DLCround-PT-11a-UpperBounds-12
FORMULA_NAME DLCround-PT-11a-UpperBounds-13
FORMULA_NAME DLCround-PT-11a-UpperBounds-14
FORMULA_NAME DLCround-PT-11a-UpperBounds-15

=== Now, execution of the tool begins

BK_START 1526639217848


BK_STOP 1526639240775

--------------------
content from stderr:

Prefix is 75f5f979.
Reading known information in /usr/share/mcc4mcc/75f5f979-known.json.
Reading learned information in /usr/share/mcc4mcc/75f5f979-learned.json.
Reading value translations in /usr/share/mcc4mcc/75f5f979-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using DLCround-PT-11a as instance name.
Using DLCround as model name.
Using algorithm or tool random-forest.
Model characteristics are: {'Examination': 'UpperBounds', 'Place/Transition': True, 'Colored': False, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': False, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': None, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': True, 'Safe': True, 'Deadlock': None, 'Reversible': None, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 10110, 'Memory': 346.83, 'Tool': 'itstools'}, {'Time': 2211972, 'Memory': 4171.82, 'Tool': 'lola'}].
Learned tools are: [{'Tool': 'gspn'}].
UpperBounds itstools DLCround-PT-11a...
May 18, 2018 10:27:07 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-z3path, /usr/bin/z3, -yices2path, /usr/bin/yices, -ltsminpath, /usr/bin, -smt, -its, -pnfolder, /mcc-data, -examination, UpperBounds]
May 18, 2018 10:27:07 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /mcc-data/model.pnml
May 18, 2018 10:27:08 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 318 ms
May 18, 2018 10:27:08 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 377 places.
May 18, 2018 10:27:08 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2993 transitions.
May 18, 2018 10:27:08 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 18, 2018 10:27:08 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /mcc-data/model.pnml.img.gal : 92 ms
May 18, 2018 10:27:08 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 18, 2018 10:27:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 18, 2018 10:27:10 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 768 ms
May 18, 2018 10:27:10 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 18, 2018 10:27:10 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 5052 redundant transitions.
May 18, 2018 10:27:10 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /mcc-data/UpperBounds.pnml.gal : 35 ms
May 18, 2018 10:27:11 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /mcc-data/UpperBounds.prop : 1 ms
Invoking ITS tools like this :CommandLine [args=[/usr/share/itscl/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201804131302/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /mcc-data/UpperBounds.pnml.gal, -t, CGAL, -reachable-file, UpperBounds.prop, --nowitness], workingDir=/mcc-data]

its-reach command run as :

/usr/share/itscl/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201804131302/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /mcc-data/UpperBounds.pnml.gal -t CGAL -reachable-file UpperBounds.prop --nowitness
Loading property file UpperBounds.prop.
Read [bounds] property : DLCround-PT-11a-UpperBounds-00 with value :u26.p158
Read [bounds] property : DLCround-PT-11a-UpperBounds-01 with value :u232.p364
Read [bounds] property : DLCround-PT-11a-UpperBounds-02 with value :u8.p65
Read [bounds] property : DLCround-PT-11a-UpperBounds-03 with value :u199.p331
Read [bounds] property : DLCround-PT-11a-UpperBounds-04 with value :u71.p203
Read [bounds] property : DLCround-PT-11a-UpperBounds-05 with value :u25.p157
Read [bounds] property : DLCround-PT-11a-UpperBounds-06 with value :u72.p204
Read [bounds] property : DLCround-PT-11a-UpperBounds-07 with value :u238.p370
Read [bounds] property : DLCround-PT-11a-UpperBounds-08 with value :u114.p246
Read [bounds] property : DLCround-PT-11a-UpperBounds-09 with value :u16.p141
Read [bounds] property : DLCround-PT-11a-UpperBounds-10 with value :u60.p192
Read [bounds] property : DLCround-PT-11a-UpperBounds-11 with value :u181.p313
Read [bounds] property : DLCround-PT-11a-UpperBounds-12 with value :u3.p18
Read [bounds] property : DLCround-PT-11a-UpperBounds-13 with value :u61.p193
Read [bounds] property : DLCround-PT-11a-UpperBounds-14 with value :u93.p225
Read [bounds] property : DLCround-PT-11a-UpperBounds-15 with value :u140.p272
built 457 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround\_PT\_11a\_flat\_mod,2.401e+15,2.57248,25552,496,21,10256,1139,3200,9507,68,1156,0
Total reachable state count : 2401000000000001

Verifying 16 reachability properties.
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-00 :0 <= u26.p158 <= 1
FORMULA DLCround-PT-11a-UpperBounds-00 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-00,0,2.96372,25552,1,0,10256,1139,4674,9507,84,1156,31405
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-01 :0 <= u232.p364 <= 1
FORMULA DLCround-PT-11a-UpperBounds-01 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-01,0,3.44712,25616,1,0,10256,1139,5377,9507,84,1156,32754
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-02 :0 <= u8.p65 <= 1
FORMULA DLCround-PT-11a-UpperBounds-02 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-02,0,3.81643,25616,1,0,10256,1139,5701,9507,89,1156,33259
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-03 :0 <= u199.p331 <= 1
FORMULA DLCround-PT-11a-UpperBounds-03 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-03,0,4.17783,25616,1,0,10256,1139,6148,9507,89,1156,33350
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-04 :0 <= u71.p203 <= 1
FORMULA DLCround-PT-11a-UpperBounds-04 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-04,0,4.53805,25616,1,0,10256,1139,6455,9507,89,1156,33721
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-05 :0 <= u25.p157 <= 1
FORMULA DLCround-PT-11a-UpperBounds-05 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-05,0,4.89975,25616,1,0,10256,1139,6717,9507,89,1156,34190
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-06 :0 <= u72.p204 <= 1
FORMULA DLCround-PT-11a-UpperBounds-06 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-06,0,5.2608,25616,1,0,10256,1139,7026,9507,89,1156,34557
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-07 :0 <= u238.p370 <= 1
FORMULA DLCround-PT-11a-UpperBounds-07 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-07,0,5.62393,25616,1,0,10256,1139,7515,9507,89,1156,34596
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-08 :0 <= u114.p246 <= 1
FORMULA DLCround-PT-11a-UpperBounds-08 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-08,0,5.9852,25616,1,0,10256,1139,7867,9507,89,1156,34877
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-09 :0 <= u16.p141 <= 1
FORMULA DLCround-PT-11a-UpperBounds-09 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-09,0,6.34691,25616,1,0,10256,1139,8279,9507,104,1156,35218
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-10 :0 <= u60.p192 <= 1
FORMULA DLCround-PT-11a-UpperBounds-10 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-10,0,6.70584,25616,1,0,10256,1139,8574,9507,104,1156,35613
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-11 :0 <= u181.p313 <= 1
FORMULA DLCround-PT-11a-UpperBounds-11 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-11,0,7.06955,25616,1,0,10256,1139,9000,9507,104,1156,35746
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-12 :0 <= u3.p18 <= 1
FORMULA DLCround-PT-11a-UpperBounds-12 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-12,0,7.42971,25616,1,0,10256,1139,9268,9507,115,1156,36235
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-13 :0 <= u61.p193 <= 1
FORMULA DLCround-PT-11a-UpperBounds-13 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-13,0,7.79032,25616,1,0,10256,1139,9564,9507,115,1156,36628
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-14 :0 <= u93.p225 <= 1
FORMULA DLCround-PT-11a-UpperBounds-14 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-14,0,8.14917,25616,1,0,10256,1139,9895,9507,115,1156,36951
Min sum of variable value : 0
Maximum sum along a path : 1
Bounds property DLCround-PT-11a-UpperBounds-15 :0 <= u140.p272 <= 1
FORMULA DLCround-PT-11a-UpperBounds-15 1 TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-11a-UpperBounds-15,0,8.50991,25616,1,0,10256,1139,10278,9507,115,1156,37170

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-11a"
export BK_EXAMINATION="UpperBounds"
export BK_TOOL="irma4mcc-structural"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-11a.tgz
mv DLCround-PT-11a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-structural"
echo " Input is DLCround-PT-11a, examination is UpperBounds"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r067-smll-152649739600114"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "UpperBounds" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "UpperBounds" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "UpperBounds.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property UpperBounds.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "UpperBounds.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' UpperBounds.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;