Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
/home/mcc/execution
total 7.0M
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.8K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 6.9M May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-full
Input is DLCshifumi-PT-6a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r066-smll-152649737300214
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-00
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-01
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-02
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-03
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-04
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-05
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-06
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-07
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-08
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-09
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-10
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-11
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-12
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-13
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-14
FORMULA_NAME DLCshifumi-PT-6a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1526659609644


BK_STOP 1526659914851

--------------------
content from stderr:

Prefix is 65b80f64.
Reading known information in /usr/share/mcc4mcc/65b80f64-known.json.
Reading learned information in /usr/share/mcc4mcc/65b80f64-learned.json.
Reading value translations in /usr/share/mcc4mcc/65b80f64-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using DLCshifumi-PT-6a as instance name.
Using DLCshifumi as model name.
Using algorithm or tool voting-classifier.
Model characteristics are: {'Examination': 'CTLFireability', 'Place/Transition': True, 'Colored': False, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': False, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': None, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': True, 'Safe': True, 'Deadlock': None, 'Reversible': None, 'Quasi Live': None, 'Live': None}.
/usr/local/lib/python3.6/dist-packages/sklearn/preprocessing/label.py:151: DeprecationWarning: The truth value of an empty array is ambiguous. Returning False, but in future this will result in an error. Use `array.size > 0` to check that an array is not empty.
if diff:
Known tools are: [{'Time': 423207, 'Memory': 3306.17, 'Tool': 'marcie'}, {'Time': 454338, 'Memory': 3306.41, 'Tool': 'marcie'}, {'Time': 1235802, 'Memory': 15944.49, 'Tool': 'lola'}, {'Time': 1782361, 'Memory': 15952.56, 'Tool': 'lola'}, {'Time': 3530119, 'Memory': 9388.89, 'Tool': 'itstools'}, {'Time': 3531958, 'Memory': 9385.32, 'Tool': 'itstools'}].
Learned tools are: [{'Tool': 'lola'}].
Learned tool lola is 2.9200887508949522x far from the best tool marcie.
CTLFireability marcie DLCshifumi-PT-6a...
timeout --kill-after=10s --signal=SIGINT 1m for testing only
check for maximal unmarked siphon

Marcie rev. 8852M (built: crohr on 2017-05-03)
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: marcie --net-file=model.pnml --mcc-file=CTLFireability.xml --memory=6

parse successfull
net created successfully

Net: DLCshifumi_PT_6a
(NrP: 3568 NrTr: 25936 NrArc: 101182)

ok
check for constant places
ok
check if there are places and transitions
ok
check if there are transitions without pre-places
parse formulas
formulas created successfully
place and transition orderings generation:0m 0.079sec

ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok

net check time: 0m 0.018sec

init dd package: 0m 1.572sec


RS generation: 0m10.567sec


-> reachability set: #nodes 3568 (3.6e+03) #states 44,971,908,938,350,550,203,690,037,845,046,502,858,910,712,208,821,747,267,590,169,606,165,280,652,717,530,801,503,529,268,103,662,016,668,696,336,336,122,037,734,100,478,204,746,341,255,232,210,040,244,343,000,001 (160)



starting MCC model checker
--------------------------

checking: AG [EX [IS_FIREABLE [t25551]]]
normalized: ~ [E [true U ~ [EX [IS_FIREABLE [t25551]]]]]

.-> the formula is FALSE

FORMULA DLCshifumi-PT-6a-CTLFireability-01 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m12.297sec

checking: AG [~ [~ [AF [IS_FIREABLE [t14633]]]]]
normalized: ~ [E [true U EG [~ [IS_FIREABLE [t14633]]]]]

..
EG iterations: 2
-> the formula is FALSE

FORMULA DLCshifumi-PT-6a-CTLFireability-07 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 1.041sec

checking: AF [~ [~ [IS_FIREABLE [t6343]]]]
normalized: ~ [EG [~ [IS_FIREABLE [t6343]]]]

.
EG iterations: 1
-> the formula is FALSE

FORMULA DLCshifumi-PT-6a-CTLFireability-08 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 6.794sec

checking: ~ [EG [[IS_FIREABLE [t11790] | AF [IS_FIREABLE [t13711]]]]]
normalized: ~ [EG [[IS_FIREABLE [t11790] | ~ [EG [~ [IS_FIREABLE [t13711]]]]]]]


after gc: zbdd nodes used:6467, unused:18743533..
EG iterations: 2
.
EG iterations: 1
-> the formula is FALSE

FORMULA DLCshifumi-PT-6a-CTLFireability-03 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m19.652sec

checking: E [EF [[IS_FIREABLE [t13584] | IS_FIREABLE [t7914]]] U IS_FIREABLE [t5964]]
normalized: E [E [true U [IS_FIREABLE [t13584] | IS_FIREABLE [t7914]]] U IS_FIREABLE [t5964]]

-> the formula is TRUE

FORMULA DLCshifumi-PT-6a-CTLFireability-02 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m20.512sec

checking: ~ [A [~ [[IS_FIREABLE [t4111] | IS_FIREABLE [t14638]]] U IS_FIREABLE [t1677]]]
normalized: ~ [[~ [E [~ [IS_FIREABLE [t1677]] U [~ [IS_FIREABLE [t1677]] & [IS_FIREABLE [t4111] | IS_FIREABLE [t14638]]]]] & ~ [EG [~ [IS_FIREABLE [t1677]]]]]]

.
EG iterations: 1

after gc: zbdd nodes used:6337, unused:37493663-> the formula is TRUE

FORMULA DLCshifumi-PT-6a-CTLFireability-06 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m25.495sec

checking: EX [AF [[IS_FIREABLE [t976] | [IS_FIREABLE [t20789] & IS_FIREABLE [t11768]]]]]
normalized: EX [~ [EG [~ [[IS_FIREABLE [t976] | [IS_FIREABLE [t20789] & IS_FIREABLE [t11768]]]]]]]

.
EG iterations: 1
.-> the formula is FALSE

FORMULA DLCshifumi-PT-6a-CTLFireability-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m12.413sec

checking: [EF [IS_FIREABLE [t10623]] | AG [[IS_FIREABLE [t24905] & IS_FIREABLE [t4073]]]]
normalized: [E [true U IS_FIREABLE [t10623]] | ~ [E [true U ~ [[IS_FIREABLE [t24905] & IS_FIREABLE [t4073]]]]]]

-> the formula is TRUE

FORMULA DLCshifumi-PT-6a-CTLFireability-13 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m14.884sec

checking: AF [AG [[[IS_FIREABLE [t15396] & IS_FIREABLE [t8403]] & [IS_FIREABLE [t15633] & IS_FIREABLE [t11786]]]]]
normalized: ~ [EG [E [true U ~ [[[IS_FIREABLE [t15633] & IS_FIREABLE [t11786]] & [IS_FIREABLE [t15396] & IS_FIREABLE [t8403]]]]]]]


EG iterations: 0
-> the formula is FALSE

FORMULA DLCshifumi-PT-6a-CTLFireability-00 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.123sec

checking: [~ [AG [[~ [IS_FIREABLE [t21443]] & ~ [IS_FIREABLE [t2407]]]]] & EF [E [IS_FIREABLE [t24447] U IS_FIREABLE [t7486]]]]
normalized: [E [true U E [IS_FIREABLE [t24447] U IS_FIREABLE [t7486]]] & E [true U ~ [[~ [IS_FIREABLE [t2407]] & ~ [IS_FIREABLE [t21443]]]]]]

-> the formula is TRUE

FORMULA DLCshifumi-PT-6a-CTLFireability-04 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m44.115sec

checking: AF [[AX [[IS_FIREABLE [t7025] & IS_FIREABLE [t22802]]] | [IS_FIREABLE [t22633] & IS_FIREABLE [t4632]]]]
normalized: ~ [EG [~ [[[IS_FIREABLE [t22633] & IS_FIREABLE [t4632]] | ~ [EX [~ [[IS_FIREABLE [t7025] & IS_FIREABLE [t22802]]]]]]]]]


after gc: zbdd nodes used:9461, unused:74990539.
EG iterations: 0
-> the formula is FALSE

FORMULA DLCshifumi-PT-6a-CTLFireability-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m15.077sec

checking: EF [AF [[[IS_FIREABLE [t951] | IS_FIREABLE [t23636]] & [IS_FIREABLE [t619] & IS_FIREABLE [t2310]]]]]
normalized: E [true U ~ [EG [~ [[[IS_FIREABLE [t619] & IS_FIREABLE [t2310]] & [IS_FIREABLE [t951] | IS_FIREABLE [t23636]]]]]]]

.
EG iterations: 1
-> the formula is TRUE

FORMULA DLCshifumi-PT-6a-CTLFireability-15 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m29.562sec

checking: ~ [[[EF [[IS_FIREABLE [t1564] | IS_FIREABLE [t3762]]] | IS_FIREABLE [t18709]] & [~ [~ [~ [IS_FIREABLE [t20876]]]] & AF [IS_FIREABLE [t8898]]]]]
normalized: ~ [[[IS_FIREABLE [t18709] | E [true U [IS_FIREABLE [t1564] | IS_FIREABLE [t3762]]]] & [~ [EG [~ [IS_FIREABLE [t8898]]]] & ~ [IS_FIREABLE [t20876]]]]]

.
EG iterations: 1
-> the formula is TRUE

FORMULA DLCshifumi-PT-6a-CTLFireability-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m12.576sec

checking: A [E [IS_FIREABLE [t6141] U IS_FIREABLE [t14745]] U [AF [IS_FIREABLE [t2515]] | [[IS_FIREABLE [t11803] | IS_FIREABLE [t12887]] | IS_FIREABLE [t12317]]]]
normalized: [~ [EG [~ [[[IS_FIREABLE [t12317] | [IS_FIREABLE [t11803] | IS_FIREABLE [t12887]]] | ~ [EG [~ [IS_FIREABLE [t2515]]]]]]]] & ~ [E [~ [[[IS_FIREABLE [t12317] | [IS_FIREABLE [t11803] | IS_FIREABLE [t12887]]] | ~ [EG [~ [IS_FIREABLE [t2515]]]]]] U [~ [[[IS_FIREABLE [t12317] | [IS_FIREABLE [t11803] | IS_FIREABLE [t12887]]] | ~ [EG [~ [IS_FIREABLE [t2515]]]]]] & ~ [E [IS_FIREABLE [t6141] U IS_FIREABLE [t14745]]]]]]]

.
EG iterations: 1
.
EG iterations: 1
.
EG iterations: 1
..
EG iterations: 2
-> the formula is FALSE

FORMULA DLCshifumi-PT-6a-CTLFireability-09 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m19.265sec

checking: [E [[[IS_FIREABLE [t1531] | IS_FIREABLE [t4347]] | ~ [IS_FIREABLE [t10095]]] U EX [IS_FIREABLE [t14284]]] & AF [[AG [IS_FIREABLE [t25079]] | [IS_FIREABLE [t21977] | [IS_FIREABLE [t6757] | IS_FIREABLE [t5481]]]]]]
normalized: [~ [EG [~ [[~ [E [true U ~ [IS_FIREABLE [t25079]]]] | [IS_FIREABLE [t21977] | [IS_FIREABLE [t6757] | IS_FIREABLE [t5481]]]]]]] & E [[~ [IS_FIREABLE [t10095]] | [IS_FIREABLE [t1531] | IS_FIREABLE [t4347]]] U EX [IS_FIREABLE [t14284]]]]

..
EG iterations: 1
-> the formula is FALSE

FORMULA DLCshifumi-PT-6a-CTLFireability-05 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m19.398sec

checking: [AG [[~ [[IS_FIREABLE [t22049] | IS_FIREABLE [t21786]]] | ~ [IS_FIREABLE [t9587]]]] | [~ [[~ [[IS_FIREABLE [t21028] & IS_FIREABLE [t17572]]] & EF [IS_FIREABLE [t24933]]]] & A [IS_FIREABLE [t18166] U IS_FIREABLE [t60]]]]
normalized: [[[~ [EG [~ [IS_FIREABLE [t60]]]] & ~ [E [~ [IS_FIREABLE [t60]] U [~ [IS_FIREABLE [t18166]] & ~ [IS_FIREABLE [t60]]]]]] & ~ [[~ [[IS_FIREABLE [t21028] & IS_FIREABLE [t17572]]] & E [true U IS_FIREABLE [t24933]]]]] | ~ [E [true U ~ [[~ [IS_FIREABLE [t9587]] | ~ [[IS_FIREABLE [t22049] | IS_FIREABLE [t21786]]]]]]]]

.
EG iterations: 1
-> the formula is FALSE

FORMULA DLCshifumi-PT-6a-CTLFireability-14 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m30.724sec

totally nodes used: 118704051(1.2e+08)
number of garbage collections: 3
fire ops cache: hits/miss/sum: 1046338991 1349798573 2396137564
used/not used/entry size/cache size: 67084050 24814 16 1024MB
basic ops cache: hits/miss/sum: 99676102 113960362 213636464
used/not used/entry size/cache size: 16724760 52456 12 192MB
unary ops cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 8388608 8 64MB
abstract ops cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 8388608 12 96MB
state nr cache: hits/miss/sum: 1152 3568 4720
used/not used/entry size/cache size: 0 2097152 32 64MB
max state cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 8388608 32 256MB
uniqueHash elements/entry size/size: 67108864 4 256MB
0 30411109
1 24075132
2 9528389
3 2509281
4 496084
5 77403
6 10185
7 1157
8 114
9 9
>= 10 1

Total processing time: 5m 0.261sec

.........................................................

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-6a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="irma4mcc-full"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-6a.tgz
mv DLCshifumi-PT-6a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-full"
echo " Input is DLCshifumi-PT-6a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r066-smll-152649737300214"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;