About the Execution of Irma.full for DLCshifumi-PT-5a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2577.980 | 26879.00 | 26298.00 | 568.30 | FTFFFTTTTFFTFTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 4.1M
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.6K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 3.9M May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-full
Input is DLCshifumi-PT-5a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r066-smll-152649737200201
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-00
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-01
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-02
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-03
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-04
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-05
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-06
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-07
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-08
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-09
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-10
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-11
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-12
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-13
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-14
FORMULA_NAME DLCshifumi-PT-5a-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1526658208600
BK_STOP 1526658235479
--------------------
content from stderr:
Prefix is 65b80f64.
Reading known information in /usr/share/mcc4mcc/65b80f64-known.json.
Reading learned information in /usr/share/mcc4mcc/65b80f64-learned.json.
Reading value translations in /usr/share/mcc4mcc/65b80f64-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using DLCshifumi-PT-5a as instance name.
Using DLCshifumi as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'ReachabilityCardinality', 'Place/Transition': True, 'Colored': False, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': False, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': None, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': True, 'Safe': True, 'Deadlock': None, 'Reversible': None, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 27632, 'Memory': 2258.4, 'Tool': 'marcie'}, {'Time': 31886, 'Memory': 2258.56, 'Tool': 'marcie'}, {'Time': 135939, 'Memory': 643.45, 'Tool': 'lola'}, {'Time': 136874, 'Memory': 643.87, 'Tool': 'lola'}, {'Time': 219468, 'Memory': 2696.52, 'Tool': 'itstools'}, {'Time': 222070, 'Memory': 2476.17, 'Tool': 'itstools'}].
Learned tools are: [{'Tool': 'lola'}].
Learned tool lola is 4.919622177185872x far from the best tool marcie.
ReachabilityCardinality marcie DLCshifumi-PT-5a...
timeout --kill-after=10s --signal=SIGINT 1m for testing only
check for maximal unmarked siphon
Marcie rev. 8852M (built: crohr on 2017-05-03)
A model checker for Generalized Stochastic Petri nets
authors: Alex Tovchigrechko (IDD package and CTL model checking)
Martin Schwarick (Symbolic numerical analysis and CSL model checking)
Christian Rohr (Simulative and approximative numerical model checking)
marcie@informatik.tu-cottbus.de
called as: marcie --net-file=model.pnml --mcc-file=ReachabilityCardinality.xml --memory=6
parse successfull
net created successfully
Net: DLCshifumi_PT_5a
(NrP: 2162 NrTr: 14865 NrArc: 57457)
ok
check for constant places
ok
check if there are places and transitions
ok
check if there are transitions without pre-places
parse formulas
formulas created successfully
place and transition orderings generation:0m 0.042sec
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok
net check time: 0m 0.014sec
init dd package: 0m 1.606sec
RS generation: 0m 4.211sec
-> reachability set: #nodes 2162 (2.2e+03) #states 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
starting MCC model checker
--------------------------
checking: EF [2<=p137]
normalized: E [true U 2<=p137]
abstracting: (2<=p137)
states: 0
-> the formula is FALSE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-02 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.060sec
checking: AG [~ [~ [~ [2<=p465]]]]
normalized: ~ [E [true U 2<=p465]]
abstracting: (2<=p465)
states: 0
-> the formula is TRUE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-08 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.058sec
checking: EF [2<=p1228]
normalized: E [true U 2<=p1228]
abstracting: (2<=p1228)
states: 0
-> the formula is FALSE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-09 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.059sec
checking: AG [p137<=p1751]
normalized: ~ [E [true U ~ [p137<=p1751]]]
abstracting: (p137<=p1751)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
-> the formula is TRUE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-01 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.062sec
checking: EF [~ [p243<=p1720]]
normalized: E [true U ~ [p243<=p1720]]
abstracting: (p243<=p1720)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
-> the formula is FALSE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-04 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.063sec
checking: AG [p619<=p1212]
normalized: ~ [E [true U ~ [p619<=p1212]]]
abstracting: (p619<=p1212)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
-> the formula is TRUE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-05 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.062sec
checking: EF [[3<=p1671 | 2<=p1555]]
normalized: E [true U [3<=p1671 | 2<=p1555]]
abstracting: (2<=p1555)
states: 0
abstracting: (3<=p1671)
states: 0
-> the formula is FALSE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.063sec
checking: AG [p530<=p1220]
normalized: ~ [E [true U ~ [p530<=p1220]]]
abstracting: (p530<=p1220)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
-> the formula is TRUE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-13 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.063sec
checking: AG [~ [[p1837<=p86 & 1<=p2099]]]
normalized: ~ [E [true U [p1837<=p86 & 1<=p2099]]]
abstracting: (1<=p2099)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,000 (108)
abstracting: (p1837<=p86)
states: 1,264,622,433,847,811,452,634,797,305,324,544,679,795,286,587,352,887,784,765,274,932,287,046,481,842,855,442,591,741,163,910,133,792,804,900,001 (108)
-> the formula is FALSE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-00 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 5.538sec
checking: EF [[~ [~ [p956<=p1884]] & 2<=p478]]
normalized: E [true U [p956<=p1884 & 2<=p478]]
abstracting: (2<=p478)
states: 0
abstracting: (p956<=p1884)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
-> the formula is FALSE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-03 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.071sec
checking: AG [~ [[[p2138<=p803 | 1<=p475] & [1<=p999 & 1<=p387]]]]
normalized: ~ [E [true U [[1<=p999 & 1<=p387] & [p2138<=p803 | 1<=p475]]]]
abstracting: (1<=p475)
states: 1,264,622,433,847,811,452,634,797,305,324,544,679,795,286,587,352,887,784,765,274,932,287,046,481,842,855,442,591,741,163,910,133,792,804,900,000 (108)
abstracting: (p2138<=p803)
states: 1,264,622,433,847,811,452,634,797,305,324,544,679,795,286,587,352,887,784,765,274,932,287,046,481,842,855,442,591,741,163,910,133,792,804,900,001 (108)
abstracting: (1<=p387)
states: 1,264,622,433,847,811,452,634,797,305,324,544,679,795,286,587,352,887,784,765,274,932,287,046,481,842,855,442,591,741,163,910,133,792,804,900,000 (108)
abstracting: (1<=p999)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,000 (108)
-> the formula is FALSE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-15 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 4.785sec
checking: AG [[p502<=p20 & [[p1888<=p114 | 1<=p1808] | p56<=p591]]]
normalized: ~ [E [true U ~ [[p502<=p20 & [p56<=p591 | [p1888<=p114 | 1<=p1808]]]]]]
abstracting: (1<=p1808)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,000 (108)
abstracting: (p1888<=p114)
states: 1,264,622,433,847,811,452,634,797,305,324,544,679,795,286,587,352,887,784,765,274,932,287,046,481,842,855,442,591,741,163,910,133,792,804,900,001 (108)
abstracting: (p56<=p591)
states: 7,768,394,950,779,413,209,042,326,304,136,488,747,313,903,322,310,596,392,129,546,012,620,428,388,463,254,861,634,981,435,447,964,727,230,100,001 (108)
abstracting: (p502<=p20)
states: 7,768,394,950,779,413,209,042,326,304,136,488,747,313,903,322,310,596,392,129,546,012,620,428,388,463,254,861,634,981,435,447,964,727,230,100,001 (108)
-> the formula is FALSE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 3.076sec
checking: AG [[2<=p1378 | [[p274<=p1229 | p1066<=p108] & [p988<=p1014 | 2<=p1448]]]]
normalized: ~ [E [true U ~ [[2<=p1378 | [[p274<=p1229 | p1066<=p108] & [p988<=p1014 | 2<=p1448]]]]]]
abstracting: (2<=p1448)
states: 0
abstracting: (p988<=p1014)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
abstracting: (p1066<=p108)
states: 1,264,622,433,847,811,452,634,797,305,324,544,679,795,286,587,352,887,784,765,274,932,287,046,481,842,855,442,591,741,163,910,133,792,804,900,001 (108)
abstracting: (p274<=p1229)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
abstracting: (2<=p1378)
states: 0
-> the formula is TRUE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-07 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.085sec
checking: AG [[[~ [p1193<=p1696] | ~ [p1532<=p939]] | [p1939<=p1903 | [2<=p307 | p737<=p117]]]]
normalized: ~ [E [true U ~ [[[~ [p1193<=p1696] | ~ [p1532<=p939]] | [p1939<=p1903 | [2<=p307 | p737<=p117]]]]]]
abstracting: (p737<=p117)
states: 7,768,394,950,779,413,209,042,326,304,136,488,747,313,903,322,310,596,392,129,546,012,620,428,388,463,254,861,634,981,435,447,964,727,230,100,001 (108)
abstracting: (2<=p307)
states: 0
abstracting: (p1939<=p1903)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
abstracting: (p1532<=p939)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
abstracting: (p1193<=p1696)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
-> the formula is TRUE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-06 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.093sec
checking: AG [[[~ [2<=p1926] | [1<=p1813 & 1<=p856]] | [~ [p388<=p2124] | [p522<=p1869 | p359<=p1653]]]]
normalized: ~ [E [true U ~ [[[[1<=p1813 & 1<=p856] | ~ [2<=p1926]] | [[p522<=p1869 | p359<=p1653] | ~ [p388<=p2124]]]]]]
abstracting: (p388<=p2124)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
abstracting: (p359<=p1653)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
abstracting: (p522<=p1869)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
abstracting: (2<=p1926)
states: 0
abstracting: (1<=p856)
states: 1,264,622,433,847,811,452,634,797,305,324,544,679,795,286,587,352,887,784,765,274,932,287,046,481,842,855,442,591,741,163,910,133,792,804,900,000 (108)
abstracting: (1<=p1813)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,000 (108)
-> the formula is TRUE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.094sec
checking: AG [[[~ [1<=p1021] | [p1473<=p1212 & 3<=p1244]] | [[3<=p2019 | p239<=p2122] | [p1469<=p513 | p2144<=p1398]]]]
normalized: ~ [E [true U ~ [[[~ [1<=p1021] | [p1473<=p1212 & 3<=p1244]] | [[p1469<=p513 | p2144<=p1398] | [3<=p2019 | p239<=p2122]]]]]]
abstracting: (p239<=p2122)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
abstracting: (3<=p2019)
states: 0
abstracting: (p2144<=p1398)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
abstracting: (p1469<=p513)
states: 1,264,622,433,847,811,452,634,797,305,324,544,679,795,286,587,352,887,784,765,274,932,287,046,481,842,855,442,591,741,163,910,133,792,804,900,001 (108)
abstracting: (3<=p1244)
states: 0
abstracting: (p1473<=p1212)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,001 (108)
abstracting: (1<=p1021)
states: 8,852,357,036,934,680,168,443,581,137,271,812,758,567,006,111,470,214,493,356,924,526,009,325,372,899,988,098,142,188,147,370,936,549,634,300,000 (108)
-> the formula is TRUE
FORMULA DLCshifumi-PT-5a-ReachabilityCardinality-14 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT
MC time: 0m 0.043sec
totally nodes used: 7110612(7.1e+06)
number of garbage collections: 0
fire ops cache: hits/miss/sum: 47625698 72161317 119787015
used/not used/entry size/cache size: 43721633 23387231 16 1024MB
basic ops cache: hits/miss/sum: 6293234 7179646 13472880
used/not used/entry size/cache size: 9770036 7007180 12 192MB
unary ops cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 8388608 8 64MB
abstract ops cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 8388608 12 96MB
state nr cache: hits/miss/sum: 5224 7322 12546
used/not used/entry size/cache size: 7302 2089850 32 64MB
max state cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 8388608 32 256MB
uniqueHash elements/entry size/size: 67108864 4 256MB
0 60360125
1 6398986
2 337943
3 11506
4 298
5 6
6 0
7 0
8 0
9 0
>= 10 0
Total processing time: 0m22.192sec
...........................
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-5a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="irma4mcc-full"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-5a.tgz
mv DLCshifumi-PT-5a execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-full"
echo " Input is DLCshifumi-PT-5a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r066-smll-152649737200201"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;