fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r057-smll-152646384800244
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for DES-PT-30a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15754.180 35965.00 77418.00 555.50 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 240K
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.3K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.8K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 101 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 339 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 70K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DES-PT-30a, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r057-smll-152646384800244
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DES-PT-30a-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527334308251

Flatten gal took : 129 ms
Constant places removed 1 places and 1 transitions.
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 0 with 15 rules applied. Total rules applied 15 place count 233 transition count 176
Constant places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 16 place count 232 transition count 176
Symmetric choice reduction at 2 with 1 rule applications. Total rules 17 place count 232 transition count 176
Constant places removed 1 places and 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 18 place count 231 transition count 175
Applied a total of 18 rules in 65 ms. Remains 231 /234 variables (removed 3) and now considering 175/191 (removed 16) transitions.
// Phase 1: matrix 175 rows 231 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 175 rows 231 cols
invariant :p157 + p158 = 1
invariant :p185 + p186 = 1
invariant :-58'p1 + -2'p2 + -4'p3 + -6'p4 + -8'p5 + -10'p6 + -12'p7 + -14'p8 + -16'p9 + -18'p10 + -20'p11 + -22'p12 + -24'p13 + -26'p14 + -28'p15 + -30'p16 + -32'p17 + -34'p18 + -36'p19 + -38'p20 + -40'p21 + -42'p22 + -44'p23 + -46'p24 + -48'p25 + -50'p26 + -52'p27 + -54'p28 + -56'p29 + 60'p30 + 2'p31 + 4'p32 + 6'p33 + 8'p34 + 10'p35 + 12'p36 + 14'p37 + 16'p38 + 18'p39 + 20'p40 + 22'p41 + 24'p42 + 26'p43 + 28'p44 + 30'p45 + 32'p46 + 34'p47 + 36'p48 + 38'p49 + 40'p50 + 42'p51 + 44'p52 + 46'p53 + 48'p54 + 50'p55 + 52'p56 + 54'p57 + 56'p58 + 58'p59 + p152 + p154 + p158 + p214 + p218 + p220 + p221 + -1'p223 + -1'p224 + -1'p228 + -1'p231 + 2'p232 + p233 = 1
invariant :p160 + -1'p174 + p176 + -1'p190 + -1'p192 + p206 = 0
invariant :p173 + p174 = 1
invariant :58'p1 + 2'p2 + 4'p3 + 6'p4 + 8'p5 + 10'p6 + 12'p7 + 14'p8 + 16'p9 + 18'p10 + 20'p11 + 22'p12 + 24'p13 + 26'p14 + 28'p15 + 30'p16 + 32'p17 + 34'p18 + 36'p19 + 38'p20 + 40'p21 + 42'p22 + 44'p23 + 46'p24 + 48'p25 + 50'p26 + 52'p27 + 54'p28 + 56'p29 + -30'p30 + -1'p31 + -2'p32 + -3'p33 + -4'p34 + -5'p35 + -6'p36 + -7'p37 + -8'p38 + -9'p39 + -10'p40 + -11'p41 + -12'p42 + -13'p43 + -14'p44 + -15'p45 + -16'p46 + -17'p47 + -18'p48 + -19'p49 + -20'p50 + -21'p51 + -22'p52 + -23'p53 + -24'p54 + -25'p55 + -26'p56 + -27'p57 + -28'p58 + -29'p59 + -30'p90 + -1'p91 + -2'p92 + -3'p93 + -4'p94 + -5'p95 + -6'p96 + -7'p97 + -8'p98 + -9'p99 + -10'p100 + -11'p101 + -12'p102 + -13'p103 + -14'p104 + -15'p105 + -16'p106 + -17'p107 + -18'p108 + -19'p109 + -20'p110 + -21'p111 + -22'p112 + -23'p113 + -24'p114 + -25'p115 + -26'p116 + -27'p117 + -28'p118 + -29'p119 + -1'p126 + -1'p130 + p133 + -1'p140 + -1'p141 + p148 + -1'p152 + -1'p154 + -1'p158 + p208 + -1'p210 + -1'p212 + -1'p214 + -1'p216 + -1'p220 + p224 + p231 + -1'p232 + -1'p233 = -2
invariant :p205 + p206 + p209 + p210 = 1
invariant :p163 + p174 + -1'p180 + p190 + p196 + -1'p206 = 1
invariant :p183 + p184 = 1
invariant :p193 + p194 + p209 + p210 = 1
invariant :p189 + p190 = 1
invariant :p201 + p202 + p209 + p210 = 1
invariant :p124 + p125 + p126 = 1
invariant :p151 + p152 = 1
invariant :p168 + -1'p174 + p184 + -1'p190 + -1'p200 + p206 = 0
invariant :p197 + p198 + p209 + p210 = 1
invariant :-58'p1 + -2'p2 + -4'p3 + -6'p4 + -8'p5 + -10'p6 + -12'p7 + -14'p8 + -16'p9 + -18'p10 + -20'p11 + -22'p12 + -24'p13 + -26'p14 + -28'p15 + -30'p16 + -32'p17 + -34'p18 + -36'p19 + -38'p20 + -40'p21 + -42'p22 + -44'p23 + -46'p24 + -48'p25 + -50'p26 + -52'p27 + -54'p28 + -56'p29 + 30'p30 + p31 + 2'p32 + 3'p33 + 4'p34 + 5'p35 + 6'p36 + 7'p37 + 8'p38 + 9'p39 + 10'p40 + 11'p41 + 12'p42 + 13'p43 + 14'p44 + 15'p45 + 16'p46 + 17'p47 + 18'p48 + 19'p49 + 20'p50 + 21'p51 + 22'p52 + 23'p53 + 24'p54 + 25'p55 + 26'p56 + 27'p57 + 28'p58 + 29'p59 + 30'p90 + p91 + 2'p92 + 3'p93 + 4'p94 + 5'p95 + 6'p96 + 7'p97 + 8'p98 + 9'p99 + 10'p100 + 11'p101 + 12'p102 + 13'p103 + 14'p104 + 15'p105 + 16'p106 + 17'p107 + 18'p108 + 19'p109 + 20'p110 + 21'p111 + 22'p112 + 23'p113 + 24'p114 + 25'p115 + 26'p116 + 27'p117 + 28'p118 + 29'p119 + p126 + p130 + p132 + p140 + p141 + -1'p148 + p152 + p154 + p158 + -1'p208 + p210 + p212 + p214 + p216 + p220 + -1'p224 + -1'p231 + p232 + p233 = 3
invariant :p211 + p212 = 1
invariant :p161 + p174 + -1'p178 + p190 + p194 + -1'p206 = 1
invariant :p153 + p154 = 1
invariant :p187 + p188 = 1
invariant :p147 + p148 = 1
invariant :p177 + p178 = 1
invariant :p122 + p123 = 1
invariant :p129 + p130 = 1
invariant :p175 + p176 = 1
invariant :p172 + -1'p174 + p188 + -1'p190 + -1'p204 + p206 = 0
invariant :58'p1 + 2'p2 + 4'p3 + 6'p4 + 8'p5 + 10'p6 + 12'p7 + 14'p8 + 16'p9 + 18'p10 + 20'p11 + 22'p12 + 24'p13 + 26'p14 + 28'p15 + 30'p16 + 32'p17 + 34'p18 + 36'p19 + 38'p20 + 40'p21 + 42'p22 + 44'p23 + 46'p24 + 48'p25 + 50'p26 + 52'p27 + 54'p28 + 56'p29 + -60'p30 + -2'p31 + -4'p32 + -6'p33 + -8'p34 + -10'p35 + -12'p36 + -14'p37 + -16'p38 + -18'p39 + -20'p40 + -22'p41 + -24'p42 + -26'p43 + -28'p44 + -30'p45 + -32'p46 + -34'p47 + -36'p48 + -38'p49 + -40'p50 + -42'p51 + -44'p52 + -46'p53 + -48'p54 + -50'p55 + -52'p56 + -54'p57 + -56'p58 + -58'p59 + -1'p152 + -1'p154 + -1'p158 + -1'p214 + -1'p216 + -1'p217 + p219 + -1'p220 + -1'p221 + p223 + p224 + p228 + p231 + -2'p232 + -1'p233 = -1
invariant :p229 + p232 + p233 = 1
invariant :p149 + p150 = 1
invariant :p162 + -1'p174 + p178 + -1'p190 + -1'p194 + p206 = 0
invariant :p207 + p208 + -1'p209 + -1'p210 = 0
invariant :p169 + p174 + -1'p186 + p190 + p202 + -1'p206 = 1
invariant :p120 + p121 = 1
invariant :p166 + -1'p174 + p182 + -1'p190 + -1'p198 + p206 = 0
invariant :p213 + p214 + p215 + p216 + p217 + p220 + p221 = 1
invariant :29'p1 + p2 + 2'p3 + 3'p4 + 4'p5 + 5'p6 + 6'p7 + 7'p8 + 8'p9 + 9'p10 + 10'p11 + 11'p12 + 12'p13 + 13'p14 + 14'p15 + 15'p16 + 16'p17 + 17'p18 + 18'p19 + 19'p20 + 20'p21 + 21'p22 + 22'p23 + 23'p24 + 24'p25 + 25'p26 + 26'p27 + 27'p28 + 28'p29 + -30'p30 + -1'p31 + -2'p32 + -3'p33 + -4'p34 + -5'p35 + -6'p36 + -7'p37 + -8'p38 + -9'p39 + -10'p40 + -11'p41 + -12'p42 + -13'p43 + -14'p44 + -15'p45 + -16'p46 + -17'p47 + -18'p48 + -19'p49 + -20'p50 + -21'p51 + -22'p52 + -23'p53 + -24'p54 + -25'p55 + -26'p56 + -27'p57 + -28'p58 + -29'p59 + -1'p152 + p155 + -1'p174 + -1'p190 + p206 + p209 + -1'p212 + -1'p214 + -1'p216 + -1'p220 + p231 + -1'p232 + -1'p233 = 1
invariant :p167 + p174 + -1'p184 + p190 + p200 + -1'p206 = 1
invariant :p181 + p182 = 1
invariant :p159 + p174 + -1'p176 + p190 + p192 + -1'p206 = 1
invariant :-29'p1 + -1'p2 + -2'p3 + -3'p4 + -4'p5 + -5'p6 + -6'p7 + -7'p8 + -8'p9 + -9'p10 + -10'p11 + -11'p12 + -12'p13 + -13'p14 + -14'p15 + -15'p16 + -16'p17 + -17'p18 + -18'p19 + -19'p20 + -20'p21 + -21'p22 + -22'p23 + -23'p24 + -24'p25 + -25'p26 + -26'p27 + -27'p28 + -28'p29 + 30'p30 + p31 + 2'p32 + 3'p33 + 4'p34 + 5'p35 + 6'p36 + 7'p37 + 8'p38 + 9'p39 + 10'p40 + 11'p41 + 12'p42 + 13'p43 + 14'p44 + 15'p45 + 16'p46 + 17'p47 + 18'p48 + 19'p49 + 20'p50 + 21'p51 + 22'p52 + 23'p53 + 24'p54 + 25'p55 + 26'p56 + 27'p57 + 28'p58 + 29'p59 + p127 + p130 + p154 + p158 + -1'p215 + -1'p224 + -1'p231 + p232 + p233 = 1
invariant :p145 + p146 = 1
invariant :p165 + p174 + -1'p182 + p190 + p198 + -1'p206 = 1
invariant :p224 + p225 + p226 + p228 = 1
invariant :p230 + p231 + -1'p232 + -1'p233 = 0
invariant :29'p1 + p2 + 2'p3 + 3'p4 + 4'p5 + 5'p6 + 6'p7 + 7'p8 + 8'p9 + 9'p10 + 10'p11 + 11'p12 + 12'p13 + 13'p14 + 14'p15 + 15'p16 + 16'p17 + 17'p18 + 18'p19 + 19'p20 + 20'p21 + 21'p22 + 22'p23 + 23'p24 + 24'p25 + 25'p26 + 26'p27 + 27'p28 + 28'p29 + -30'p30 + -1'p31 + -2'p32 + -3'p33 + -4'p34 + -5'p35 + -6'p36 + -7'p37 + -8'p38 + -9'p39 + -10'p40 + -11'p41 + -12'p42 + -13'p43 + -14'p44 + -15'p45 + -16'p46 + -17'p47 + -18'p48 + -19'p49 + -20'p50 + -21'p51 + -22'p52 + -23'p53 + -24'p54 + -25'p55 + -26'p56 + -27'p57 + -28'p58 + -29'p59 + p128 + -1'p130 + -1'p154 + -1'p158 + p215 + p224 + p231 + -1'p232 + -1'p233 = 0
invariant :p164 + -1'p174 + p180 + -1'p190 + -1'p196 + p206 = 0
invariant :p170 + -1'p174 + p186 + -1'p190 + -1'p202 + p206 = 0
invariant :-1'p220 + -1'p221 + p222 + p223 = 0
invariant :p191 + p192 + p209 + p210 = 1
invariant :p179 + p180 = 1
invariant :p171 + p174 + -1'p188 + p190 + p204 + -1'p206 = 1
invariant :p203 + p204 + p209 + p210 = 1
invariant :-29'p1 + -1'p2 + -2'p3 + -3'p4 + -4'p5 + -5'p6 + -6'p7 + -7'p8 + -8'p9 + -9'p10 + -10'p11 + -11'p12 + -12'p13 + -13'p14 + -14'p15 + -15'p16 + -16'p17 + -17'p18 + -18'p19 + -19'p20 + -20'p21 + -21'p22 + -22'p23 + -23'p24 + -24'p25 + -25'p26 + -26'p27 + -27'p28 + -28'p29 + 30'p30 + p31 + 2'p32 + 3'p33 + 4'p34 + 5'p35 + 6'p36 + 7'p37 + 8'p38 + 9'p39 + 10'p40 + 11'p41 + 12'p42 + 13'p43 + 14'p44 + 15'p45 + 16'p46 + 17'p47 + 18'p48 + 19'p49 + 20'p50 + 21'p51 + 22'p52 + 23'p53 + 24'p54 + 25'p55 + 26'p56 + 27'p57 + 28'p58 + 29'p59 + p152 + p156 + p174 + p190 + -1'p206 + -1'p209 + p212 + p214 + p216 + p220 + -1'p231 + p232 + p233 = 0
invariant :p195 + p196 + p209 + p210 = 1
invariant :p199 + p200 + p209 + p210 = 1
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 48 ordering constraints for composite.
built 13 ordering constraints for composite.
built 33 ordering constraints for composite.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 4038 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 43 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
LTSmin run took 201 ms.
FORMULA DES-PT-30a-ReachabilityDeadlock-0 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527334344216

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 26, 2018 11:31:50 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 26, 2018 11:31:50 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 26, 2018 11:31:50 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 99 ms
May 26, 2018 11:31:50 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 234 places.
May 26, 2018 11:31:50 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 191 transitions.
May 26, 2018 11:31:50 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 26, 2018 11:31:50 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 22 ms
May 26, 2018 11:31:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 122 ms
May 26, 2018 11:31:51 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 8 ms
May 26, 2018 11:31:51 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 191 transitions.
May 26, 2018 11:31:51 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 26, 2018 11:31:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 61 ms
May 26, 2018 11:31:51 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 175 transitions.
May 26, 2018 11:31:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 44 ms
May 26, 2018 11:31:51 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 26, 2018 11:31:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 50 ms
May 26, 2018 11:31:51 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 26, 2018 11:31:51 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 215 redundant transitions.
May 26, 2018 11:31:51 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 56 place invariants in 69 ms
May 26, 2018 11:31:51 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 8 ms
May 26, 2018 11:31:52 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 231 variables to be positive in 1067 ms
May 26, 2018 11:31:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 175 transitions.
May 26, 2018 11:31:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/175 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 11:31:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 20 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 11:31:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 175 transitions.
May 26, 2018 11:31:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 8 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 11:31:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 175 transitions.
May 26, 2018 11:31:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/175) took 3011 ms. Total solver calls (SAT/UNSAT): 1029(917/112)
May 26, 2018 11:31:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/175) took 6137 ms. Total solver calls (SAT/UNSAT): 2140(2006/134)
May 26, 2018 11:32:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/175) took 9314 ms. Total solver calls (SAT/UNSAT): 3297(3137/160)
May 26, 2018 11:32:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/175) took 12400 ms. Total solver calls (SAT/UNSAT): 4408(4232/176)
May 26, 2018 11:32:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/175) took 15919 ms. Total solver calls (SAT/UNSAT): 5470(5272/198)
May 26, 2018 11:32:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/175) took 19321 ms. Total solver calls (SAT/UNSAT): 5912(5688/224)
May 26, 2018 11:32:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/175) took 22352 ms. Total solver calls (SAT/UNSAT): 6199(5947/252)
May 26, 2018 11:32:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 24330 ms. Total solver calls (SAT/UNSAT): 6859(6499/360)
May 26, 2018 11:32:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 175 transitions.
May 26, 2018 11:32:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 1234 ms. Total solver calls (SAT/UNSAT): 59(0/59)
May 26, 2018 11:32:18 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 26929ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DES-PT-30a"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DES-PT-30a.tgz
mv DES-PT-30a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DES-PT-30a, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r057-smll-152646384800244"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;