About the Execution of ITS-Tools for CloudReconfiguration-PT-402
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 15752.270 | 1690427.00 | 1703445.00 | 5587.60 | F??????????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.9K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 118 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 356 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 912K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is CloudReconfiguration-PT-402, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r056-smll-152646383700151
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-00
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-01
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-02
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-03
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-04
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-05
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-06
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-07
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-08
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-09
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-10
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-11
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-12
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-13
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-14
FORMULA_NAME CloudReconfiguration-PT-402-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1526568782608
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]
its-ctl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
built 14 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,1.9294e+14,20.5495,373084,690,58361,7353,797877,489,16688,5342,4.27547e+06,0
Converting to forward existential form...Done !
original formula: AF(AG((u9.p3320>=1)))
=> equivalent forward existential formula: [FwdG(Init,!(!(E(TRUE U !((u9.p3320>=1))))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t3961, u2.t4, u2.t5, u2.t6, u2.t7, u2.t2906, u2.t2924, u2.t2929, u2.t2934, u2.t2973, u2.t3129, u2.t3157, u2.t3163, u2.t3168, u2.t3170, u2.t3179, u2.t3184, u2.t3189, u2.t3228, u2.t3384, u2.t3412, u2.t3418, u2.t3423, u2.t3425, u2.t3434, u2.t3439, u2.t3444, u2.t3483, u2.t3639, u2.t3667, u2.t3673, u2.t3678, u2.t3680, u2.t3689, u2.t3694, u2.t3699, u2.t3738, u2.t3894, u2.t3922, u2.t3928, u2.t3933, u2.t3935, u2.t3941, u2.t3947, u2.t3953, u2.t3959, u6.t2189, u6.t2192, u6.t2196, u6.t2218, u6.t2219, u6.t2222, u6.t2229, u6.t2240, u6.t2244, u6.t2249, u6.t2256, u6.t2258, u6.t2273, u6.t2276, u6.t2283, u6.t2294, u6.t2298, u6.t2303, u6.t2310, u6.t2312, u6.t2314, u6.t2325, u6.t2327, u6.t2329, u6.t2331, u6.t2333, u6.t2335, u6.t2347, u6.t2349, u6.t2351, u6.t2374, u6.t2376, u6.t2388, u6.t2392, u6.t2396, u6.t2398, u6.t2400, u6.t2405, u6.t2412, u6.t2414, u6.t2419, u6.t2426, u6.t2428, u6.t2430, u6.t2436, u6.t2443, u6.t2445, u6.t2447, u6.t2449, u6.t2451, u6.t2457, u6.t2458, u6.t2460, u6.t2462, u6.t2482, u6.t2483, u6.t2489, u6.t2513, u6.t2524, u6.t2554, u6.t2563, u6.t2595, u6.t2612, u6.t2614, u6.t2621, u6.t2640, u6.t2641, u6.t2647, u6.t2671, u6.t2682, u6.t2708, u6.t2717, u6.t2749, u6.t2764, u6.t2766, u6.t2769, u6.t2777, u6.t2785, u6.t2831, u6.t2846, u6.t2856, u6.t2877, u6.t2893, u6.t2901, u7.t1472, u7.t1475, u7.t1479, u7.t1501, u7.t1502, u7.t1505, u7.t1512, u7.t1523, u7.t1527, u7.t1532, u7.t1539, u7.t1541, u7.t1556, u7.t1559, u7.t1566, u7.t1577, u7.t1581, u7.t1586, u7.t1593, u7.t1595, u7.t1597, u7.t1608, u7.t1610, u7.t1612, u7.t1614, u7.t1616, u7.t1618, u7.t1630, u7.t1632, u7.t1634, u7.t1657, u7.t1659, u7.t1671, u7.t1675, u7.t1679, u7.t1681, u7.t1683, u7.t1688, u7.t1695, u7.t1697, u7.t1702, u7.t1709, u7.t1711, u7.t1713, u7.t1719, u7.t1726, u7.t1728, u7.t1730, u7.t1732, u7.t1734, u7.t1740, u7.t1741, u7.t1743, u7.t1745, u7.t1765, u7.t1766, u7.t1772, u7.t1796, u7.t1807, u7.t1837, u7.t1846, u7.t1878, u7.t1895, u7.t1897, u7.t1904, u7.t1923, u7.t1924, u7.t1930, u7.t1954, u7.t1965, u7.t1991, u7.t2000, u7.t2032, u7.t2047, u7.t2049, u7.t2060, u7.t2068, u7.t2114, u7.t2129, u7.t2139, u7.t2160, u7.t2176, u7.t2184, u8.t754, u8.t757, u8.t761, u8.t783, u8.t784, u8.t787, u8.t794, u8.t805, u8.t809, u8.t814, u8.t821, u8.t823, u8.t838, u8.t841, u8.t848, u8.t859, u8.t863, u8.t868, u8.t875, u8.t877, u8.t879, u8.t890, u8.t892, u8.t894, u8.t896, u8.t898, u8.t900, u8.t912, u8.t914, u8.t916, u8.t939, u8.t941, u8.t953, u8.t957, u8.t961, u8.t963, u8.t965, u8.t970, u8.t977, u8.t979, u8.t984, u8.t991, u8.t993, u8.t995, u8.t1001, u8.t1008, u8.t1010, u8.t1012, u8.t1014, u8.t1016, u8.t1022, u8.t1023, u8.t1025, u8.t1027, u8.t1047, u8.t1048, u8.t1054, u8.t1078, u8.t1089, u8.t1119, u8.t1128, u8.t1160, u8.t1177, u8.t1179, u8.t1186, u8.t1205, u8.t1206, u8.t1212, u8.t1236, u8.t1247, u8.t1273, u8.t1282, u8.t1314, u8.t1329, u8.t1331, u8.t1334, u8.t1342, u8.t1350, u8.t1396, u8.t1411, u8.t1421, u8.t1442, u8.t1458, u8.t1466, u9.t36, u9.t39, u9.t43, u9.t65, u9.t66, u9.t69, u9.t76, u9.t87, u9.t91, u9.t96, u9.t103, u9.t105, u9.t120, u9.t123, u9.t130, u9.t141, u9.t145, u9.t150, u9.t157, u9.t159, u9.t161, u9.t172, u9.t174, u9.t176, u9.t178, u9.t180, u9.t182, u9.t194, u9.t196, u9.t198, u9.t221, u9.t223, u9.t235, u9.t239, u9.t243, u9.t245, u9.t247, u9.t252, u9.t259, u9.t261, u9.t266, u9.t273, u9.t275, u9.t277, u9.t283, u9.t290, u9.t292, u9.t294, u9.t296, u9.t298, u9.t304, u9.t305, u9.t307, u9.t309, u9.t329, u9.t330, u9.t336, u9.t360, u9.t371, u9.t401, u9.t410, u9.t442, u9.t459, u9.t461, u9.t468, u9.t487, u9.t488, u9.t494, u9.t518, u9.t529, u9.t555, u9.t564, u9.t596, u9.t611, u9.t613, u9.t616, u9.t624, u9.t632, u9.t678, u9.t693, u9.t703, u9.t724, u9.t740, u9.t748, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/3882/381/4263
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Fast SCC detection found a local SCC at level 1
Fast SCC detection found an SCC at level 2
Fast SCC detection found an SCC at level 3
Fast SCC detection found an SCC at level 4
Fast SCC detection found an SCC at level 5
Fast SCC detection found an SCC at level 6
Fast SCC detection found an SCC at level 8
Fast SCC detection found an SCC at level 9
Fast SCC detection found an SCC at level 10
(forward)formula 0,0,314.651,4346556,1,0,278600,4.84859e+06,1877,810903,31695,3.78089e+07,43539
FORMULA CloudReconfiguration-PT-402-CTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !
terminate called after throwing an instance of 'std::bad_alloc'
what(): std::bad_alloc
BK_STOP 1526570473035
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 17, 2018 2:53:04 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 17, 2018 2:53:04 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 17, 2018 2:53:05 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 297 ms
May 17, 2018 2:53:05 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3554 places.
May 17, 2018 2:53:05 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 4263 transitions.
May 17, 2018 2:53:05 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 17, 2018 2:53:05 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 69 ms
May 17, 2018 2:53:05 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 17, 2018 2:53:05 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 17, 2018 2:53:06 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 697 ms
May 17, 2018 2:53:06 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 17, 2018 2:53:06 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 164 redundant transitions.
May 17, 2018 2:53:07 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 29 ms
May 17, 2018 2:53:07 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 2 ms
ITS-tools command line returned an error code 134
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CloudReconfiguration-PT-402"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/CloudReconfiguration-PT-402.tgz
mv CloudReconfiguration-PT-402 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is CloudReconfiguration-PT-402, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r056-smll-152646383700151"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;