fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r033-ebro-152646310900097
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for BART-PT-040

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.560 24833.00 46941.00 183.70 F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 28M
-rw-r--r-- 1 mcc users 1.5M May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 3.7M May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 974K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 2.4M May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 588K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 1.4M May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 510K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 1.2M May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 1.1M May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 2.6M May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 102 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 340 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 788K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 2.0M May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 14K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 26K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 9.3M May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is BART-PT-040, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r033-ebro-152646310900097
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-PT-040-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527287955407

Flatten gal took : 3052 ms
Performed 2600 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 2600 rules applied. Total rules applied 2600 place count 5280 transition count 5480
Constant places removed 2600 places and 0 transitions.
Iterating post reduction 1 with 2600 rules applied. Total rules applied 5200 place count 2680 transition count 5480
Symmetric choice reduction at 2 with 240 rule applications. Total rules 5440 place count 2680 transition count 5480
Constant places removed 240 places and 240 transitions.
Reduce isomorphic transitions removed 40 transitions.
Performed 40 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 320 rules applied. Total rules applied 5760 place count 2440 transition count 5160
Constant places removed 40 places and 0 transitions.
Iterating post reduction 3 with 40 rules applied. Total rules applied 5800 place count 2400 transition count 5160
Symmetric choice reduction at 4 with 160 rule applications. Total rules 5960 place count 2400 transition count 5160
Constant places removed 160 places and 160 transitions.
Performed 40 Post agglomeration using F-continuation condition.
Iterating post reduction 4 with 200 rules applied. Total rules applied 6160 place count 2240 transition count 4960
Constant places removed 40 places and 0 transitions.
Iterating post reduction 5 with 40 rules applied. Total rules applied 6200 place count 2200 transition count 4960
Symmetric choice reduction at 6 with 120 rule applications. Total rules 6320 place count 2200 transition count 4960
Constant places removed 120 places and 120 transitions.
Iterating post reduction 6 with 120 rules applied. Total rules applied 6440 place count 2080 transition count 4840
Symmetric choice reduction at 7 with 120 rule applications. Total rules 6560 place count 2080 transition count 4840
Constant places removed 120 places and 120 transitions.
Iterating post reduction 7 with 120 rules applied. Total rules applied 6680 place count 1960 transition count 4720
Symmetric choice reduction at 8 with 80 rule applications. Total rules 6760 place count 1960 transition count 4720
Constant places removed 80 places and 80 transitions.
Iterating post reduction 8 with 80 rules applied. Total rules applied 6840 place count 1880 transition count 4640
Symmetric choice reduction at 9 with 80 rule applications. Total rules 6920 place count 1880 transition count 4640
Constant places removed 80 places and 80 transitions.
Iterating post reduction 9 with 80 rules applied. Total rules applied 7000 place count 1800 transition count 4560
Symmetric choice reduction at 10 with 80 rule applications. Total rules 7080 place count 1800 transition count 4560
Constant places removed 80 places and 80 transitions.
Iterating post reduction 10 with 80 rules applied. Total rules applied 7160 place count 1720 transition count 4480
Symmetric choice reduction at 11 with 40 rule applications. Total rules 7200 place count 1720 transition count 4480
Constant places removed 40 places and 40 transitions.
Iterating post reduction 11 with 40 rules applied. Total rules applied 7240 place count 1680 transition count 4440
Performed 320 Post agglomeration using F-continuation condition.
Constant places removed 320 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 12 with 480 rules applied. Total rules applied 7720 place count 1360 transition count 3960
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 13 with 240 rules applied. Total rules applied 7960 place count 1280 transition count 3720
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 14 with 240 rules applied. Total rules applied 8200 place count 1200 transition count 3480
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 15 with 240 rules applied. Total rules applied 8440 place count 1120 transition count 3240
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 16 with 240 rules applied. Total rules applied 8680 place count 1040 transition count 3000
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 17 with 240 rules applied. Total rules applied 8920 place count 960 transition count 2760
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 18 with 240 rules applied. Total rules applied 9160 place count 880 transition count 2520
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 19 with 240 rules applied. Total rules applied 9400 place count 800 transition count 2280
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 20 with 240 rules applied. Total rules applied 9640 place count 720 transition count 2040
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 21 with 240 rules applied. Total rules applied 9880 place count 640 transition count 1800
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 22 with 240 rules applied. Total rules applied 10120 place count 560 transition count 1560
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 23 with 240 rules applied. Total rules applied 10360 place count 480 transition count 1320
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 24 with 240 rules applied. Total rules applied 10600 place count 400 transition count 1080
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 25 with 240 rules applied. Total rules applied 10840 place count 320 transition count 840
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 26 with 240 rules applied. Total rules applied 11080 place count 240 transition count 600
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 27 with 240 rules applied. Total rules applied 11320 place count 160 transition count 360
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Performed 40 Post agglomeration using F-continuation condition.
Iterating post reduction 28 with 280 rules applied. Total rules applied 11600 place count 80 transition count 80
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 79 transitions.
FORMULA BART-PT-040-ReachabilityDeadlock-0 FALSE TECHNIQUES TOPOLOGICAL STRUCTURAL_REDUCTION

BK_STOP 1527287980240

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 10:39:18 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 10:39:18 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 10:39:19 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 703 ms
May 25, 2018 10:39:19 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 5490 places.
May 25, 2018 10:39:20 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 8080 transitions.
May 25, 2018 10:39:22 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 210 fixed domain variables (out of 5490 variables) in GAL type BART_PT_040
May 25, 2018 10:39:22 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 210 constant array cells/variables (out of 5490 variables) in type BART_PT_040
May 25, 2018 10:39:22 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: NewDistTable_40_1_39,NewDistTable_37_1_36,DistStation_8,NewDistTable_34_3_31,NewDistTable_16_2_14,NewDistTable_28_5_23,DistStation_11,NewDistTable_15_2_13,DistStation_32,NewDistTable_20_3_17,DistStation_22,NewDistTable_13_4_9,NewDistTable_32_2_30,DistStation_40,NewDistTable_19_4_15,NewDistTable_4_1_3,NewDistTable_16_3_13,NewDistTable_28_2_26,NewDistTable_10_3_7,DistStation_37,NewDistTable_33_5_28,NewDistTable_33_1_32,NewDistTable_23_5_18,DistStation_26,NewDistTable_4_2_2,NewDistTable_6_3_3,NewDistTable_21_4_17,NewDistTable_28_1_27,DistStation_28,NewDistTable_20_5_15,NewDistTable_25_5_20,NewDistTable_11_1_10,NewDistTable_24_1_23,NewDistTable_14_4_10,NewDistTable_32_3_29,DistStation_5,NewDistTable_23_1_22,NewDistTable_35_4_31,NewDistTable_7_4_3,NewDistTable_27_3_24,DistStation_29,NewDistTable_2_1_1,NewDistTable_30_5_25,NewDistTable_27_1_26,NewDistTable_11_2_9,StopTable_2_3,DistStation_16,NewDistTable_22_4_18,NewDistTable_19_3_16,DistStation_23,NewDistTable_7_2_5,NewDistTable_36_3_33,DistStation_6,NewDistTable_38_1_37,NewDistTable_9_3_6,NewDistTable_22_3_19,NewDistTable_18_2_16,NewDistTable_3_1_2,NewDistTable_10_4_6,NewDistTable_15_1_14,NewDistTable_31_3_28,NewDistTable_4_3_1,NewDistTable_27_2_25,NewDistTable_23_3_20,DistStation_20,NewDistTable_36_4_32,NewDistTable_35_3_32,NewDistTable_12_5_7,NewDistTable_14_2_12,NewDistTable_14_3_11,NewDistTable_26_1_25,NewDistTable_16_1_15,NewDistTable_20_1_19,NewDistTable_30_3_27,NewDistTable_25_2_23,DistStation_9,NewDistTable_35_1_34,DistStation_10,DistStation_21,StopTable_5_15,NewDistTable_37_2_35,NewDistTable_29_2_27,NewDistTable_16_5_11,NewDistTable_36_2_34,NewDistTable_37_4_33,NewDistTable_8_4_4,NewDistTable_8_3_5,DistStation_33,DistStation_39,NewDistTable_25_4_21,DistStation_38,NewDistTable_33_2_31,StopTable_4_10,NewDistTable_39_2_37,NewDistTable_5_3_2,NewDistTable_35_2_33,NewDistTable_2_2_0,DistStation_7,NewDistTable_23_2_21,NewDistTable_9_1_8,NewDistTable_26_3_23,NewDistTable_19_2_17,DistStation_36,NewDistTable_11_3_8,NewDistTable_22_1_21,NewDistTable_15_4_11,DistStation_13,NewDistTable_21_1_20,NewDistTable_36_1_35,NewDistTable_10_1_9,NewDistTable_9_4_5,NewDistTable_8_2_6,NewDistTable_31_5_26,DistStation_18,NewDistTable_29_1_28,NewDistTable_31_4_27,NewDistTable_13_3_10,NewDistTable_39_1_38,NewDistTable_28_3_25,NewDistTable_11_4_7,NewDistTable_5_1_4,NewDistTable_17_5_12,NewDistTable_24_3_21,NewDistTable_32_4_28,NewDistTable_29_5_24,NewDistTable_31_1_30,NewDistTable_18_4_14,DistStation_30,NewDistTable_27_5_22,NewDistTable_21_3_18,NewDistTable_18_5_13,NewDistTable_22_5_17,DistStation_34,NewDistTable_18_1_17,NewDistTable_20_4_16,NewDistTable_26_5_21,NewDistTable_26_4_22,NewDistTable_10_2_8,NewDistTable_28_4_24,NewDistTable_19_1_18,NewDistTable_17_1_16,NewDistTable_34_5_29,NewDistTable_8_1_7,NewDistTable_38_3_35,DistStation_12,NewDistTable_30_2_28,NewDistTable_21_2_19,NewDistTable_12_2_10,NewDistTable_7_1_6,NewDistTable_13_5_8,NewDistTable_25_3_22,DistStation_27,NewDistTable_37_3_34,NewDistTable_14_1_13,NewDistTable_40_2_38,NewDistTable_15_3_12,NewDistTable_31_2_29,NewDistTable_32_1_31,NewDistTable_32_5_27,NewDistTable_24_5_19,NewDistTable_22_2_20,NewDistTable_25_1_24,NewDistTable_15_5_10,NewDistTable_33_4_29,NewDistTable_11_5_6,NewDistTable_17_4_13,StopTable_1_1,NewDistTable_34_4_30,NewDistTable_17_2_15,NewDistTable_39_3_36,NewDistTable_7_3_4,NewDistTable_26_2_24,NewDistTable_19_5_14,NewDistTable_24_4_20,NewDistTable_6_1_5,NewDistTable_34_1_33,NewDistTable_30_4_26,NewDistTable_29_3_26,NewDistTable_5_2_3,NewDistTable_27_4_23,DistStation_14,NewDistTable_14_5_9,NewDistTable_33_3_30,DistStation_35,DistStation_17,NewDistTable_6_2_4,NewDistTable_12_3_9,NewDistTable_3_2_1,NewDistTable_20_2_18,NewDistTable_24_2_22,NewDistTable_12_4_8,NewDistTable_29_4_25,NewDistTable_18_3_15,DistStation_31,NewDistTable_30_1_29,DistStation_25,NewDistTable_21_5_16,DistStation_24,DistStation_15,DistStation_19,NewDistTable_38_2_36,NewDistTable_13_2_11,NewDistTable_12_1_11,NewDistTable_16_4_12,NewDistTable_23_4_19,NewDistTable_9_2_7,NewDistTable_13_1_12,StopTable_3_6,NewDistTable_17_3_14,NewDistTable_34_2_32,
May 25, 2018 10:39:23 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 210 constant variables :NewDistTable_40_1_39=1, NewDistTable_37_1_36=1, DistStation_8=1, NewDistTable_34_3_31=1, NewDistTable_16_2_14=1, NewDistTable_28_5_23=1, DistStation_11=1, NewDistTable_15_2_13=1, DistStation_32=1, NewDistTable_20_3_17=1, DistStation_22=1, NewDistTable_13_4_9=1, NewDistTable_32_2_30=1, DistStation_40=1, NewDistTable_19_4_15=1, NewDistTable_4_1_3=1, NewDistTable_16_3_13=1, NewDistTable_28_2_26=1, NewDistTable_10_3_7=1, DistStation_37=1, NewDistTable_33_5_28=1, NewDistTable_33_1_32=1, NewDistTable_23_5_18=1, DistStation_26=1, NewDistTable_4_2_2=1, NewDistTable_6_3_3=1, NewDistTable_21_4_17=1, NewDistTable_28_1_27=1, DistStation_28=1, NewDistTable_20_5_15=1, NewDistTable_25_5_20=1, NewDistTable_11_1_10=1, NewDistTable_24_1_23=1, NewDistTable_14_4_10=1, NewDistTable_32_3_29=1, DistStation_5=1, NewDistTable_23_1_22=1, NewDistTable_35_4_31=1, NewDistTable_7_4_3=1, NewDistTable_27_3_24=1, DistStation_29=1, NewDistTable_2_1_1=1, NewDistTable_30_5_25=1, NewDistTable_27_1_26=1, NewDistTable_11_2_9=1, StopTable_2_3=1, DistStation_16=1, NewDistTable_22_4_18=1, NewDistTable_19_3_16=1, DistStation_23=1, NewDistTable_7_2_5=1, NewDistTable_36_3_33=1, DistStation_6=1, NewDistTable_38_1_37=1, NewDistTable_9_3_6=1, NewDistTable_22_3_19=1, NewDistTable_18_2_16=1, NewDistTable_3_1_2=1, NewDistTable_10_4_6=1, NewDistTable_15_1_14=1, NewDistTable_31_3_28=1, NewDistTable_4_3_1=1, NewDistTable_27_2_25=1, NewDistTable_23_3_20=1, DistStation_20=1, NewDistTable_36_4_32=1, NewDistTable_35_3_32=1, NewDistTable_12_5_7=1, NewDistTable_14_2_12=1, NewDistTable_14_3_11=1, NewDistTable_26_1_25=1, NewDistTable_16_1_15=1, NewDistTable_20_1_19=1, NewDistTable_30_3_27=1, NewDistTable_25_2_23=1, DistStation_9=1, NewDistTable_35_1_34=1, DistStation_10=1, DistStation_21=1, StopTable_5_15=1, NewDistTable_37_2_35=1, NewDistTable_29_2_27=1, NewDistTable_16_5_11=1, NewDistTable_36_2_34=1, NewDistTable_37_4_33=1, NewDistTable_8_4_4=1, NewDistTable_8_3_5=1, DistStation_33=1, DistStation_39=1, NewDistTable_25_4_21=1, DistStation_38=1, NewDistTable_33_2_31=1, StopTable_4_10=1, NewDistTable_39_2_37=1, NewDistTable_5_3_2=1, NewDistTable_35_2_33=1, NewDistTable_2_2_0=1, DistStation_7=1, NewDistTable_23_2_21=1, NewDistTable_9_1_8=1, NewDistTable_26_3_23=1, NewDistTable_19_2_17=1, DistStation_36=1, NewDistTable_11_3_8=1, NewDistTable_22_1_21=1, NewDistTable_15_4_11=1, DistStation_13=1, NewDistTable_21_1_20=1, NewDistTable_36_1_35=1, NewDistTable_10_1_9=1, NewDistTable_9_4_5=1, NewDistTable_8_2_6=1, NewDistTable_31_5_26=1, DistStation_18=1, NewDistTable_29_1_28=1, NewDistTable_31_4_27=1, NewDistTable_13_3_10=1, NewDistTable_39_1_38=1, NewDistTable_28_3_25=1, NewDistTable_11_4_7=1, NewDistTable_5_1_4=1, NewDistTable_17_5_12=1, NewDistTable_24_3_21=1, NewDistTable_32_4_28=1, NewDistTable_29_5_24=1, NewDistTable_31_1_30=1, NewDistTable_18_4_14=1, DistStation_30=1, NewDistTable_27_5_22=1, NewDistTable_21_3_18=1, NewDistTable_18_5_13=1, NewDistTable_22_5_17=1, DistStation_34=1, NewDistTable_18_1_17=1, NewDistTable_20_4_16=1, NewDistTable_26_5_21=1, NewDistTable_26_4_22=1, NewDistTable_10_2_8=1, NewDistTable_28_4_24=1, NewDistTable_19_1_18=1, NewDistTable_17_1_16=1, NewDistTable_34_5_29=1, NewDistTable_8_1_7=1, NewDistTable_38_3_35=1, DistStation_12=1, NewDistTable_30_2_28=1, NewDistTable_21_2_19=1, NewDistTable_12_2_10=1, NewDistTable_7_1_6=1, NewDistTable_13_5_8=1, NewDistTable_25_3_22=1, DistStation_27=1, NewDistTable_37_3_34=1, NewDistTable_14_1_13=1, NewDistTable_40_2_38=1, NewDistTable_15_3_12=1, NewDistTable_31_2_29=1, NewDistTable_32_1_31=1, NewDistTable_32_5_27=1, NewDistTable_24_5_19=1, NewDistTable_22_2_20=1, NewDistTable_25_1_24=1, NewDistTable_15_5_10=1, NewDistTable_33_4_29=1, NewDistTable_11_5_6=1, NewDistTable_17_4_13=1, StopTable_1_1=1, NewDistTable_34_4_30=1, NewDistTable_17_2_15=1, NewDistTable_39_3_36=1, NewDistTable_7_3_4=1, NewDistTable_26_2_24=1, NewDistTable_19_5_14=1, NewDistTable_24_4_20=1, NewDistTable_6_1_5=1, NewDistTable_34_1_33=1, NewDistTable_30_4_26=1, NewDistTable_29_3_26=1, NewDistTable_5_2_3=1, NewDistTable_27_4_23=1, DistStation_14=1, NewDistTable_14_5_9=1, NewDistTable_33_3_30=1, DistStation_35=1, DistStation_17=1, NewDistTable_6_2_4=1, NewDistTable_12_3_9=1, NewDistTable_3_2_1=1, NewDistTable_20_2_18=1, NewDistTable_24_2_22=1, NewDistTable_12_4_8=1, NewDistTable_29_4_25=1, NewDistTable_18_3_15=1, DistStation_31=1, NewDistTable_30_1_29=1, DistStation_25=1, NewDistTable_21_5_16=1, DistStation_24=1, DistStation_15=1, DistStation_19=1, NewDistTable_38_2_36=1, NewDistTable_13_2_11=1, NewDistTable_12_1_11=1, NewDistTable_16_4_12=1, NewDistTable_23_4_19=1, NewDistTable_9_2_7=1, NewDistTable_13_1_12=1, StopTable_3_6=1, NewDistTable_17_3_14=1, NewDistTable_34_2_32=1
May 25, 2018 10:39:23 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 24320 expressions due to constant valuations.
May 25, 2018 10:39:23 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 3044 ms
May 25, 2018 10:39:23 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 137 ms
May 25, 2018 10:39:24 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 8080 transitions.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-040"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-040.tgz
mv BART-PT-040 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is BART-PT-040, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r033-ebro-152646310900097"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;