fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r033-ebro-152646310800041
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for BART-COL-040

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.280 59978.00 92360.00 192.60 F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 372K
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.3K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 103 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 341 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_pt
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 5 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 207K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is BART-COL-040, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r033-ebro-152646310800041
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-COL-040-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527278421887

20:00:25.625 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
20:00:25.629 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Flatten gal took : 37422 ms
Constant places removed 3960 places and 4240 transitions.
Performed 2640 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 6600 rules applied. Total rules applied 6600 place count 5880 transition count 6040
Constant places removed 3040 places and 400 transitions.
Performed 160 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 3200 rules applied. Total rules applied 9800 place count 2840 transition count 5480
Constant places removed 160 places and 0 transitions.
Iterating post reduction 2 with 160 rules applied. Total rules applied 9960 place count 2680 transition count 5480
Symmetric choice reduction at 3 with 240 rule applications. Total rules 10200 place count 2680 transition count 5480
Constant places removed 240 places and 240 transitions.
Reduce isomorphic transitions removed 40 transitions.
Performed 40 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 320 rules applied. Total rules applied 10520 place count 2440 transition count 5160
Constant places removed 40 places and 0 transitions.
Iterating post reduction 4 with 40 rules applied. Total rules applied 10560 place count 2400 transition count 5160
Symmetric choice reduction at 5 with 160 rule applications. Total rules 10720 place count 2400 transition count 5160
Constant places removed 160 places and 160 transitions.
Performed 40 Post agglomeration using F-continuation condition.
Iterating post reduction 5 with 200 rules applied. Total rules applied 10920 place count 2240 transition count 4960
Constant places removed 40 places and 0 transitions.
Iterating post reduction 6 with 40 rules applied. Total rules applied 10960 place count 2200 transition count 4960
Symmetric choice reduction at 7 with 120 rule applications. Total rules 11080 place count 2200 transition count 4960
Constant places removed 120 places and 120 transitions.
Iterating post reduction 7 with 120 rules applied. Total rules applied 11200 place count 2080 transition count 4840
Symmetric choice reduction at 8 with 120 rule applications. Total rules 11320 place count 2080 transition count 4840
Constant places removed 120 places and 120 transitions.
Iterating post reduction 8 with 120 rules applied. Total rules applied 11440 place count 1960 transition count 4720
Symmetric choice reduction at 9 with 80 rule applications. Total rules 11520 place count 1960 transition count 4720
Constant places removed 80 places and 80 transitions.
Iterating post reduction 9 with 80 rules applied. Total rules applied 11600 place count 1880 transition count 4640
Symmetric choice reduction at 10 with 80 rule applications. Total rules 11680 place count 1880 transition count 4640
Constant places removed 80 places and 80 transitions.
Iterating post reduction 10 with 80 rules applied. Total rules applied 11760 place count 1800 transition count 4560
Symmetric choice reduction at 11 with 80 rule applications. Total rules 11840 place count 1800 transition count 4560
Constant places removed 80 places and 80 transitions.
Iterating post reduction 11 with 80 rules applied. Total rules applied 11920 place count 1720 transition count 4480
Symmetric choice reduction at 12 with 40 rule applications. Total rules 11960 place count 1720 transition count 4480
Constant places removed 40 places and 40 transitions.
Iterating post reduction 12 with 40 rules applied. Total rules applied 12000 place count 1680 transition count 4440
Performed 320 Post agglomeration using F-continuation condition.
Constant places removed 320 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 13 with 480 rules applied. Total rules applied 12480 place count 1360 transition count 3960
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 14 with 240 rules applied. Total rules applied 12720 place count 1280 transition count 3720
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 15 with 240 rules applied. Total rules applied 12960 place count 1200 transition count 3480
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 16 with 240 rules applied. Total rules applied 13200 place count 1120 transition count 3240
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 17 with 240 rules applied. Total rules applied 13440 place count 1040 transition count 3000
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 18 with 240 rules applied. Total rules applied 13680 place count 960 transition count 2760
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 19 with 240 rules applied. Total rules applied 13920 place count 880 transition count 2520
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 20 with 240 rules applied. Total rules applied 14160 place count 800 transition count 2280
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 21 with 240 rules applied. Total rules applied 14400 place count 720 transition count 2040
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 22 with 240 rules applied. Total rules applied 14640 place count 640 transition count 1800
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 23 with 240 rules applied. Total rules applied 14880 place count 560 transition count 1560
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 24 with 240 rules applied. Total rules applied 15120 place count 480 transition count 1320
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 25 with 240 rules applied. Total rules applied 15360 place count 400 transition count 1080
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 26 with 240 rules applied. Total rules applied 15600 place count 320 transition count 840
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 27 with 240 rules applied. Total rules applied 15840 place count 240 transition count 600
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Iterating post reduction 28 with 240 rules applied. Total rules applied 16080 place count 160 transition count 360
Performed 80 Post agglomeration using F-continuation condition.
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 160 transitions.
Performed 40 Post agglomeration using F-continuation condition.
Iterating post reduction 29 with 280 rules applied. Total rules applied 16360 place count 80 transition count 80
Constant places removed 80 places and 0 transitions.
Reduce isomorphic transitions removed 79 transitions.
FORMULA BART-COL-040-ReachabilityDeadlock-0 FALSE TECHNIQUES TOPOLOGICAL STRUCTURAL_REDUCTION

BK_STOP 1527278481865

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 8:00:24 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 8:00:24 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 8:00:25 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 25, 2018 8:00:26 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1546 ms
May 25, 2018 8:00:26 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 4 places.
May 25, 2018 8:00:26 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 25, 2018 8:00:26 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :speedXdist->StopTable,
distXspeedXdist->NewDistTable,
traincontext->TrainState,
distance->DistStation,

May 25, 2018 8:00:26 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 7 transitions.
May 25, 2018 8:00:26 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 25, 2018 8:00:26 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 41 ms
May 25, 2018 8:00:27 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 3 fixed domain variables (out of 20213 variables) in GAL type BART_COL_040
May 25, 2018 8:00:27 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 10373 constant array cells/variables (out of 20213 variables) in type BART_COL_040
May 25, 2018 8:00:27 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: DistStation[0-40], StopTable[0-245], NewDistTable[0-10085],
May 25, 2018 8:01:02 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 2.9161862005E10 instantiations of transitions. Total transitions/syncs built is 13162
May 25, 2018 8:01:02 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 3 fixed domain variables (out of 20213 variables) in GAL type BART_COL_040
May 25, 2018 8:01:02 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 11333 constant array cells/variables (out of 20213 variables) in type BART_COL_040
May 25, 2018 8:01:02 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: TrainState[206-209,226-245,452-455,472-491,698-701,718-737,944-947,964-983,1190-1193,1210-1229,1436-1439,1456-1475,1682-1685,1702-1721,1928-1931,1948-1967,2174-2177,2194-2213,2420-2423,2440-2459,2666-2669,2686-2705,2912-2915,2932-2951,3158-3161,3178-3197,3404-3407,3424-3443,3650-3653,3670-3689,3896-3899,3916-3935,4142-4145,4162-4181,4388-4391,4408-4427,4634-4637,4654-4673,4880-4883,4900-4919,5126-5129,5146-5165,5372-5375,5392-5411,5618-5621,5638-5657,5864-5867,5884-5903,6110-6113,6130-6149,6356-6359,6376-6395,6602-6605,6622-6641,6848-6851,6868-6887,7094-7097,7114-7133,7340-7343,7360-7379,7586-7589,7606-7625,7832-7835,7852-7871,8078-8081,8098-8117,8324-8327,8344-8363,8570-8573,8590-8609,8816-8819,8836-8855,9062-9065,9082-9101,9308-9311,9328-9347,9554-9557,9574-9593,9800-9803,9820-9839], DistStation[0-40], StopTable[0-245], NewDistTable[0-10085],
May 25, 2018 8:01:02 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :DistStation[]
May 25, 2018 8:01:02 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :StopTable[]
May 25, 2018 8:01:02 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :NewDistTable[]
May 25, 2018 8:01:03 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 5 redundant transitions.
May 25, 2018 8:01:03 PM fr.lip6.move.gal.instantiate.Simplifier removeUncalledTransitions
INFO: Removed 200 uncalled transitions from type BART_COL_040
May 25, 2018 8:01:03 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 36899 ms
May 25, 2018 8:01:04 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 125 ms
May 25, 2018 8:01:05 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 11516 transitions. Expanding to a total of 12956 deterministic transitions.
May 25, 2018 8:01:05 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 78 ms.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-COL-040"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BART-COL-040.tgz
mv BART-COL-040 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is BART-COL-040, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r033-ebro-152646310800041"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;