Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 180K
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.3K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 7 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 11K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is CircadianClock-PT-001000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r032-ebro-152646310500501
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-00
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-01
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-02
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-03
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-04
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-05
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-06
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-07
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-08
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-09
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-10
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-11
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-12
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-13
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-14
FORMULA_NAME CircadianClock-PT-001000-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1526974219014

Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,4.02004e+15,396.427,2315204,2,5017,5,1.38574e+07,6,0,75,1.50378e+07,0


Converting to forward existential form...Done !
original formula: EF(((((((a>=1)&&(dr>=1))||((da>=1)&&(a>=1)))||((ma>=1)&&(a_cap>=1))) * AG((a>=1))) * EG((((da_a>=1)&&(a_cap>=1))&&((dr>=1)&&(mr_cap>=1))))))
=> equivalent forward existential formula: [FwdG((FwdU(Init,TRUE) * (((((a>=1)&&(dr>=1))||((da>=1)&&(a>=1)))||((ma>=1)&&(a_cap>=1))) * !(E(TRUE U !((a>=1)))))),(((da_a>=1)&&(a_cap>=1))&&((dr>=1)&&(mr_cap>=1))))] != FALSE
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
(forward)formula 0,0,398.624,2315204,1,0,7,1.38574e+07,25,0,10353,1.50378e+07,8
FORMULA CircadianClock-PT-001000-CTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EF(AG((((ma>=1)||((da>=1)&&(ma_cap>=1)))&&((c>=1)&&(r_cap>=1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U !((((ma>=1)||((da>=1)&&(ma_cap>=1)))&&((c>=1)&&(r_cap>=1)))))))] != FALSE
(forward)formula 1,0,405.947,2315204,1,0,8,1.38574e+07,27,0,10365,1.50378e+07,11
FORMULA CircadianClock-PT-001000-CTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EF((!(AG(((dr>=1)&&(mr_cap>=1)))) * AX(((a>=1)&&((dr_a>=1)&&(mr_cap>=1))))))
=> equivalent forward existential formula: [((FwdU(Init,TRUE) * !(!(E(TRUE U !(((dr>=1)&&(mr_cap>=1))))))) * !(EX(!(((a>=1)&&((dr_a>=1)&&(mr_cap>=1)))))))] != FALSE
(forward)formula 2,1,406.192,2315204,1,0,12,1.38574e+07,31,2,10373,1.50378e+07,16
FORMULA CircadianClock-PT-001000-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: ((EF(!(((dr>=1)&&(mr_cap>=1)))) + EG((mr>=1))) + (AX(!((((da_a>=1)&&(a_cap>=1))||(ma>=1)))) + ((((a>=1)&&(dr>=1))&&(((r>=1)||(mr>=1))&&(((a>=1)&&(dr>=1))&&((dr_a>=1)&&(mr_cap>=1))))) + (((((da>=1)&&(a>=1))||((a>=1)&&(dr>=1)))&&((mr>=1)&&(((a>=1)&&(r>=1))&&(c_cap>=1)))) * AG((a>=1))))))
=> equivalent forward existential formula: ([((((Init * !((E(TRUE U !(((dr>=1)&&(mr_cap>=1)))) + EG((mr>=1))))) * !(!(EX(!(!((((da_a>=1)&&(a_cap>=1))||(ma>=1)))))))) * !((((a>=1)&&(dr>=1))&&(((r>=1)||(mr>=1))&&(((a>=1)&&(dr>=1))&&((dr_a>=1)&&(mr_cap>=1))))))) * !(((((da>=1)&&(a>=1))||((a>=1)&&(dr>=1)))&&((mr>=1)&&(((a>=1)&&(r>=1))&&(c_cap>=1))))))] = FALSE * [(FwdU((((Init * !((E(TRUE U !(((dr>=1)&&(mr_cap>=1)))) + EG((mr>=1))))) * !(!(EX(!(!((((da_a>=1)&&(a_cap>=1))||(ma>=1)))))))) * !((((a>=1)&&(dr>=1))&&(((r>=1)||(mr>=1))&&(((a>=1)&&(dr>=1))&&((dr_a>=1)&&(mr_cap>=1))))))),TRUE) * !((a>=1)))] = FALSE)
(forward)formula 3,1,406.419,2315204,1,0,19,1.38574e+07,43,5,10396,1.50378e+07,23
FORMULA CircadianClock-PT-001000-CTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: ((!(((da>=1)&&(ma_cap>=1))) * !(EX(((mr>=1)||(((a>=1)&&(r>=1))&&(c_cap>=1)))))) + (!(EF((((ma>=1)&&(a_cap>=1))&&((mr>=1)&&(r_cap>=1))))) + AX(EX(((dr_a>=1)&&(mr_cap>=1))))))
=> equivalent forward existential formula: [(EY(((Init * !((!(((da>=1)&&(ma_cap>=1))) * !(EX(((mr>=1)||(((a>=1)&&(r>=1))&&(c_cap>=1)))))))) * !(!(E(TRUE U (((ma>=1)&&(a_cap>=1))&&((mr>=1)&&(r_cap>=1)))))))) * !(EX(((dr_a>=1)&&(mr_cap>=1)))))] = FALSE
(forward)formula 4,0,406.785,2315204,1,0,25,1.38574e+07,48,8,10402,1.50378e+07,31
FORMULA CircadianClock-PT-001000-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: !(((dr_a>=1)&&(a_cap>=1)))
=> equivalent forward existential formula: [(Init * !(((dr_a>=1)&&(a_cap>=1))))] != FALSE
(forward)formula 5,1,406.786,2315204,1,0,26,1.38574e+07,50,8,10405,1.50378e+07,32
FORMULA CircadianClock-PT-001000-CTLFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: A(!((a>=1)) U (((dr_a>=1)&&(mr_cap>=1)) + EX((ma>=1))))
=> equivalent forward existential formula: [((Init * !(EG(!((((dr_a>=1)&&(mr_cap>=1)) + EX((ma>=1))))))) * !(E(!((((dr_a>=1)&&(mr_cap>=1)) + EX((ma>=1)))) U (!(!((a>=1))) * !((((dr_a>=1)&&(mr_cap>=1)) + EX((ma>=1))))))))] != FALSE
(forward)formula 6,1,406.939,2315204,1,0,27,1.38574e+07,56,9,10407,1.50378e+07,34
FORMULA CircadianClock-PT-001000-CTLFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: (((a>=1)&&(r>=1))&&(c_cap>=1))
=> equivalent forward existential formula: [(Init * (((a>=1)&&(r>=1))&&(c_cap>=1)))] != FALSE
(forward)formula 7,0,406.94,2315204,1,0,28,1.38574e+07,57,9,10407,1.50378e+07,35
FORMULA CircadianClock-PT-001000-CTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: ((E(((a>=1)&&((dr_a>=1)&&(mr_cap>=1))) U !(((mr>=1)&&(r_cap>=1)))) + (!(((c>=1)&&(r_cap>=1))) * AF((((dr_a>=1)&&(mr_cap>=1))||((ma>=1)&&(a_cap>=1)))))) * A((((dr_a>=1)&&(a_cap>=1))||((a>=1)&&(dr>=1))) U EG((r>=1))))
=> equivalent forward existential formula: (([((Init * !(E(((a>=1)&&((dr_a>=1)&&(mr_cap>=1))) U !(((mr>=1)&&(r_cap>=1)))))) * ((c>=1)&&(r_cap>=1)))] = FALSE * [FwdG((Init * !(E(((a>=1)&&((dr_a>=1)&&(mr_cap>=1))) U !(((mr>=1)&&(r_cap>=1)))))),!((((dr_a>=1)&&(mr_cap>=1))||((ma>=1)&&(a_cap>=1)))))] = FALSE) * ([((FwdU(Init,!(EG((r>=1)))) * !((((dr_a>=1)&&(a_cap>=1))||((a>=1)&&(dr>=1))))) * !(EG((r>=1))))] = FALSE * [FwdG(Init,!(EG((r>=1))))] = FALSE))
(forward)formula 8,0,844.344,2686500,1,0,2465,1.66883e+07,10,2447,6200,2.13897e+07,2382
FORMULA CircadianClock-PT-001000-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: AX(EX(EG(((da>=1)&&(ma_cap>=1)))))
=> equivalent forward existential formula: [(EY(Init) * !(EX(EG(((da>=1)&&(ma_cap>=1))))))] = FALSE
(forward)formula 9,1,844.736,2686500,1,0,2465,1.66883e+07,17,2447,10237,2.13897e+07,2386
FORMULA CircadianClock-PT-001000-CTLFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: ((da_a>=1)&&(a_cap>=1))
=> equivalent forward existential formula: [(Init * ((da_a>=1)&&(a_cap>=1)))] != FALSE
(forward)formula 10,0,844.737,2686500,1,0,2465,1.66883e+07,18,2447,10238,2.13897e+07,2387
FORMULA CircadianClock-PT-001000-CTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: (!(AG((ma>=1))) + EX((((((da_a>=1)&&(ma_cap>=1))&&(mr>=1))&&(((da_a>=1)&&(ma_cap>=1))||(((a>=1)&&(r>=1))&&(c_cap>=1)))) * EG(((da_a>=1)&&(a_cap>=1))))))
=> equivalent forward existential formula: ([(FwdU(Init,TRUE) * !((ma>=1)))] != FALSE + [FwdG((EY(Init) * ((((da_a>=1)&&(ma_cap>=1))&&(mr>=1))&&(((da_a>=1)&&(ma_cap>=1))||(((a>=1)&&(r>=1))&&(c_cap>=1))))),((da_a>=1)&&(a_cap>=1)))] != FALSE)
(forward)formula 11,1,844.77,2686500,1,0,2465,1.66883e+07,20,2447,10239,2.13897e+07,2388
FORMULA CircadianClock-PT-001000-CTLFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: ((mr>=1)&&(r_cap>=1))
=> equivalent forward existential formula: [(Init * ((mr>=1)&&(r_cap>=1)))] != FALSE
(forward)formula 12,0,844.771,2686500,1,0,2465,1.66883e+07,21,2447,10240,2.13897e+07,2389
FORMULA CircadianClock-PT-001000-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: (EF(((c>=1)&&(r_cap>=1))) * (A(!(((dr_a>=1)&&(mr_cap>=1))) U !(((dr_a>=1)&&(a_cap>=1)))) * !(AX(!((ma>=1))))))
=> equivalent forward existential formula: [(EY(((Init * E(TRUE U ((c>=1)&&(r_cap>=1)))) * !((E(!(!(((dr_a>=1)&&(a_cap>=1)))) U (!(!(((dr_a>=1)&&(mr_cap>=1)))) * !(!(((dr_a>=1)&&(a_cap>=1)))))) + EG(!(!(((dr_a>=1)&&(a_cap>=1))))))))) * (ma>=1))] != FALSE
Hit Full ! (commute/partial/dont) 8/6/8
(forward)formula 13,1,845.771,2686500,1,0,2465,1.66883e+07,37,2447,10295,2.13897e+07,2397
FORMULA CircadianClock-PT-001000-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: (!((EX((((da_a>=1)&&(a_cap>=1))||((a>=1)&&(dr>=1)))) * !(AG((a>=1))))) * (EF((a>=1)) * E(((dr>=1)&&(mr_cap>=1)) U (((da_a>=1)&&(a_cap>=1))||((a>=1)&&(dr>=1))))))
=> equivalent forward existential formula: [(FwdU(((Init * !((EX((((da_a>=1)&&(a_cap>=1))||((a>=1)&&(dr>=1)))) * !(!(E(TRUE U !((a>=1)))))))) * E(TRUE U (a>=1))),((dr>=1)&&(mr_cap>=1))) * (((da_a>=1)&&(a_cap>=1))||((a>=1)&&(dr>=1))))] != FALSE
Hit Full ! (commute/partial/dont) 11/4/5
(forward)formula 14,1,1110.22,5009064,1,0,2465,2.66398e+07,47,2447,10329,3.37874e+07,2408
FORMULA CircadianClock-PT-001000-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: (AX(A(((c>=1)&&(r_cap>=1)) U ((da_a>=1)&&(ma_cap>=1)))) * ((ma>=1)&&(a_cap>=1)))
=> equivalent forward existential formula: (([(FwdU(EY(Init),!(((da_a>=1)&&(ma_cap>=1)))) * (!(((c>=1)&&(r_cap>=1))) * !(((da_a>=1)&&(ma_cap>=1)))))] = FALSE * [FwdG(EY(Init),!(((da_a>=1)&&(ma_cap>=1))))] = FALSE) * [(Init * !(((ma>=1)&&(a_cap>=1))))] = FALSE)
(forward)formula 15,0,1110.23,5009064,1,0,2465,2.66398e+07,49,2447,10332,3.37874e+07,2409
FORMULA CircadianClock-PT-001000-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************


BK_STOP 1526975336339

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 22, 2018 7:30:22 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 22, 2018 7:30:22 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 22, 2018 7:30:23 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 46 ms
May 22, 2018 7:30:23 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 14 places.
May 22, 2018 7:30:23 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 16 transitions.
May 22, 2018 7:30:23 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 17 ms
May 22, 2018 7:30:23 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 96 ms
May 22, 2018 7:30:23 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 19 ms
May 22, 2018 7:30:23 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 12 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircadianClock-PT-001000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/CircadianClock-PT-001000.tgz
mv CircadianClock-PT-001000 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is CircadianClock-PT-001000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r032-ebro-152646310500501"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;