Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 3.9M
-rw-r--r-- 1 mcc users 211K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 531K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 84K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 221K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 61K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 149K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 34K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 87K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 260K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 646K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 102 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 340 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 69K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 184K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 34K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 66K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 1.2M May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is BART-PT-005, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r032-ebro-152646309900069
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-PT-005-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1526857444616

Flatten gal took : 734 ms
Performed 325 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 325 rules applied. Total rules applied 325 place count 660 transition count 685
Constant places removed 325 places and 0 transitions.
Iterating post reduction 1 with 325 rules applied. Total rules applied 650 place count 335 transition count 685
Symmetric choice reduction at 2 with 30 rule applications. Total rules 680 place count 335 transition count 685
Constant places removed 30 places and 30 transitions.
Reduce isomorphic transitions removed 5 transitions.
Performed 5 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 40 rules applied. Total rules applied 720 place count 305 transition count 645
Constant places removed 5 places and 0 transitions.
Iterating post reduction 3 with 5 rules applied. Total rules applied 725 place count 300 transition count 645
Symmetric choice reduction at 4 with 20 rule applications. Total rules 745 place count 300 transition count 645
Constant places removed 20 places and 20 transitions.
Performed 5 Post agglomeration using F-continuation condition.
Iterating post reduction 4 with 25 rules applied. Total rules applied 770 place count 280 transition count 620
Constant places removed 5 places and 0 transitions.
Iterating post reduction 5 with 5 rules applied. Total rules applied 775 place count 275 transition count 620
Symmetric choice reduction at 6 with 15 rule applications. Total rules 790 place count 275 transition count 620
Constant places removed 15 places and 15 transitions.
Iterating post reduction 6 with 15 rules applied. Total rules applied 805 place count 260 transition count 605
Symmetric choice reduction at 7 with 15 rule applications. Total rules 820 place count 260 transition count 605
Constant places removed 15 places and 15 transitions.
Iterating post reduction 7 with 15 rules applied. Total rules applied 835 place count 245 transition count 590
Symmetric choice reduction at 8 with 10 rule applications. Total rules 845 place count 245 transition count 590
Constant places removed 10 places and 10 transitions.
Iterating post reduction 8 with 10 rules applied. Total rules applied 855 place count 235 transition count 580
Symmetric choice reduction at 9 with 10 rule applications. Total rules 865 place count 235 transition count 580
Constant places removed 10 places and 10 transitions.
Iterating post reduction 9 with 10 rules applied. Total rules applied 875 place count 225 transition count 570
Symmetric choice reduction at 10 with 10 rule applications. Total rules 885 place count 225 transition count 570
Constant places removed 10 places and 10 transitions.
Iterating post reduction 10 with 10 rules applied. Total rules applied 895 place count 215 transition count 560
Symmetric choice reduction at 11 with 5 rule applications. Total rules 900 place count 215 transition count 560
Constant places removed 5 places and 5 transitions.
Iterating post reduction 11 with 5 rules applied. Total rules applied 905 place count 210 transition count 555
Performed 40 Post agglomeration using F-continuation condition.
Constant places removed 40 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 12 with 60 rules applied. Total rules applied 965 place count 170 transition count 495
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 13 with 30 rules applied. Total rules applied 995 place count 160 transition count 465
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 14 with 30 rules applied. Total rules applied 1025 place count 150 transition count 435
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 15 with 30 rules applied. Total rules applied 1055 place count 140 transition count 405
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 16 with 30 rules applied. Total rules applied 1085 place count 130 transition count 375
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 17 with 30 rules applied. Total rules applied 1115 place count 120 transition count 345
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 18 with 30 rules applied. Total rules applied 1145 place count 110 transition count 315
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 19 with 30 rules applied. Total rules applied 1175 place count 100 transition count 285
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 20 with 30 rules applied. Total rules applied 1205 place count 90 transition count 255
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 21 with 30 rules applied. Total rules applied 1235 place count 80 transition count 225
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 22 with 30 rules applied. Total rules applied 1265 place count 70 transition count 195
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 23 with 30 rules applied. Total rules applied 1295 place count 60 transition count 165
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 24 with 30 rules applied. Total rules applied 1325 place count 50 transition count 135
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 25 with 30 rules applied. Total rules applied 1355 place count 40 transition count 105
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 26 with 30 rules applied. Total rules applied 1385 place count 30 transition count 75
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 27 with 30 rules applied. Total rules applied 1415 place count 20 transition count 45
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 20 transitions.
Performed 5 Post agglomeration using F-continuation condition.
Iterating post reduction 28 with 35 rules applied. Total rules applied 1450 place count 10 transition count 10
Constant places removed 10 places and 0 transitions.
Reduce isomorphic transitions removed 9 transitions.
FORMULA BART-PT-005-ReachabilityDeadlock-0 FALSE TECHNIQUES TOPOLOGICAL STRUCTURAL_REDUCTION

BK_STOP 1526857450329

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 20, 2018 11:04:07 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 20, 2018 11:04:07 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 20, 2018 11:04:08 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 320 ms
May 20, 2018 11:04:08 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 870 places.
May 20, 2018 11:04:08 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1010 transitions.
May 20, 2018 11:04:09 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 210 fixed domain variables (out of 870 variables) in GAL type BART_PT_005
May 20, 2018 11:04:09 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 210 constant array cells/variables (out of 870 variables) in type BART_PT_005
May 20, 2018 11:04:09 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: DistStation_37,NewDistTable_22_4_18,NewDistTable_13_2_11,NewDistTable_7_3_4,DistStation_33,NewDistTable_26_5_21,DistStation_30,NewDistTable_3_2_1,NewDistTable_13_1_12,NewDistTable_23_3_20,NewDistTable_26_4_22,NewDistTable_39_1_38,NewDistTable_20_3_17,NewDistTable_36_3_33,NewDistTable_17_2_15,NewDistTable_4_1_3,NewDistTable_12_5_7,NewDistTable_29_5_24,NewDistTable_9_1_8,NewDistTable_30_2_28,NewDistTable_21_2_19,NewDistTable_33_1_32,NewDistTable_18_4_14,NewDistTable_21_5_16,DistStation_32,NewDistTable_6_1_5,NewDistTable_15_4_11,NewDistTable_17_1_16,NewDistTable_15_1_14,NewDistTable_4_3_1,NewDistTable_24_3_21,NewDistTable_35_1_34,NewDistTable_28_1_27,NewDistTable_36_2_34,NewDistTable_26_3_23,NewDistTable_19_2_17,NewDistTable_8_4_4,NewDistTable_27_5_22,DistStation_39,NewDistTable_26_2_24,NewDistTable_23_5_18,NewDistTable_16_5_11,NewDistTable_29_2_27,NewDistTable_30_4_26,NewDistTable_40_2_38,NewDistTable_31_5_26,NewDistTable_25_4_21,NewDistTable_15_5_10,NewDistTable_32_3_29,NewDistTable_38_3_35,DistStation_23,NewDistTable_26_1_25,NewDistTable_29_3_26,DistStation_10,NewDistTable_22_3_19,NewDistTable_33_5_28,DistStation_34,NewDistTable_39_2_37,NewDistTable_14_2_12,NewDistTable_16_3_13,NewDistTable_11_3_8,NewDistTable_34_2_32,NewDistTable_4_2_2,DistStation_20,NewDistTable_24_4_20,NewDistTable_8_3_5,NewDistTable_34_4_30,NewDistTable_19_1_18,NewDistTable_22_2_20,NewDistTable_30_3_27,DistStation_16,NewDistTable_18_5_13,NewDistTable_35_2_33,DistStation_11,NewDistTable_11_5_6,DistStation_7,NewDistTable_20_5_15,NewDistTable_25_2_23,StopTable_4_10,NewDistTable_39_3_36,NewDistTable_22_1_21,NewDistTable_32_5_27,NewDistTable_11_2_9,NewDistTable_6_3_3,NewDistTable_9_3_6,DistStation_40,NewDistTable_19_5_14,StopTable_2_3,NewDistTable_35_3_32,NewDistTable_17_5_12,NewDistTable_7_1_6,NewDistTable_7_2_5,DistStation_12,DistStation_29,NewDistTable_16_2_14,DistStation_22,NewDistTable_25_1_24,NewDistTable_29_1_28,NewDistTable_11_1_10,NewDistTable_20_1_19,DistStation_14,NewDistTable_14_4_10,DistStation_6,NewDistTable_5_1_4,NewDistTable_37_4_33,NewDistTable_28_3_25,NewDistTable_31_3_28,DistStation_8,DistStation_5,NewDistTable_23_4_19,NewDistTable_13_5_8,NewDistTable_24_2_22,NewDistTable_15_2_13,NewDistTable_16_4_12,NewDistTable_31_4_27,NewDistTable_23_2_21,NewDistTable_28_5_23,NewDistTable_12_3_9,DistStation_38,DistStation_15,NewDistTable_37_3_34,NewDistTable_9_4_5,DistStation_9,NewDistTable_10_2_8,NewDistTable_20_2_18,NewDistTable_20_4_16,NewDistTable_11_4_7,NewDistTable_40_1_39,NewDistTable_38_2_36,NewDistTable_14_1_13,DistStation_17,NewDistTable_8_1_7,DistStation_19,NewDistTable_30_5_25,NewDistTable_30_1_29,DistStation_27,StopTable_1_1,NewDistTable_10_3_7,NewDistTable_12_2_10,DistStation_26,DistStation_28,NewDistTable_17_4_13,NewDistTable_33_3_30,DistStation_36,NewDistTable_31_2_29,NewDistTable_27_2_25,NewDistTable_27_1_26,NewDistTable_32_2_30,DistStation_25,DistStation_31,NewDistTable_15_3_12,NewDistTable_35_4_31,NewDistTable_33_4_29,NewDistTable_13_4_9,NewDistTable_27_3_24,NewDistTable_34_1_33,NewDistTable_2_2_0,NewDistTable_34_5_29,NewDistTable_9_2_7,DistStation_35,NewDistTable_7_4_3,StopTable_3_6,NewDistTable_21_3_18,NewDistTable_13_3_10,NewDistTable_16_1_15,NewDistTable_37_1_36,NewDistTable_19_3_16,NewDistTable_12_1_11,NewDistTable_36_4_32,NewDistTable_21_4_17,NewDistTable_10_1_9,NewDistTable_2_1_1,NewDistTable_5_3_2,NewDistTable_19_4_15,DistStation_24,NewDistTable_23_1_22,DistStation_13,NewDistTable_36_1_35,NewDistTable_32_1_31,NewDistTable_8_2_6,NewDistTable_14_3_11,NewDistTable_32_4_28,NewDistTable_18_3_15,NewDistTable_31_1_30,NewDistTable_22_5_17,NewDistTable_21_1_20,NewDistTable_14_5_9,StopTable_5_15,DistStation_21,NewDistTable_5_2_3,NewDistTable_6_2_4,NewDistTable_3_1_2,NewDistTable_25_3_22,NewDistTable_27_4_23,NewDistTable_18_1_17,NewDistTable_18_2_16,NewDistTable_28_4_24,NewDistTable_28_2_26,NewDistTable_24_1_23,NewDistTable_17_3_14,NewDistTable_10_4_6,NewDistTable_24_5_19,NewDistTable_37_2_35,DistStation_18,NewDistTable_38_1_37,NewDistTable_25_5_20,NewDistTable_33_2_31,NewDistTable_29_4_25,NewDistTable_12_4_8,NewDistTable_34_3_31,
May 20, 2018 11:04:09 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 210 constant variables :DistStation_37=1, NewDistTable_22_4_18=1, NewDistTable_13_2_11=1, NewDistTable_7_3_4=1, DistStation_33=1, NewDistTable_26_5_21=1, DistStation_30=1, NewDistTable_3_2_1=1, NewDistTable_13_1_12=1, NewDistTable_23_3_20=1, NewDistTable_26_4_22=1, NewDistTable_39_1_38=1, NewDistTable_20_3_17=1, NewDistTable_36_3_33=1, NewDistTable_17_2_15=1, NewDistTable_4_1_3=1, NewDistTable_12_5_7=1, NewDistTable_29_5_24=1, NewDistTable_9_1_8=1, NewDistTable_30_2_28=1, NewDistTable_21_2_19=1, NewDistTable_33_1_32=1, NewDistTable_18_4_14=1, NewDistTable_21_5_16=1, DistStation_32=1, NewDistTable_6_1_5=1, NewDistTable_15_4_11=1, NewDistTable_17_1_16=1, NewDistTable_15_1_14=1, NewDistTable_4_3_1=1, NewDistTable_24_3_21=1, NewDistTable_35_1_34=1, NewDistTable_28_1_27=1, NewDistTable_36_2_34=1, NewDistTable_26_3_23=1, NewDistTable_19_2_17=1, NewDistTable_8_4_4=1, NewDistTable_27_5_22=1, DistStation_39=1, NewDistTable_26_2_24=1, NewDistTable_23_5_18=1, NewDistTable_16_5_11=1, NewDistTable_29_2_27=1, NewDistTable_30_4_26=1, NewDistTable_40_2_38=1, NewDistTable_31_5_26=1, NewDistTable_25_4_21=1, NewDistTable_15_5_10=1, NewDistTable_32_3_29=1, NewDistTable_38_3_35=1, DistStation_23=1, NewDistTable_26_1_25=1, NewDistTable_29_3_26=1, DistStation_10=1, NewDistTable_22_3_19=1, NewDistTable_33_5_28=1, DistStation_34=1, NewDistTable_39_2_37=1, NewDistTable_14_2_12=1, NewDistTable_16_3_13=1, NewDistTable_11_3_8=1, NewDistTable_34_2_32=1, NewDistTable_4_2_2=1, DistStation_20=1, NewDistTable_24_4_20=1, NewDistTable_8_3_5=1, NewDistTable_34_4_30=1, NewDistTable_19_1_18=1, NewDistTable_22_2_20=1, NewDistTable_30_3_27=1, DistStation_16=1, NewDistTable_18_5_13=1, NewDistTable_35_2_33=1, DistStation_11=1, NewDistTable_11_5_6=1, DistStation_7=1, NewDistTable_20_5_15=1, NewDistTable_25_2_23=1, StopTable_4_10=1, NewDistTable_39_3_36=1, NewDistTable_22_1_21=1, NewDistTable_32_5_27=1, NewDistTable_11_2_9=1, NewDistTable_6_3_3=1, NewDistTable_9_3_6=1, DistStation_40=1, NewDistTable_19_5_14=1, StopTable_2_3=1, NewDistTable_35_3_32=1, NewDistTable_17_5_12=1, NewDistTable_7_1_6=1, NewDistTable_7_2_5=1, DistStation_12=1, DistStation_29=1, NewDistTable_16_2_14=1, DistStation_22=1, NewDistTable_25_1_24=1, NewDistTable_29_1_28=1, NewDistTable_11_1_10=1, NewDistTable_20_1_19=1, DistStation_14=1, NewDistTable_14_4_10=1, DistStation_6=1, NewDistTable_5_1_4=1, NewDistTable_37_4_33=1, NewDistTable_28_3_25=1, NewDistTable_31_3_28=1, DistStation_8=1, DistStation_5=1, NewDistTable_23_4_19=1, NewDistTable_13_5_8=1, NewDistTable_24_2_22=1, NewDistTable_15_2_13=1, NewDistTable_16_4_12=1, NewDistTable_31_4_27=1, NewDistTable_23_2_21=1, NewDistTable_28_5_23=1, NewDistTable_12_3_9=1, DistStation_38=1, DistStation_15=1, NewDistTable_37_3_34=1, NewDistTable_9_4_5=1, DistStation_9=1, NewDistTable_10_2_8=1, NewDistTable_20_2_18=1, NewDistTable_20_4_16=1, NewDistTable_11_4_7=1, NewDistTable_40_1_39=1, NewDistTable_38_2_36=1, NewDistTable_14_1_13=1, DistStation_17=1, NewDistTable_8_1_7=1, DistStation_19=1, NewDistTable_30_5_25=1, NewDistTable_30_1_29=1, DistStation_27=1, StopTable_1_1=1, NewDistTable_10_3_7=1, NewDistTable_12_2_10=1, DistStation_26=1, DistStation_28=1, NewDistTable_17_4_13=1, NewDistTable_33_3_30=1, DistStation_36=1, NewDistTable_31_2_29=1, NewDistTable_27_2_25=1, NewDistTable_27_1_26=1, NewDistTable_32_2_30=1, DistStation_25=1, DistStation_31=1, NewDistTable_15_3_12=1, NewDistTable_35_4_31=1, NewDistTable_33_4_29=1, NewDistTable_13_4_9=1, NewDistTable_27_3_24=1, NewDistTable_34_1_33=1, NewDistTable_2_2_0=1, NewDistTable_34_5_29=1, NewDistTable_9_2_7=1, DistStation_35=1, NewDistTable_7_4_3=1, StopTable_3_6=1, NewDistTable_21_3_18=1, NewDistTable_13_3_10=1, NewDistTable_16_1_15=1, NewDistTable_37_1_36=1, NewDistTable_19_3_16=1, NewDistTable_12_1_11=1, NewDistTable_36_4_32=1, NewDistTable_21_4_17=1, NewDistTable_10_1_9=1, NewDistTable_2_1_1=1, NewDistTable_5_3_2=1, NewDistTable_19_4_15=1, DistStation_24=1, NewDistTable_23_1_22=1, DistStation_13=1, NewDistTable_36_1_35=1, NewDistTable_32_1_31=1, NewDistTable_8_2_6=1, NewDistTable_14_3_11=1, NewDistTable_32_4_28=1, NewDistTable_18_3_15=1, NewDistTable_31_1_30=1, NewDistTable_22_5_17=1, NewDistTable_21_1_20=1, NewDistTable_14_5_9=1, StopTable_5_15=1, DistStation_21=1, NewDistTable_5_2_3=1, NewDistTable_6_2_4=1, NewDistTable_3_1_2=1, NewDistTable_25_3_22=1, NewDistTable_27_4_23=1, NewDistTable_18_1_17=1, NewDistTable_18_2_16=1, NewDistTable_28_4_24=1, NewDistTable_28_2_26=1, NewDistTable_24_1_23=1, NewDistTable_17_3_14=1, NewDistTable_10_4_6=1, NewDistTable_24_5_19=1, NewDistTable_37_2_35=1, DistStation_18=1, NewDistTable_38_1_37=1, NewDistTable_25_5_20=1, NewDistTable_33_2_31=1, NewDistTable_29_4_25=1, NewDistTable_12_4_8=1, NewDistTable_34_3_31=1
May 20, 2018 11:04:09 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 3040 expressions due to constant valuations.
May 20, 2018 11:04:09 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 727 ms
May 20, 2018 11:04:09 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 61 ms
May 20, 2018 11:04:09 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1010 transitions.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-005"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-005.tgz
mv BART-PT-005 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is BART-PT-005, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r032-ebro-152646309900069"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;