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Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r032-ebro-152646309900068
Last Updated
June 26, 2018

About the Execution of ITS-Tools for BART-PT-005

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.480 3600000.00 14362528.00 230.10 FTTFTFTT???FT?TT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 3.9M
-rw-r--r-- 1 mcc users 211K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 531K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 84K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 221K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 61K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 149K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 34K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 87K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 260K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 646K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 102 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 340 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 69K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 184K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 34K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 66K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 1.2M May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is BART-PT-005, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r032-ebro-152646309900068
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-PT-005-ReachabilityCardinality-00
FORMULA_NAME BART-PT-005-ReachabilityCardinality-01
FORMULA_NAME BART-PT-005-ReachabilityCardinality-02
FORMULA_NAME BART-PT-005-ReachabilityCardinality-03
FORMULA_NAME BART-PT-005-ReachabilityCardinality-04
FORMULA_NAME BART-PT-005-ReachabilityCardinality-05
FORMULA_NAME BART-PT-005-ReachabilityCardinality-06
FORMULA_NAME BART-PT-005-ReachabilityCardinality-07
FORMULA_NAME BART-PT-005-ReachabilityCardinality-08
FORMULA_NAME BART-PT-005-ReachabilityCardinality-09
FORMULA_NAME BART-PT-005-ReachabilityCardinality-10
FORMULA_NAME BART-PT-005-ReachabilityCardinality-11
FORMULA_NAME BART-PT-005-ReachabilityCardinality-12
FORMULA_NAME BART-PT-005-ReachabilityCardinality-13
FORMULA_NAME BART-PT-005-ReachabilityCardinality-14
FORMULA_NAME BART-PT-005-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1526857337682

FORMULA BART-PT-005-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : BART-PT-005-ReachabilityCardinality-00 with value :(!((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TrainState_1_0_0+TrainState_2_0_0)+TrainState_3_0_0)+TrainState_4_0_0)+TrainState_5_0_0)+TrainState_1_1_1)+TrainState_2_1_1)+TrainState_3_1_1)+TrainState_4_1_1)+TrainState_5_1_1)+TrainState_1_1_2)+TrainState_2_1_2)+TrainState_3_1_2)+TrainState_4_1_2)+TrainState_5_1_2)+TrainState_1_1_3)+TrainState_2_1_3)+TrainState_3_1_3)+TrainState_4_1_3)+TrainState_5_1_3)+TrainState_1_1_4)+TrainState_2_1_4)+TrainState_3_1_4)+TrainState_4_1_4)+TrainState_5_1_4)+TrainState_1_2_4)+TrainState_2_2_4)+TrainState_3_2_4)+TrainState_4_2_4)+TrainState_5_2_4)+TrainState_1_1_5)+TrainState_2_1_5)+TrainState_3_1_5)+TrainState_4_1_5)+TrainState_5_1_5)+TrainState_1_2_5)+TrainState_2_2_5)+TrainState_3_2_5)+TrainState_4_2_5)+TrainState_5_2_5)+TrainState_1_1_6)+TrainState_2_1_6)+TrainState_3_1_6)+TrainState_4_1_6)+TrainState_5_1_6)+TrainState_1_2_6)+TrainState_2_2_6)+TrainState_3_2_6)+TrainState_4_2_6)+TrainState_5_2_6)+TrainState_1_1_7)+TrainState_2_1_7)+TrainState_3_1_7)+TrainState_4_1_7)+TrainState_5_1_7)+TrainState_1_2_7)+TrainState_2_2_7)+TrainState_3_2_7)+TrainState_4_2_7)+TrainState_5_2_7)+TrainState_1_3_7)+TrainState_2_3_7)+TrainState_3_3_7)+TrainState_4_3_7)+TrainState_5_3_7)+TrainState_1_1_8)+TrainState_2_1_8)+TrainState_3_1_8)+TrainState_4_1_8)+TrainState_5_1_8)+TrainState_1_2_8)+TrainState_2_2_8)+TrainState_3_2_8)+TrainState_4_2_8)+TrainState_5_2_8)+TrainState_1_3_8)+TrainState_2_3_8)+TrainState_3_3_8)+TrainState_4_3_8)+TrainState_5_3_8)+TrainState_1_1_9)+TrainState_2_1_9)+TrainState_3_1_9)+TrainState_4_1_9)+TrainState_5_1_9)+TrainState_1_2_9)+TrainState_2_2_9)+TrainState_3_2_9)+TrainState_4_2_9)+TrainState_5_2_9)+TrainState_1_3_9)+TrainState_2_3_9)+TrainState_3_3_9)+TrainState_4_3_9)+TrainState_5_3_9)+TrainState_1_1_10)+TrainState_2_1_10)+TrainState_3_1_10)+TrainState_4_1_10)+TrainState_5_1_10)+TrainState_1_2_10)+TrainState_2_2_10)+TrainState_3_2_10)+TrainState_4_2_10)+TrainState_5_2_10)+TrainState_1_3_10)+TrainState_2_3_10)+TrainState_3_3_10)+TrainState_4_3_10)+TrainState_5_3_10)+TrainState_1_1_11)+TrainState_2_1_11)+TrainState_3_1_11)+TrainState_4_1_11)+TrainState_5_1_11)+TrainState_1_2_11)+TrainState_2_2_11)+TrainState_3_2_11)+TrainState_4_2_11)+TrainState_5_2_11)+TrainState_1_3_11)+TrainState_2_3_11)+TrainState_3_3_11)+TrainState_4_3_11)+TrainState_5_3_11)+TrainState_1_4_11)+TrainState_2_4_11)+TrainState_3_4_11)+TrainState_4_4_11)+TrainState_5_4_11)+TrainState_1_1_12)+TrainState_2_1_12)+TrainState_3_1_12)+TrainState_4_1_12)+TrainState_5_1_12)+TrainState_1_2_12)+TrainState_2_2_12)+TrainState_3_2_12)+TrainState_4_2_12)+TrainState_5_2_12)+TrainState_1_3_12)+TrainState_2_3_12)+TrainState_3_3_12)+TrainState_4_3_12)+TrainState_5_3_12)+TrainState_1_4_12)+TrainState_2_4_12)+TrainState_3_4_12)+TrainState_4_4_12)+TrainState_5_4_12)+TrainState_1_1_13)+TrainState_2_1_13)+TrainState_3_1_13)+TrainState_4_1_13)+TrainState_5_1_13)+TrainState_1_2_13)+TrainState_2_2_13)+TrainState_3_2_13)+TrainState_4_2_13)+TrainState_5_2_13)+TrainState_1_3_13)+TrainState_2_3_13)+TrainState_3_3_13)+TrainState_4_3_13)+TrainState_5_3_13)+TrainState_1_4_13)+TrainState_2_4_13)+TrainState_3_4_13)+TrainState_4_4_13)+TrainState_5_4_13)+TrainState_1_1_14)+TrainState_2_1_14)+TrainState_3_1_14)+TrainState_4_1_14)+TrainState_5_1_14)+TrainState_1_2_14)+TrainState_2_2_14)+TrainState_3_2_14)+TrainState_4_2_14)+TrainState_5_2_14)+TrainState_1_3_14)+TrainState_2_3_14)+TrainState_3_3_14)+TrainState_4_3_14)+TrainState_5_3_14)+TrainState_1_4_14)+TrainState_2_4_14)+TrainState_3_4_14)+TrainState_4_4_14)+TrainState_5_4_14)+TrainState_1_1_15)+TrainState_2_1_15)+TrainState_3_1_15)+TrainState_4_1_15)+TrainState_5_1_15)+TrainState_1_2_15)+TrainState_2_2_15)+TrainState_3_2_15)+TrainState_4_2_15)+TrainState_5_2_15)+TrainState_1_3_15)+TrainState_2_3_15)+TrainState_3_3_15)+TrainState_4_3_15)+TrainState_5_3_15)+TrainState_1_4_15)+TrainState_2_4_15)+TrainState_3_4_15)+TrainState_4_4_15)+TrainState_5_4_15)+TrainState_1_1_16)+TrainState_2_1_16)+TrainState_3_1_16)+TrainState_4_1_16)+TrainState_5_1_16)+TrainState_1_2_16)+TrainState_2_2_16)+TrainState_3_2_16)+TrainState_4_2_16)+TrainState_5_2_16)+TrainState_1_3_16)+TrainState_2_3_16)+TrainState_3_3_16)+TrainState_4_3_16)+TrainState_5_3_16)+TrainState_1_4_16)+TrainState_2_4_16)+TrainState_3_4_16)+TrainState_4_4_16)+TrainState_5_4_16)+TrainState_1_1_17)+TrainState_2_1_17)+TrainState_3_1_17)+TrainS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Read [invariant] property : BART-PT-005-ReachabilityCardinality-01 with value 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Read [reachable] property : BART-PT-005-ReachabilityCardinality-05 with value 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Read [invariant] property : BART-PT-005-ReachabilityCardinality-06 with value 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rainState_2_2_35)+TrainState_3_2_35)+TrainState_4_2_35)+TrainState_5_2_35)+TrainState_1_3_35)+TrainState_2_3_35)+TrainState_3_3_35)+TrainState_4_3_35)+TrainState_5_3_35)+TrainState_1_1_36)+TrainState_2_1_36)+TrainState_3_1_36)+TrainState_4_1_36)+TrainState_5_1_36)+TrainState_1_2_36)+TrainState_2_2_36)+TrainState_3_2_36)+TrainState_4_2_36)+TrainState_5_2_36)+TrainState_1_3_36)+TrainState_2_3_36)+TrainState_3_3_36)+TrainState_4_3_36)+TrainState_5_3_36)+TrainState_1_1_37)+TrainState_2_1_37)+TrainState_3_1_37)+TrainState_4_1_37)+TrainState_5_1_37)+TrainState_1_2_37)+TrainState_2_2_37)+TrainState_3_2_37)+TrainState_4_2_37)+TrainState_5_2_37)+TrainState_1_3_37)+TrainState_2_3_37)+TrainState_3_3_37)+TrainState_4_3_37)+TrainState_5_3_37)+TrainState_1_1_38)+TrainState_2_1_38)+TrainState_3_1_38)+TrainState_4_1_38)+TrainState_5_1_38)+TrainState_1_2_38)+TrainState_2_2_38)+TrainState_3_2_38)+TrainState_4_2_38)+TrainState_5_2_38)+TrainState_1_1_39)+TrainState_2_1_39)+TrainState_3_1_39)+TrainState_4_1_39)+TrainState_5_1_39)+TrainState_1_2_39)+TrainState_2_2_39)+TrainState_3_2_39)+TrainState_4_2_39)+TrainState_5_2_39)+TrainState_1_1_40)+TrainState_2_1_40)+TrainState_3_1_40)+TrainState_4_1_40)+TrainState_5_1_40)>=1))
Read [invariant] property : BART-PT-005-ReachabilityCardinality-08 with value :(((TrainState_4_2_35<=TrainState_4_3_32)&&(TrainState_3_2_18>=1))||((TrainState_3_2_11<=TrainState_2_1_24)||(TrainState_2_4_25<=1)))
Read [reachable] property : BART-PT-005-ReachabilityCardinality-09 with value :((((TrainState_1_4_23<=TrainState_3_1_17)&&(TrainState_1_4_22>=3))&&(TrainState_4_2_39>=1))&&(TrainState_5_4_16<=TrainState_5_2_27))
Read [reachable] property : BART-PT-005-ReachabilityCardinality-10 with value :(((!(TrainState_3_1_29>=1))&&((TrainState_5_2_35>=3)||(TrainState_4_4_21>=3)))||(((TrainState_5_1_25>=1)||(TrainState_4_2_12>=2))&&(TrainState_3_3_24>=1)))
Read [invariant] property : BART-PT-005-ReachabilityCardinality-11 with value :(TrainState_2_2_11<=TrainState_5_1_32)
Read [invariant] property : BART-PT-005-ReachabilityCardinality-12 with value :(!(TrainState_4_2_12>=3))
Read [reachable] property : BART-PT-005-ReachabilityCardinality-13 with value :((((TrainState_2_2_27>=2)&&(TrainState_5_4_33>=3))&&(TrainState_2_1_3>=2))&&(!((TrainState_5_3_13<=TrainState_5_2_32)||(TrainState_5_1_34<=TrainState_3_4_23))))
Read [reachable] property : BART-PT-005-ReachabilityCardinality-14 with value :(TrainState_3_1_1>=1)
Read [reachable] property : BART-PT-005-ReachabilityCardinality-15 with value :((TrainState_3_1_4>=1)&&(TrainState_4_1_18<=TrainState_4_2_39))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1010 rows 660 cols
FORMULA BART-PT-005-ReachabilityCardinality-01 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
invariant :TrainState_3_0_0 + TrainState_3_1_1 + TrainState_3_1_2 + TrainState_3_1_3 + TrainState_3_1_4 + TrainState_3_2_4 + TrainState_3_1_5 + TrainState_3_2_5 + TrainState_3_1_6 + TrainState_3_2_6 + TrainState_3_1_7 + TrainState_3_2_7 + TrainState_3_3_7 + TrainState_3_1_8 + TrainState_3_2_8 + TrainState_3_3_8 + TrainState_3_1_9 + TrainState_3_2_9 + TrainState_3_3_9 + TrainState_3_1_10 + TrainState_3_2_10 + TrainState_3_3_10 + TrainState_3_1_11 + TrainState_3_2_11 + TrainState_3_3_11 + TrainState_3_4_11 + TrainState_3_1_12 + TrainState_3_2_12 + TrainState_3_3_12 + TrainState_3_4_12 + TrainState_3_1_13 + TrainState_3_2_13 + TrainState_3_3_13 + TrainState_3_4_13 + TrainState_3_1_14 + TrainState_3_2_14 + TrainState_3_3_14 + TrainState_3_4_14 + TrainState_3_1_15 + TrainState_3_2_15 + TrainState_3_3_15 + TrainState_3_4_15 + TrainState_3_1_16 + TrainState_3_2_16 + TrainState_3_3_16 + TrainState_3_4_16 + TrainState_3_1_17 + TrainState_3_2_17 + TrainState_3_3_17 + TrainState_3_4_17 + TrainState_3_1_18 + TrainState_3_2_18 + TrainState_3_3_18 + TrainState_3_4_18 + TrainState_3_1_19 + TrainState_3_2_19 + TrainState_3_3_19 + TrainState_3_4_19 + TrainState_3_1_20 + TrainState_3_2_20 + TrainState_3_3_20 + TrainState_3_4_20 + TrainState_3_1_21 + TrainState_3_2_21 + TrainState_3_3_21 + TrainState_3_4_21 + TrainState_3_1_22 + TrainState_3_2_22 + TrainState_3_3_22 + TrainState_3_4_22 + TrainState_3_1_23 + TrainState_3_2_23 + TrainState_3_3_23 + TrainState_3_4_23 + TrainState_3_1_24 + TrainState_3_2_24 + TrainState_3_3_24 + TrainState_3_4_24 + TrainState_3_1_25 + TrainState_3_2_25 + TrainState_3_3_25 + TrainState_3_4_25 + TrainState_3_1_26 + TrainState_3_2_26 + TrainState_3_3_26 + TrainState_3_4_26 + TrainState_3_1_27 + TrainState_3_2_27 + TrainState_3_3_27 + TrainState_3_4_27 + TrainState_3_1_28 + TrainState_3_2_28 + TrainState_3_3_28 + TrainState_3_4_28 + TrainState_3_1_29 + TrainState_3_2_29 + TrainState_3_3_29 + TrainState_3_4_29 + TrainState_3_1_30 + TrainState_3_2_30 + TrainState_3_3_30 + TrainState_3_4_30 + TrainState_3_1_31 + TrainState_3_2_31 + TrainState_3_3_31 + TrainState_3_4_31 + TrainState_3_1_32 + TrainState_3_2_32 + TrainState_3_3_32 + TrainState_3_4_32 + TrainState_3_1_33 + TrainState_3_2_33 + TrainState_3_3_33 + TrainState_3_4_33 + TrainState_3_1_34 + TrainState_3_2_34 + TrainState_3_3_34 + TrainState_3_4_34 + TrainState_3_1_35 + TrainState_3_2_35 + TrainState_3_3_35 + TrainState_3_1_36 + TrainState_3_2_36 + TrainState_3_3_36 + TrainState_3_1_37 + TrainState_3_2_37 + TrainState_3_3_37 + TrainState_3_1_38 + TrainState_3_2_38 + TrainState_3_1_39 + TrainState_3_2_39 + TrainState_3_1_40 = 1
invariant :TrainState_5_0_0 + TrainState_5_1_1 + TrainState_5_1_2 + TrainState_5_1_3 + TrainState_5_1_4 + TrainState_5_2_4 + TrainState_5_1_5 + TrainState_5_2_5 + TrainState_5_1_6 + TrainState_5_2_6 + TrainState_5_1_7 + TrainState_5_2_7 + TrainState_5_3_7 + TrainState_5_1_8 + TrainState_5_2_8 + TrainState_5_3_8 + TrainState_5_1_9 + TrainState_5_2_9 + TrainState_5_3_9 + TrainState_5_1_10 + TrainState_5_2_10 + TrainState_5_3_10 + TrainState_5_1_11 + TrainState_5_2_11 + TrainState_5_3_11 + TrainState_5_4_11 + TrainState_5_1_12 + TrainState_5_2_12 + TrainState_5_3_12 + TrainState_5_4_12 + TrainState_5_1_13 + TrainState_5_2_13 + TrainState_5_3_13 + TrainState_5_4_13 + TrainState_5_1_14 + TrainState_5_2_14 + TrainState_5_3_14 + TrainState_5_4_14 + TrainState_5_1_15 + TrainState_5_2_15 + TrainState_5_3_15 + TrainState_5_4_15 + TrainState_5_1_16 + TrainState_5_2_16 + TrainState_5_3_16 + TrainState_5_4_16 + TrainState_5_1_17 + TrainState_5_2_17 + TrainState_5_3_17 + TrainState_5_4_17 + TrainState_5_1_18 + TrainState_5_2_18 + TrainState_5_3_18 + TrainState_5_4_18 + TrainState_5_1_19 + TrainState_5_2_19 + TrainState_5_3_19 + TrainState_5_4_19 + TrainState_5_1_20 + TrainState_5_2_20 + TrainState_5_3_20 + TrainState_5_4_20 + TrainState_5_1_21 + TrainState_5_2_21 + TrainState_5_3_21 + TrainState_5_4_21 + TrainState_5_1_22 + TrainState_5_2_22 + TrainState_5_3_22 + TrainState_5_4_22 + TrainState_5_1_23 + TrainState_5_2_23 + TrainState_5_3_23 + TrainState_5_4_23 + TrainState_5_1_24 + TrainState_5_2_24 + TrainState_5_3_24 + TrainState_5_4_24 + TrainState_5_1_25 + TrainState_5_2_25 + TrainState_5_3_25 + TrainState_5_4_25 + TrainState_5_1_26 + TrainState_5_2_26 + TrainState_5_3_26 + TrainState_5_4_26 + TrainState_5_1_27 + TrainState_5_2_27 + TrainState_5_3_27 + TrainState_5_4_27 + TrainState_5_1_28 + TrainState_5_2_28 + TrainState_5_3_28 + TrainState_5_4_28 + TrainState_5_1_29 + TrainState_5_2_29 + TrainState_5_3_29 + TrainState_5_4_29 + TrainState_5_1_30 + TrainState_5_2_30 + TrainState_5_3_30 + TrainState_5_4_30 + TrainState_5_1_31 + TrainState_5_2_31 + TrainState_5_3_31 + TrainState_5_4_31 + TrainState_5_1_32 + TrainState_5_2_32 + TrainState_5_3_32 + TrainState_5_4_32 + TrainState_5_1_33 + TrainState_5_2_33 + TrainState_5_3_33 + TrainState_5_4_33 + TrainState_5_1_34 + TrainState_5_2_34 + TrainState_5_3_34 + TrainState_5_4_34 + TrainState_5_1_35 + TrainState_5_2_35 + TrainState_5_3_35 + TrainState_5_1_36 + TrainState_5_2_36 + TrainState_5_3_36 + TrainState_5_1_37 + TrainState_5_2_37 + TrainState_5_3_37 + TrainState_5_1_38 + TrainState_5_2_38 + TrainState_5_1_39 + TrainState_5_2_39 + TrainState_5_1_40 = 1
invariant :TrainState_1_0_0 + TrainState_1_1_1 + TrainState_1_1_2 + TrainState_1_1_3 + TrainState_1_1_4 + TrainState_1_2_4 + TrainState_1_1_5 + TrainState_1_2_5 + TrainState_1_1_6 + TrainState_1_2_6 + TrainState_1_1_7 + TrainState_1_2_7 + TrainState_1_3_7 + TrainState_1_1_8 + TrainState_1_2_8 + TrainState_1_3_8 + TrainState_1_1_9 + TrainState_1_2_9 + TrainState_1_3_9 + TrainState_1_1_10 + TrainState_1_2_10 + TrainState_1_3_10 + TrainState_1_1_11 + TrainState_1_2_11 + TrainState_1_3_11 + TrainState_1_4_11 + TrainState_1_1_12 + TrainState_1_2_12 + TrainState_1_3_12 + TrainState_1_4_12 + TrainState_1_1_13 + TrainState_1_2_13 + TrainState_1_3_13 + TrainState_1_4_13 + TrainState_1_1_14 + TrainState_1_2_14 + TrainState_1_3_14 + TrainState_1_4_14 + TrainState_1_1_15 + TrainState_1_2_15 + TrainState_1_3_15 + TrainState_1_4_15 + TrainState_1_1_16 + TrainState_1_2_16 + TrainState_1_3_16 + TrainState_1_4_16 + TrainState_1_1_17 + TrainState_1_2_17 + TrainState_1_3_17 + TrainState_1_4_17 + TrainState_1_1_18 + TrainState_1_2_18 + TrainState_1_3_18 + TrainState_1_4_18 + TrainState_1_1_19 + TrainState_1_2_19 + TrainState_1_3_19 + TrainState_1_4_19 + TrainState_1_1_20 + TrainState_1_2_20 + TrainState_1_3_20 + TrainState_1_4_20 + TrainState_1_1_21 + TrainState_1_2_21 + TrainState_1_3_21 + TrainState_1_4_21 + TrainState_1_1_22 + TrainState_1_2_22 + TrainState_1_3_22 + TrainState_1_4_22 + TrainState_1_1_23 + TrainState_1_2_23 + TrainState_1_3_23 + TrainState_1_4_23 + TrainState_1_1_24 + TrainState_1_2_24 + TrainState_1_3_24 + TrainState_1_4_24 + TrainState_1_1_25 + TrainState_1_2_25 + TrainState_1_3_25 + TrainState_1_4_25 + TrainState_1_1_26 + TrainState_1_2_26 + TrainState_1_3_26 + TrainState_1_4_26 + TrainState_1_1_27 + TrainState_1_2_27 + TrainState_1_3_27 + TrainState_1_4_27 + TrainState_1_1_28 + TrainState_1_2_28 + TrainState_1_3_28 + TrainState_1_4_28 + TrainState_1_1_29 + TrainState_1_2_29 + TrainState_1_3_29 + TrainState_1_4_29 + TrainState_1_1_30 + TrainState_1_2_30 + TrainState_1_3_30 + TrainState_1_4_30 + TrainState_1_1_31 + TrainState_1_2_31 + TrainState_1_3_31 + TrainState_1_4_31 + TrainState_1_1_32 + TrainState_1_2_32 + TrainState_1_3_32 + TrainState_1_4_32 + TrainState_1_1_33 + TrainState_1_2_33 + TrainState_1_3_33 + TrainState_1_4_33 + TrainState_1_1_34 + TrainState_1_2_34 + TrainState_1_3_34 + TrainState_1_4_34 + TrainState_1_1_35 + TrainState_1_2_35 + TrainState_1_3_35 + TrainState_1_1_36 + TrainState_1_2_36 + TrainState_1_3_36 + TrainState_1_1_37 + TrainState_1_2_37 + TrainState_1_3_37 + TrainState_1_1_38 + TrainState_1_2_38 + TrainState_1_1_39 + TrainState_1_2_39 + TrainState_1_1_40 = 1
invariant :TrainState_4_0_0 + TrainState_4_1_1 + TrainState_4_1_2 + TrainState_4_1_3 + TrainState_4_1_4 + TrainState_4_2_4 + TrainState_4_1_5 + TrainState_4_2_5 + TrainState_4_1_6 + TrainState_4_2_6 + TrainState_4_1_7 + TrainState_4_2_7 + TrainState_4_3_7 + TrainState_4_1_8 + TrainState_4_2_8 + TrainState_4_3_8 + TrainState_4_1_9 + TrainState_4_2_9 + TrainState_4_3_9 + TrainState_4_1_10 + TrainState_4_2_10 + TrainState_4_3_10 + TrainState_4_1_11 + TrainState_4_2_11 + TrainState_4_3_11 + TrainState_4_4_11 + TrainState_4_1_12 + TrainState_4_2_12 + TrainState_4_3_12 + TrainState_4_4_12 + TrainState_4_1_13 + TrainState_4_2_13 + TrainState_4_3_13 + TrainState_4_4_13 + TrainState_4_1_14 + TrainState_4_2_14 + TrainState_4_3_14 + TrainState_4_4_14 + TrainState_4_1_15 + TrainState_4_2_15 + TrainState_4_3_15 + TrainState_4_4_15 + TrainState_4_1_16 + TrainState_4_2_16 + TrainState_4_3_16 + TrainState_4_4_16 + TrainState_4_1_17 + TrainState_4_2_17 + TrainState_4_3_17 + TrainState_4_4_17 + TrainState_4_1_18 + TrainState_4_2_18 + TrainState_4_3_18 + TrainState_4_4_18 + TrainState_4_1_19 + TrainState_4_2_19 + TrainState_4_3_19 + TrainState_4_4_19 + TrainState_4_1_20 + TrainState_4_2_20 + TrainState_4_3_20 + TrainState_4_4_20 + TrainState_4_1_21 + TrainState_4_2_21 + TrainState_4_3_21 + TrainState_4_4_21 + TrainState_4_1_22 + TrainState_4_2_22 + TrainState_4_3_22 + TrainState_4_4_22 + TrainState_4_1_23 + TrainState_4_2_23 + TrainState_4_3_23 + TrainState_4_4_23 + TrainState_4_1_24 + TrainState_4_2_24 + TrainState_4_3_24 + TrainState_4_4_24 + TrainState_4_1_25 + TrainState_4_2_25 + TrainState_4_3_25 + TrainState_4_4_25 + TrainState_4_1_26 + TrainState_4_2_26 + TrainState_4_3_26 + TrainState_4_4_26 + TrainState_4_1_27 + TrainState_4_2_27 + TrainState_4_3_27 + TrainState_4_4_27 + TrainState_4_1_28 + TrainState_4_2_28 + TrainState_4_3_28 + TrainState_4_4_28 + TrainState_4_1_29 + TrainState_4_2_29 + TrainState_4_3_29 + TrainState_4_4_29 + TrainState_4_1_30 + TrainState_4_2_30 + TrainState_4_3_30 + TrainState_4_4_30 + TrainState_4_1_31 + TrainState_4_2_31 + TrainState_4_3_31 + TrainState_4_4_31 + TrainState_4_1_32 + TrainState_4_2_32 + TrainState_4_3_32 + TrainState_4_4_32 + TrainState_4_1_33 + TrainState_4_2_33 + TrainState_4_3_33 + TrainState_4_4_33 + TrainState_4_1_34 + TrainState_4_2_34 + TrainState_4_3_34 + TrainState_4_4_34 + TrainState_4_1_35 + TrainState_4_2_35 + TrainState_4_3_35 + TrainState_4_1_36 + TrainState_4_2_36 + TrainState_4_3_36 + TrainState_4_1_37 + TrainState_4_2_37 + TrainState_4_3_37 + TrainState_4_1_38 + TrainState_4_2_38 + TrainState_4_1_39 + TrainState_4_2_39 + TrainState_4_1_40 = 1
invariant :TrainState_2_0_0 + TrainState_2_1_1 + TrainState_2_1_2 + TrainState_2_1_3 + TrainState_2_1_4 + TrainState_2_2_4 + TrainState_2_1_5 + TrainState_2_2_5 + TrainState_2_1_6 + TrainState_2_2_6 + TrainState_2_1_7 + TrainState_2_2_7 + TrainState_2_3_7 + TrainState_2_1_8 + TrainState_2_2_8 + TrainState_2_3_8 + TrainState_2_1_9 + TrainState_2_2_9 + TrainState_2_3_9 + TrainState_2_1_10 + TrainState_2_2_10 + TrainState_2_3_10 + TrainState_2_1_11 + TrainState_2_2_11 + TrainState_2_3_11 + TrainState_2_4_11 + TrainState_2_1_12 + TrainState_2_2_12 + TrainState_2_3_12 + TrainState_2_4_12 + TrainState_2_1_13 + TrainState_2_2_13 + TrainState_2_3_13 + TrainState_2_4_13 + TrainState_2_1_14 + TrainState_2_2_14 + TrainState_2_3_14 + TrainState_2_4_14 + TrainState_2_1_15 + TrainState_2_2_15 + TrainState_2_3_15 + TrainState_2_4_15 + TrainState_2_1_16 + TrainState_2_2_16 + TrainState_2_3_16 + TrainState_2_4_16 + TrainState_2_1_17 + TrainState_2_2_17 + TrainState_2_3_17 + TrainState_2_4_17 + TrainState_2_1_18 + TrainState_2_2_18 + TrainState_2_3_18 + TrainState_2_4_18 + TrainState_2_1_19 + TrainState_2_2_19 + TrainState_2_3_19 + TrainState_2_4_19 + TrainState_2_1_20 + TrainState_2_2_20 + TrainState_2_3_20 + TrainState_2_4_20 + TrainState_2_1_21 + TrainState_2_2_21 + TrainState_2_3_21 + TrainState_2_4_21 + TrainState_2_1_22 + TrainState_2_2_22 + TrainState_2_3_22 + TrainState_2_4_22 + TrainState_2_1_23 + TrainState_2_2_23 + TrainState_2_3_23 + TrainState_2_4_23 + TrainState_2_1_24 + TrainState_2_2_24 + TrainState_2_3_24 + TrainState_2_4_24 + TrainState_2_1_25 + TrainState_2_2_25 + TrainState_2_3_25 + TrainState_2_4_25 + TrainState_2_1_26 + TrainState_2_2_26 + TrainState_2_3_26 + TrainState_2_4_26 + TrainState_2_1_27 + TrainState_2_2_27 + TrainState_2_3_27 + TrainState_2_4_27 + TrainState_2_1_28 + TrainState_2_2_28 + TrainState_2_3_28 + TrainState_2_4_28 + TrainState_2_1_29 + TrainState_2_2_29 + TrainState_2_3_29 + TrainState_2_4_29 + TrainState_2_1_30 + TrainState_2_2_30 + TrainState_2_3_30 + TrainState_2_4_30 + TrainState_2_1_31 + TrainState_2_2_31 + TrainState_2_3_31 + TrainState_2_4_31 + TrainState_2_1_32 + TrainState_2_2_32 + TrainState_2_3_32 + TrainState_2_4_32 + TrainState_2_1_33 + TrainState_2_2_33 + TrainState_2_3_33 + TrainState_2_4_33 + TrainState_2_1_34 + TrainState_2_2_34 + TrainState_2_3_34 + TrainState_2_4_34 + TrainState_2_1_35 + TrainState_2_2_35 + TrainState_2_3_35 + TrainState_2_1_36 + TrainState_2_2_36 + TrainState_2_3_36 + TrainState_2_1_37 + TrainState_2_2_37 + TrainState_2_3_37 + TrainState_2_1_38 + TrainState_2_2_38 + TrainState_2_1_39 + TrainState_2_2_39 + TrainState_2_1_40 = 1
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1010 rows 660 cols
invariant :TrainState_3_0_0 + TrainState_3_1_1 + TrainState_3_1_2 + TrainState_3_1_3 + TrainState_3_1_4 + TrainState_3_2_4 + TrainState_3_1_5 + TrainState_3_2_5 + TrainState_3_1_6 + TrainState_3_2_6 + TrainState_3_1_7 + TrainState_3_2_7 + TrainState_3_3_7 + TrainState_3_1_8 + TrainState_3_2_8 + TrainState_3_3_8 + TrainState_3_1_9 + TrainState_3_2_9 + TrainState_3_3_9 + TrainState_3_1_10 + TrainState_3_2_10 + TrainState_3_3_10 + TrainState_3_1_11 + TrainState_3_2_11 + TrainState_3_3_11 + TrainState_3_4_11 + TrainState_3_1_12 + TrainState_3_2_12 + TrainState_3_3_12 + TrainState_3_4_12 + TrainState_3_1_13 + TrainState_3_2_13 + TrainState_3_3_13 + TrainState_3_4_13 + TrainState_3_1_14 + TrainState_3_2_14 + TrainState_3_3_14 + TrainState_3_4_14 + TrainState_3_1_15 + TrainState_3_2_15 + TrainState_3_3_15 + TrainState_3_4_15 + TrainState_3_1_16 + TrainState_3_2_16 + TrainState_3_3_16 + TrainState_3_4_16 + TrainState_3_1_17 + TrainState_3_2_17 + TrainState_3_3_17 + TrainState_3_4_17 + TrainState_3_1_18 + TrainState_3_2_18 + TrainState_3_3_18 + TrainState_3_4_18 + TrainState_3_1_19 + TrainState_3_2_19 + TrainState_3_3_19 + TrainState_3_4_19 + TrainState_3_1_20 + TrainState_3_2_20 + TrainState_3_3_20 + TrainState_3_4_20 + TrainState_3_1_21 + TrainState_3_2_21 + TrainState_3_3_21 + TrainState_3_4_21 + TrainState_3_1_22 + TrainState_3_2_22 + TrainState_3_3_22 + TrainState_3_4_22 + TrainState_3_1_23 + TrainState_3_2_23 + TrainState_3_3_23 + TrainState_3_4_23 + TrainState_3_1_24 + TrainState_3_2_24 + TrainState_3_3_24 + TrainState_3_4_24 + TrainState_3_1_25 + TrainState_3_2_25 + TrainState_3_3_25 + TrainState_3_4_25 + TrainState_3_1_26 + TrainState_3_2_26 + TrainState_3_3_26 + TrainState_3_4_26 + TrainState_3_1_27 + TrainState_3_2_27 + TrainState_3_3_27 + TrainState_3_4_27 + TrainState_3_1_28 + TrainState_3_2_28 + TrainState_3_3_28 + TrainState_3_4_28 + TrainState_3_1_29 + TrainState_3_2_29 + TrainState_3_3_29 + TrainState_3_4_29 + TrainState_3_1_30 + TrainState_3_2_30 + TrainState_3_3_30 + TrainState_3_4_30 + TrainState_3_1_31 + TrainState_3_2_31 + TrainState_3_3_31 + TrainState_3_4_31 + TrainState_3_1_32 + TrainState_3_2_32 + TrainState_3_3_32 + TrainState_3_4_32 + TrainState_3_1_33 + TrainState_3_2_33 + TrainState_3_3_33 + TrainState_3_4_33 + TrainState_3_1_34 + TrainState_3_2_34 + TrainState_3_3_34 + TrainState_3_4_34 + TrainState_3_1_35 + TrainState_3_2_35 + TrainState_3_3_35 + TrainState_3_1_36 + TrainState_3_2_36 + TrainState_3_3_36 + TrainState_3_1_37 + TrainState_3_2_37 + TrainState_3_3_37 + TrainState_3_1_38 + TrainState_3_2_38 + TrainState_3_1_39 + TrainState_3_2_39 + TrainState_3_1_40 = 1
invariant :TrainState_5_0_0 + TrainState_5_1_1 + TrainState_5_1_2 + TrainState_5_1_3 + TrainState_5_1_4 + TrainState_5_2_4 + TrainState_5_1_5 + TrainState_5_2_5 + TrainState_5_1_6 + TrainState_5_2_6 + TrainState_5_1_7 + TrainState_5_2_7 + TrainState_5_3_7 + TrainState_5_1_8 + TrainState_5_2_8 + TrainState_5_3_8 + TrainState_5_1_9 + TrainState_5_2_9 + TrainState_5_3_9 + TrainState_5_1_10 + TrainState_5_2_10 + TrainState_5_3_10 + TrainState_5_1_11 + TrainState_5_2_11 + TrainState_5_3_11 + TrainState_5_4_11 + TrainState_5_1_12 + TrainState_5_2_12 + TrainState_5_3_12 + TrainState_5_4_12 + TrainState_5_1_13 + TrainState_5_2_13 + TrainState_5_3_13 + TrainState_5_4_13 + TrainState_5_1_14 + TrainState_5_2_14 + TrainState_5_3_14 + TrainState_5_4_14 + TrainState_5_1_15 + TrainState_5_2_15 + TrainState_5_3_15 + TrainState_5_4_15 + TrainState_5_1_16 + TrainState_5_2_16 + TrainState_5_3_16 + TrainState_5_4_16 + TrainState_5_1_17 + TrainState_5_2_17 + TrainState_5_3_17 + TrainState_5_4_17 + TrainState_5_1_18 + TrainState_5_2_18 + TrainState_5_3_18 + TrainState_5_4_18 + TrainState_5_1_19 + TrainState_5_2_19 + TrainState_5_3_19 + TrainState_5_4_19 + TrainState_5_1_20 + TrainState_5_2_20 + TrainState_5_3_20 + TrainState_5_4_20 + TrainState_5_1_21 + TrainState_5_2_21 + TrainState_5_3_21 + TrainState_5_4_21 + TrainState_5_1_22 + TrainState_5_2_22 + TrainState_5_3_22 + TrainState_5_4_22 + TrainState_5_1_23 + TrainState_5_2_23 + TrainState_5_3_23 + TrainState_5_4_23 + TrainState_5_1_24 + TrainState_5_2_24 + TrainState_5_3_24 + TrainState_5_4_24 + TrainState_5_1_25 + TrainState_5_2_25 + TrainState_5_3_25 + TrainState_5_4_25 + TrainState_5_1_26 + TrainState_5_2_26 + TrainState_5_3_26 + TrainState_5_4_26 + TrainState_5_1_27 + TrainState_5_2_27 + TrainState_5_3_27 + TrainState_5_4_27 + TrainState_5_1_28 + TrainState_5_2_28 + TrainState_5_3_28 + TrainState_5_4_28 + TrainState_5_1_29 + TrainState_5_2_29 + TrainState_5_3_29 + TrainState_5_4_29 + TrainState_5_1_30 + TrainState_5_2_30 + TrainState_5_3_30 + TrainState_5_4_30 + TrainState_5_1_31 + TrainState_5_2_31 + TrainState_5_3_31 + TrainState_5_4_31 + TrainState_5_1_32 + TrainState_5_2_32 + TrainState_5_3_32 + TrainState_5_4_32 + TrainState_5_1_33 + TrainState_5_2_33 + TrainState_5_3_33 + TrainState_5_4_33 + TrainState_5_1_34 + TrainState_5_2_34 + TrainState_5_3_34 + TrainState_5_4_34 + TrainState_5_1_35 + TrainState_5_2_35 + TrainState_5_3_35 + TrainState_5_1_36 + TrainState_5_2_36 + TrainState_5_3_36 + TrainState_5_1_37 + TrainState_5_2_37 + TrainState_5_3_37 + TrainState_5_1_38 + TrainState_5_2_38 + TrainState_5_1_39 + TrainState_5_2_39 + TrainState_5_1_40 = 1
invariant :TrainState_1_0_0 + TrainState_1_1_1 + TrainState_1_1_2 + TrainState_1_1_3 + TrainState_1_1_4 + TrainState_1_2_4 + TrainState_1_1_5 + TrainState_1_2_5 + TrainState_1_1_6 + TrainState_1_2_6 + TrainState_1_1_7 + TrainState_1_2_7 + TrainState_1_3_7 + TrainState_1_1_8 + TrainState_1_2_8 + TrainState_1_3_8 + TrainState_1_1_9 + TrainState_1_2_9 + TrainState_1_3_9 + TrainState_1_1_10 + TrainState_1_2_10 + TrainState_1_3_10 + TrainState_1_1_11 + TrainState_1_2_11 + TrainState_1_3_11 + TrainState_1_4_11 + TrainState_1_1_12 + TrainState_1_2_12 + TrainState_1_3_12 + TrainState_1_4_12 + TrainState_1_1_13 + TrainState_1_2_13 + TrainState_1_3_13 + TrainState_1_4_13 + TrainState_1_1_14 + TrainState_1_2_14 + TrainState_1_3_14 + TrainState_1_4_14 + TrainState_1_1_15 + TrainState_1_2_15 + TrainState_1_3_15 + TrainState_1_4_15 + TrainState_1_1_16 + TrainState_1_2_16 + TrainState_1_3_16 + TrainState_1_4_16 + TrainState_1_1_17 + TrainState_1_2_17 + TrainState_1_3_17 + TrainState_1_4_17 + TrainState_1_1_18 + TrainState_1_2_18 + TrainState_1_3_18 + TrainState_1_4_18 + TrainState_1_1_19 + TrainState_1_2_19 + TrainState_1_3_19 + TrainState_1_4_19 + TrainState_1_1_20 + TrainState_1_2_20 + TrainState_1_3_20 + TrainState_1_4_20 + TrainState_1_1_21 + TrainState_1_2_21 + TrainState_1_3_21 + TrainState_1_4_21 + TrainState_1_1_22 + TrainState_1_2_22 + TrainState_1_3_22 + TrainState_1_4_22 + TrainState_1_1_23 + TrainState_1_2_23 + TrainState_1_3_23 + TrainState_1_4_23 + TrainState_1_1_24 + TrainState_1_2_24 + TrainState_1_3_24 + TrainState_1_4_24 + TrainState_1_1_25 + TrainState_1_2_25 + TrainState_1_3_25 + TrainState_1_4_25 + TrainState_1_1_26 + TrainState_1_2_26 + TrainState_1_3_26 + TrainState_1_4_26 + TrainState_1_1_27 + TrainState_1_2_27 + TrainState_1_3_27 + TrainState_1_4_27 + TrainState_1_1_28 + TrainState_1_2_28 + TrainState_1_3_28 + TrainState_1_4_28 + TrainState_1_1_29 + TrainState_1_2_29 + TrainState_1_3_29 + TrainState_1_4_29 + TrainState_1_1_30 + TrainState_1_2_30 + TrainState_1_3_30 + TrainState_1_4_30 + TrainState_1_1_31 + TrainState_1_2_31 + TrainState_1_3_31 + TrainState_1_4_31 + TrainState_1_1_32 + TrainState_1_2_32 + TrainState_1_3_32 + TrainState_1_4_32 + TrainState_1_1_33 + TrainState_1_2_33 + TrainState_1_3_33 + TrainState_1_4_33 + TrainState_1_1_34 + TrainState_1_2_34 + TrainState_1_3_34 + TrainState_1_4_34 + TrainState_1_1_35 + TrainState_1_2_35 + TrainState_1_3_35 + TrainState_1_1_36 + TrainState_1_2_36 + TrainState_1_3_36 + TrainState_1_1_37 + TrainState_1_2_37 + TrainState_1_3_37 + TrainState_1_1_38 + TrainState_1_2_38 + TrainState_1_1_39 + TrainState_1_2_39 + TrainState_1_1_40 = 1
invariant :TrainState_4_0_0 + TrainState_4_1_1 + TrainState_4_1_2 + TrainState_4_1_3 + TrainState_4_1_4 + TrainState_4_2_4 + TrainState_4_1_5 + TrainState_4_2_5 + TrainState_4_1_6 + TrainState_4_2_6 + TrainState_4_1_7 + TrainState_4_2_7 + TrainState_4_3_7 + TrainState_4_1_8 + TrainState_4_2_8 + TrainState_4_3_8 + TrainState_4_1_9 + TrainState_4_2_9 + TrainState_4_3_9 + TrainState_4_1_10 + TrainState_4_2_10 + TrainState_4_3_10 + TrainState_4_1_11 + TrainState_4_2_11 + TrainState_4_3_11 + TrainState_4_4_11 + TrainState_4_1_12 + TrainState_4_2_12 + TrainState_4_3_12 + TrainState_4_4_12 + TrainState_4_1_13 + TrainState_4_2_13 + TrainState_4_3_13 + TrainState_4_4_13 + TrainState_4_1_14 + TrainState_4_2_14 + TrainState_4_3_14 + TrainState_4_4_14 + TrainState_4_1_15 + TrainState_4_2_15 + TrainState_4_3_15 + TrainState_4_4_15 + TrainState_4_1_16 + TrainState_4_2_16 + TrainState_4_3_16 + TrainState_4_4_16 + TrainState_4_1_17 + TrainState_4_2_17 + TrainState_4_3_17 + TrainState_4_4_17 + TrainState_4_1_18 + TrainState_4_2_18 + TrainState_4_3_18 + TrainState_4_4_18 + TrainState_4_1_19 + TrainState_4_2_19 + TrainState_4_3_19 + TrainState_4_4_19 + TrainState_4_1_20 + TrainState_4_2_20 + TrainState_4_3_20 + TrainState_4_4_20 + TrainState_4_1_21 + TrainState_4_2_21 + TrainState_4_3_21 + TrainState_4_4_21 + TrainState_4_1_22 + TrainState_4_2_22 + TrainState_4_3_22 + TrainState_4_4_22 + TrainState_4_1_23 + TrainState_4_2_23 + TrainState_4_3_23 + TrainState_4_4_23 + TrainState_4_1_24 + TrainState_4_2_24 + TrainState_4_3_24 + TrainState_4_4_24 + TrainState_4_1_25 + TrainState_4_2_25 + TrainState_4_3_25 + TrainState_4_4_25 + TrainState_4_1_26 + TrainState_4_2_26 + TrainState_4_3_26 + TrainState_4_4_26 + TrainState_4_1_27 + TrainState_4_2_27 + TrainState_4_3_27 + TrainState_4_4_27 + TrainState_4_1_28 + TrainState_4_2_28 + TrainState_4_3_28 + TrainState_4_4_28 + TrainState_4_1_29 + TrainState_4_2_29 + TrainState_4_3_29 + TrainState_4_4_29 + TrainState_4_1_30 + TrainState_4_2_30 + TrainState_4_3_30 + TrainState_4_4_30 + TrainState_4_1_31 + TrainState_4_2_31 + TrainState_4_3_31 + TrainState_4_4_31 + TrainState_4_1_32 + TrainState_4_2_32 + TrainState_4_3_32 + TrainState_4_4_32 + TrainState_4_1_33 + TrainState_4_2_33 + TrainState_4_3_33 + TrainState_4_4_33 + TrainState_4_1_34 + TrainState_4_2_34 + TrainState_4_3_34 + TrainState_4_4_34 + TrainState_4_1_35 + TrainState_4_2_35 + TrainState_4_3_35 + TrainState_4_1_36 + TrainState_4_2_36 + TrainState_4_3_36 + TrainState_4_1_37 + TrainState_4_2_37 + TrainState_4_3_37 + TrainState_4_1_38 + TrainState_4_2_38 + TrainState_4_1_39 + TrainState_4_2_39 + TrainState_4_1_40 = 1
invariant :TrainState_2_0_0 + TrainState_2_1_1 + TrainState_2_1_2 + TrainState_2_1_3 + TrainState_2_1_4 + TrainState_2_2_4 + TrainState_2_1_5 + TrainState_2_2_5 + TrainState_2_1_6 + TrainState_2_2_6 + TrainState_2_1_7 + TrainState_2_2_7 + TrainState_2_3_7 + TrainState_2_1_8 + TrainState_2_2_8 + TrainState_2_3_8 + TrainState_2_1_9 + TrainState_2_2_9 + TrainState_2_3_9 + TrainState_2_1_10 + TrainState_2_2_10 + TrainState_2_3_10 + TrainState_2_1_11 + TrainState_2_2_11 + TrainState_2_3_11 + TrainState_2_4_11 + TrainState_2_1_12 + TrainState_2_2_12 + TrainState_2_3_12 + TrainState_2_4_12 + TrainState_2_1_13 + TrainState_2_2_13 + TrainState_2_3_13 + TrainState_2_4_13 + TrainState_2_1_14 + TrainState_2_2_14 + TrainState_2_3_14 + TrainState_2_4_14 + TrainState_2_1_15 + TrainState_2_2_15 + TrainState_2_3_15 + TrainState_2_4_15 + TrainState_2_1_16 + TrainState_2_2_16 + TrainState_2_3_16 + TrainState_2_4_16 + TrainState_2_1_17 + TrainState_2_2_17 + TrainState_2_3_17 + TrainState_2_4_17 + TrainState_2_1_18 + TrainState_2_2_18 + TrainState_2_3_18 + TrainState_2_4_18 + TrainState_2_1_19 + TrainState_2_2_19 + TrainState_2_3_19 + TrainState_2_4_19 + TrainState_2_1_20 + TrainState_2_2_20 + TrainState_2_3_20 + TrainState_2_4_20 + TrainState_2_1_21 + TrainState_2_2_21 + TrainState_2_3_21 + TrainState_2_4_21 + TrainState_2_1_22 + TrainState_2_2_22 + TrainState_2_3_22 + TrainState_2_4_22 + TrainState_2_1_23 + TrainState_2_2_23 + TrainState_2_3_23 + TrainState_2_4_23 + TrainState_2_1_24 + TrainState_2_2_24 + TrainState_2_3_24 + TrainState_2_4_24 + TrainState_2_1_25 + TrainState_2_2_25 + TrainState_2_3_25 + TrainState_2_4_25 + TrainState_2_1_26 + TrainState_2_2_26 + TrainState_2_3_26 + TrainState_2_4_26 + TrainState_2_1_27 + TrainState_2_2_27 + TrainState_2_3_27 + TrainState_2_4_27 + TrainState_2_1_28 + TrainState_2_2_28 + TrainState_2_3_28 + TrainState_2_4_28 + TrainState_2_1_29 + TrainState_2_2_29 + TrainState_2_3_29 + TrainState_2_4_29 + TrainState_2_1_30 + TrainState_2_2_30 + TrainState_2_3_30 + TrainState_2_4_30 + TrainState_2_1_31 + TrainState_2_2_31 + TrainState_2_3_31 + TrainState_2_4_31 + TrainState_2_1_32 + TrainState_2_2_32 + TrainState_2_3_32 + TrainState_2_4_32 + TrainState_2_1_33 + TrainState_2_2_33 + TrainState_2_3_33 + TrainState_2_4_33 + TrainState_2_1_34 + TrainState_2_2_34 + TrainState_2_3_34 + TrainState_2_4_34 + TrainState_2_1_35 + TrainState_2_2_35 + TrainState_2_3_35 + TrainState_2_1_36 + TrainState_2_2_36 + TrainState_2_3_36 + TrainState_2_1_37 + TrainState_2_2_37 + TrainState_2_3_37 + TrainState_2_1_38 + TrainState_2_2_38 + TrainState_2_1_39 + TrainState_2_2_39 + TrainState_2_1_40 = 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
BART\_PT\_005\_flat\_flat,4.00746e+10,12.6925,191312,2,20712,5,1.21389e+06,6,0,3653,884823,0
Total reachable state count : 40074642432

Verifying 12 reachability properties.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 30662 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 523 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
LTSmin run took 7535 ms.
Invariant validated
FORMULA BART-PT-005-ReachabilityCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
LTSmin run took 7604 ms.
Invariant validated
FORMULA BART-PT-005-ReachabilityCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
LTSmin run took 9672 ms.
Invariant validated
FORMULA BART-PT-005-ReachabilityCardinality-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>300 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>300 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>300 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
LTSmin run took 6394 ms.
Found Violation
FORMULA BART-PT-005-ReachabilityCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
LTSmin run took 21773 ms.
Invariant validated
FORMULA BART-PT-005-ReachabilityCardinality-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>300 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
LTSmin run took 14358 ms.
Found Violation
FORMULA BART-PT-005-ReachabilityCardinality-14 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
LTSmin run took 6297 ms.
Found Violation
FORMULA BART-PT-005-ReachabilityCardinality-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 2400 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, BARTPT005ReachabilityCardinality08==true], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 20, 2018 11:02:20 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 20, 2018 11:02:20 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 20, 2018 11:02:20 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 304 ms
May 20, 2018 11:02:21 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 870 places.
May 20, 2018 11:02:21 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1010 transitions.
May 20, 2018 11:02:22 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 210 fixed domain variables (out of 870 variables) in GAL type BART_PT_005
May 20, 2018 11:02:22 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 210 constant array cells/variables (out of 870 variables) in type BART_PT_005
May 20, 2018 11:02:22 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: DistStation_37,NewDistTable_22_4_18,NewDistTable_13_2_11,NewDistTable_7_3_4,DistStation_33,NewDistTable_26_5_21,DistStation_30,NewDistTable_3_2_1,NewDistTable_13_1_12,NewDistTable_23_3_20,NewDistTable_26_4_22,NewDistTable_39_1_38,NewDistTable_20_3_17,NewDistTable_36_3_33,NewDistTable_17_2_15,NewDistTable_4_1_3,NewDistTable_12_5_7,NewDistTable_29_5_24,NewDistTable_9_1_8,NewDistTable_30_2_28,NewDistTable_21_2_19,NewDistTable_33_1_32,NewDistTable_18_4_14,NewDistTable_21_5_16,DistStation_32,NewDistTable_6_1_5,NewDistTable_15_4_11,NewDistTable_17_1_16,NewDistTable_15_1_14,NewDistTable_4_3_1,NewDistTable_24_3_21,NewDistTable_35_1_34,NewDistTable_28_1_27,NewDistTable_36_2_34,NewDistTable_26_3_23,NewDistTable_19_2_17,NewDistTable_8_4_4,NewDistTable_27_5_22,DistStation_39,NewDistTable_26_2_24,NewDistTable_23_5_18,NewDistTable_16_5_11,NewDistTable_29_2_27,NewDistTable_30_4_26,NewDistTable_40_2_38,NewDistTable_31_5_26,NewDistTable_25_4_21,NewDistTable_15_5_10,NewDistTable_32_3_29,NewDistTable_38_3_35,DistStation_23,NewDistTable_26_1_25,NewDistTable_29_3_26,DistStation_10,NewDistTable_22_3_19,NewDistTable_33_5_28,DistStation_34,NewDistTable_39_2_37,NewDistTable_14_2_12,NewDistTable_16_3_13,NewDistTable_11_3_8,NewDistTable_34_2_32,NewDistTable_4_2_2,DistStation_20,NewDistTable_24_4_20,NewDistTable_8_3_5,NewDistTable_34_4_30,NewDistTable_19_1_18,NewDistTable_22_2_20,NewDistTable_30_3_27,DistStation_16,NewDistTable_18_5_13,NewDistTable_35_2_33,DistStation_11,NewDistTable_11_5_6,DistStation_7,NewDistTable_20_5_15,NewDistTable_25_2_23,StopTable_4_10,NewDistTable_39_3_36,NewDistTable_22_1_21,NewDistTable_32_5_27,NewDistTable_11_2_9,NewDistTable_6_3_3,NewDistTable_9_3_6,DistStation_40,NewDistTable_19_5_14,StopTable_2_3,NewDistTable_35_3_32,NewDistTable_17_5_12,NewDistTable_7_1_6,NewDistTable_7_2_5,DistStation_12,DistStation_29,NewDistTable_16_2_14,DistStation_22,NewDistTable_25_1_24,NewDistTable_29_1_28,NewDistTable_11_1_10,NewDistTable_20_1_19,DistStation_14,NewDistTable_14_4_10,DistStation_6,NewDistTable_5_1_4,NewDistTable_37_4_33,NewDistTable_28_3_25,NewDistTable_31_3_28,DistStation_8,DistStation_5,NewDistTable_23_4_19,NewDistTable_13_5_8,NewDistTable_24_2_22,NewDistTable_15_2_13,NewDistTable_16_4_12,NewDistTable_31_4_27,NewDistTable_23_2_21,NewDistTable_28_5_23,NewDistTable_12_3_9,DistStation_38,DistStation_15,NewDistTable_37_3_34,NewDistTable_9_4_5,DistStation_9,NewDistTable_10_2_8,NewDistTable_20_2_18,NewDistTable_20_4_16,NewDistTable_11_4_7,NewDistTable_40_1_39,NewDistTable_38_2_36,NewDistTable_14_1_13,DistStation_17,NewDistTable_8_1_7,DistStation_19,NewDistTable_30_5_25,NewDistTable_30_1_29,DistStation_27,StopTable_1_1,NewDistTable_10_3_7,NewDistTable_12_2_10,DistStation_26,DistStation_28,NewDistTable_17_4_13,NewDistTable_33_3_30,DistStation_36,NewDistTable_31_2_29,NewDistTable_27_2_25,NewDistTable_27_1_26,NewDistTable_32_2_30,DistStation_25,DistStation_31,NewDistTable_15_3_12,NewDistTable_35_4_31,NewDistTable_33_4_29,NewDistTable_13_4_9,NewDistTable_27_3_24,NewDistTable_34_1_33,NewDistTable_2_2_0,NewDistTable_34_5_29,NewDistTable_9_2_7,DistStation_35,NewDistTable_7_4_3,StopTable_3_6,NewDistTable_21_3_18,NewDistTable_13_3_10,NewDistTable_16_1_15,NewDistTable_37_1_36,NewDistTable_19_3_16,NewDistTable_12_1_11,NewDistTable_36_4_32,NewDistTable_21_4_17,NewDistTable_10_1_9,NewDistTable_2_1_1,NewDistTable_5_3_2,NewDistTable_19_4_15,DistStation_24,NewDistTable_23_1_22,DistStation_13,NewDistTable_36_1_35,NewDistTable_32_1_31,NewDistTable_8_2_6,NewDistTable_14_3_11,NewDistTable_32_4_28,NewDistTable_18_3_15,NewDistTable_31_1_30,NewDistTable_22_5_17,NewDistTable_21_1_20,NewDistTable_14_5_9,StopTable_5_15,DistStation_21,NewDistTable_5_2_3,NewDistTable_6_2_4,NewDistTable_3_1_2,NewDistTable_25_3_22,NewDistTable_27_4_23,NewDistTable_18_1_17,NewDistTable_18_2_16,NewDistTable_28_4_24,NewDistTable_28_2_26,NewDistTable_24_1_23,NewDistTable_17_3_14,NewDistTable_10_4_6,NewDistTable_24_5_19,NewDistTable_37_2_35,DistStation_18,NewDistTable_38_1_37,NewDistTable_25_5_20,NewDistTable_33_2_31,NewDistTable_29_4_25,NewDistTable_12_4_8,NewDistTable_34_3_31,
May 20, 2018 11:02:22 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 210 constant variables :DistStation_37=1, NewDistTable_22_4_18=1, NewDistTable_13_2_11=1, NewDistTable_7_3_4=1, DistStation_33=1, NewDistTable_26_5_21=1, DistStation_30=1, NewDistTable_3_2_1=1, NewDistTable_13_1_12=1, NewDistTable_23_3_20=1, NewDistTable_26_4_22=1, NewDistTable_39_1_38=1, NewDistTable_20_3_17=1, NewDistTable_36_3_33=1, NewDistTable_17_2_15=1, NewDistTable_4_1_3=1, NewDistTable_12_5_7=1, NewDistTable_29_5_24=1, NewDistTable_9_1_8=1, NewDistTable_30_2_28=1, NewDistTable_21_2_19=1, NewDistTable_33_1_32=1, NewDistTable_18_4_14=1, NewDistTable_21_5_16=1, DistStation_32=1, NewDistTable_6_1_5=1, NewDistTable_15_4_11=1, NewDistTable_17_1_16=1, NewDistTable_15_1_14=1, NewDistTable_4_3_1=1, NewDistTable_24_3_21=1, NewDistTable_35_1_34=1, NewDistTable_28_1_27=1, NewDistTable_36_2_34=1, NewDistTable_26_3_23=1, NewDistTable_19_2_17=1, NewDistTable_8_4_4=1, NewDistTable_27_5_22=1, DistStation_39=1, NewDistTable_26_2_24=1, NewDistTable_23_5_18=1, NewDistTable_16_5_11=1, NewDistTable_29_2_27=1, NewDistTable_30_4_26=1, NewDistTable_40_2_38=1, NewDistTable_31_5_26=1, NewDistTable_25_4_21=1, NewDistTable_15_5_10=1, NewDistTable_32_3_29=1, NewDistTable_38_3_35=1, DistStation_23=1, NewDistTable_26_1_25=1, NewDistTable_29_3_26=1, DistStation_10=1, NewDistTable_22_3_19=1, NewDistTable_33_5_28=1, DistStation_34=1, NewDistTable_39_2_37=1, NewDistTable_14_2_12=1, NewDistTable_16_3_13=1, NewDistTable_11_3_8=1, NewDistTable_34_2_32=1, NewDistTable_4_2_2=1, DistStation_20=1, NewDistTable_24_4_20=1, NewDistTable_8_3_5=1, NewDistTable_34_4_30=1, NewDistTable_19_1_18=1, NewDistTable_22_2_20=1, NewDistTable_30_3_27=1, DistStation_16=1, NewDistTable_18_5_13=1, NewDistTable_35_2_33=1, DistStation_11=1, NewDistTable_11_5_6=1, DistStation_7=1, NewDistTable_20_5_15=1, NewDistTable_25_2_23=1, StopTable_4_10=1, NewDistTable_39_3_36=1, NewDistTable_22_1_21=1, NewDistTable_32_5_27=1, NewDistTable_11_2_9=1, NewDistTable_6_3_3=1, NewDistTable_9_3_6=1, DistStation_40=1, NewDistTable_19_5_14=1, StopTable_2_3=1, NewDistTable_35_3_32=1, NewDistTable_17_5_12=1, NewDistTable_7_1_6=1, NewDistTable_7_2_5=1, DistStation_12=1, DistStation_29=1, NewDistTable_16_2_14=1, DistStation_22=1, NewDistTable_25_1_24=1, NewDistTable_29_1_28=1, NewDistTable_11_1_10=1, NewDistTable_20_1_19=1, DistStation_14=1, NewDistTable_14_4_10=1, DistStation_6=1, NewDistTable_5_1_4=1, NewDistTable_37_4_33=1, NewDistTable_28_3_25=1, NewDistTable_31_3_28=1, DistStation_8=1, DistStation_5=1, NewDistTable_23_4_19=1, NewDistTable_13_5_8=1, NewDistTable_24_2_22=1, NewDistTable_15_2_13=1, NewDistTable_16_4_12=1, NewDistTable_31_4_27=1, NewDistTable_23_2_21=1, NewDistTable_28_5_23=1, NewDistTable_12_3_9=1, DistStation_38=1, DistStation_15=1, NewDistTable_37_3_34=1, NewDistTable_9_4_5=1, DistStation_9=1, NewDistTable_10_2_8=1, NewDistTable_20_2_18=1, NewDistTable_20_4_16=1, NewDistTable_11_4_7=1, NewDistTable_40_1_39=1, NewDistTable_38_2_36=1, NewDistTable_14_1_13=1, DistStation_17=1, NewDistTable_8_1_7=1, DistStation_19=1, NewDistTable_30_5_25=1, NewDistTable_30_1_29=1, DistStation_27=1, StopTable_1_1=1, NewDistTable_10_3_7=1, NewDistTable_12_2_10=1, DistStation_26=1, DistStation_28=1, NewDistTable_17_4_13=1, NewDistTable_33_3_30=1, DistStation_36=1, NewDistTable_31_2_29=1, NewDistTable_27_2_25=1, NewDistTable_27_1_26=1, NewDistTable_32_2_30=1, DistStation_25=1, DistStation_31=1, NewDistTable_15_3_12=1, NewDistTable_35_4_31=1, NewDistTable_33_4_29=1, NewDistTable_13_4_9=1, NewDistTable_27_3_24=1, NewDistTable_34_1_33=1, NewDistTable_2_2_0=1, NewDistTable_34_5_29=1, NewDistTable_9_2_7=1, DistStation_35=1, NewDistTable_7_4_3=1, StopTable_3_6=1, NewDistTable_21_3_18=1, NewDistTable_13_3_10=1, NewDistTable_16_1_15=1, NewDistTable_37_1_36=1, NewDistTable_19_3_16=1, NewDistTable_12_1_11=1, NewDistTable_36_4_32=1, NewDistTable_21_4_17=1, NewDistTable_10_1_9=1, NewDistTable_2_1_1=1, NewDistTable_5_3_2=1, NewDistTable_19_4_15=1, DistStation_24=1, NewDistTable_23_1_22=1, DistStation_13=1, NewDistTable_36_1_35=1, NewDistTable_32_1_31=1, NewDistTable_8_2_6=1, NewDistTable_14_3_11=1, NewDistTable_32_4_28=1, NewDistTable_18_3_15=1, NewDistTable_31_1_30=1, NewDistTable_22_5_17=1, NewDistTable_21_1_20=1, NewDistTable_14_5_9=1, StopTable_5_15=1, DistStation_21=1, NewDistTable_5_2_3=1, NewDistTable_6_2_4=1, NewDistTable_3_1_2=1, NewDistTable_25_3_22=1, NewDistTable_27_4_23=1, NewDistTable_18_1_17=1, NewDistTable_18_2_16=1, NewDistTable_28_4_24=1, NewDistTable_28_2_26=1, NewDistTable_24_1_23=1, NewDistTable_17_3_14=1, NewDistTable_10_4_6=1, NewDistTable_24_5_19=1, NewDistTable_37_2_35=1, DistStation_18=1, NewDistTable_38_1_37=1, NewDistTable_25_5_20=1, NewDistTable_33_2_31=1, NewDistTable_29_4_25=1, NewDistTable_12_4_8=1, NewDistTable_34_3_31=1
May 20, 2018 11:02:22 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 3870 expressions due to constant valuations.
May 20, 2018 11:02:22 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 784 ms
May 20, 2018 11:02:22 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 280 ms
May 20, 2018 11:02:22 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 280 ms
May 20, 2018 11:02:23 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 93 ms
May 20, 2018 11:02:23 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 25 ms
May 20, 2018 11:02:23 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1010 transitions.
May 20, 2018 11:02:23 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1010 transitions.
May 20, 2018 11:02:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, invariant/never predicate is unrealizable BART-PT-005-ReachabilityCardinality-01
May 20, 2018 11:02:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 1 / 12 in 1768 ms.
May 20, 2018 11:02:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-00(UNSAT) depth K=0 took 88 ms
May 20, 2018 11:02:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-05(UNSAT) depth K=0 took 43 ms
May 20, 2018 11:02:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-06(UNSAT) depth K=0 took 39 ms
May 20, 2018 11:02:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-08(UNSAT) depth K=0 took 12 ms
May 20, 2018 11:02:24 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 5 place invariants in 795 ms
May 20, 2018 11:02:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-09(UNSAT) depth K=0 took 16 ms
May 20, 2018 11:02:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-10(UNSAT) depth K=0 took 13 ms
May 20, 2018 11:02:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-11(UNSAT) depth K=0 took 45 ms
May 20, 2018 11:02:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-12(UNSAT) depth K=0 took 13 ms
May 20, 2018 11:02:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-13(UNSAT) depth K=0 took 8 ms
May 20, 2018 11:02:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-14(UNSAT) depth K=0 took 11 ms
May 20, 2018 11:02:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-15(UNSAT) depth K=0 took 12 ms
May 20, 2018 11:02:25 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1010 transitions.
May 20, 2018 11:02:25 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 5 place invariants in 302 ms
May 20, 2018 11:02:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-00(UNSAT) depth K=1 took 3621 ms
May 20, 2018 11:02:30 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 660 variables to be positive in 5262 ms
May 20, 2018 11:02:30 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 660 variables to be positive in 6866 ms
May 20, 2018 11:02:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1010 transitions.
May 20, 2018 11:02:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1010 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 20, 2018 11:02:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 160 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 20, 2018 11:02:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1010 transitions.
May 20, 2018 11:02:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 69 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 20, 2018 11:02:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-05(UNSAT) depth K=1 took 3405 ms
May 20, 2018 11:02:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-06(UNSAT) depth K=1 took 3376 ms
May 20, 2018 11:02:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-08(UNSAT) depth K=1 took 169 ms
May 20, 2018 11:02:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-09(UNSAT) depth K=1 took 175 ms
May 20, 2018 11:02:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-10(UNSAT) depth K=1 took 321 ms
May 20, 2018 11:02:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-11(UNSAT) depth K=1 took 186 ms
May 20, 2018 11:02:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-12(UNSAT) depth K=1 took 158 ms
May 20, 2018 11:02:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-13(UNSAT) depth K=1 took 171 ms
May 20, 2018 11:02:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-14(UNSAT) depth K=1 took 158 ms
May 20, 2018 11:02:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property BART-PT-005-ReachabilityCardinality-15(UNSAT) depth K=1 took 164 ms
May 20, 2018 11:14:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1010 transitions.
May 20, 2018 11:14:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/1010) took 1717 ms. Total solver calls (SAT/UNSAT): 201(0/201)
May 20, 2018 11:14:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/1010) took 5159 ms. Total solver calls (SAT/UNSAT): 603(0/603)
May 20, 2018 11:14:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/1010) took 8597 ms. Total solver calls (SAT/UNSAT): 1005(0/1005)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
May 20, 2018 11:14:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/1010) took 11918 ms. Total solver calls (SAT/UNSAT): 1206(36/1170)
May 20, 2018 11:14:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 12071 ms. Total solver calls (SAT/UNSAT): 1206(36/1170)
May 20, 2018 11:14:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 1010 transitions.
May 20, 2018 11:15:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 15593 ms. Total solver calls (SAT/UNSAT): 1718(0/1718)
May 20, 2018 11:15:01 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 758742ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-005"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-005.tgz
mv BART-PT-005 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is BART-PT-005, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r032-ebro-152646309900068"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;