About the Execution of ITS-Tools.L for AutoFlight-PT-12a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15756.470 | 20317.00 | 23214.00 | 4336.10 | T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.........................
/home/mcc/execution
total 256K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.5K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 108 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 346 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 85K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is AutoFlight-PT-12a, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r021-qhx1-152646246300139
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-12a-ReachabilityDeadlock-0
=== Now, execution of the tool begins
BK_START 1527231453849
Flatten gal took : 176 ms
Constant places removed 1 places and 1 transitions.
Reduce isomorphic transitions removed 60 transitions.
Performed 60 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 121 rules applied. Total rules applied 121 place count 306 transition count 184
Constant places removed 84 places and 0 transitions.
Performed 60 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 144 rules applied. Total rules applied 265 place count 222 transition count 124
Constant places removed 60 places and 0 transitions.
Iterating post reduction 2 with 60 rules applied. Total rules applied 325 place count 162 transition count 124
Performed 12 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 3 with 12 Pre rules applied. Total rules applied 325 place count 162 transition count 112
Constant places removed 24 places and 0 transitions.
Performed 12 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 36 rules applied. Total rules applied 361 place count 138 transition count 100
Constant places removed 12 places and 0 transitions.
Iterating post reduction 4 with 12 rules applied. Total rules applied 373 place count 126 transition count 100
Applied a total of 373 rules in 68 ms. Remains 126 /307 variables (removed 181) and now considering 100/305 (removed 205) transitions.
// Phase 1: matrix 100 rows 126 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
its-ctl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 100 rows 126 cols
No direction supplied, using forward translation only.
built 62 ordering constraints for composite.
invariant :p233 + p234 + p235 + p238 = 1
invariant :p287 + p288 + p289 + p292 = 1
invariant :p32 + p34 = 1
invariant :p67 + p69 = 1
invariant :p183 + p220 + p221 + p222 + p223 + p224 + p225 + p226 + p227 + p228 + p229 + p230 + p231 + p232 = 1
invariant :p50 + p52 = 1
invariant :p4 + p6 = 1
invariant :p43 + p45 = 1
invariant :p57 + p59 = 1
invariant :p121 + p170 + p171 + p172 + p173 + p174 + p175 + p176 + p177 + p178 + p179 + p180 + p181 + -1'p232 + -1'p238 + -1'p244 + -1'p250 + -1'p256 + -1'p262 + -1'p268 + -1'p274 + -1'p280 + -1'p286 + -1'p292 + -1'p298 + -1'p304 + -1'p306 = -13
invariant :p8 + p10 = 1
invariant :p257 + p258 + p259 + p262 = 1
invariant :p251 + p252 + p253 + p256 = 1
invariant :p11 + p13 = 1
invariant :p263 + p264 + p265 + p268 = 1
invariant :p245 + p246 + p247 + p250 = 1
invariant :p46 + p48 = 1
invariant :p15 + p17 = 1
invariant :p53 + p55 = 1
invariant :p281 + p282 + p283 + p286 = 1
invariant :p182 + p232 + p238 + p244 + p250 + p256 + p262 + p268 + p274 + p280 + p286 + p292 + p298 + p304 + p306 = 14
invariant :p39 + p41 = 1
invariant :p60 + p62 = 1
invariant :p81 + p83 = 1
invariant :p269 + p270 + p271 + p274 = 1
invariant :p22 + p24 = 1
invariant :p1 + p3 = 1
invariant :p299 + p300 + p301 + p304 = 1
invariant :p239 + p240 + p241 + p244 = 1
invariant :p78 + p80 = 1
invariant :p36 + p38 = 1
invariant :p25 + p27 = 1
invariant :p293 + p294 + p295 + p298 = 1
invariant :p64 + p66 = 1
invariant :p74 + p76 = 1
invariant :p305 + p306 = 1
invariant :p29 + p31 = 1
invariant :p275 + p276 + p277 + p280 = 1
invariant :p71 + p73 = 1
invariant :p18 + p20 = 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,1.05696e+09,0.116168,5496,83,33,968,474,274,1093,74,954,0
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,24,0.133612,5496,81,21,1124,530,722,1206,261,1189,2678
System contains 24 deadlocks (shown below if less than --print-limit option) !
FORMULA AutoFlight-PT-12a-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 24 states ] showing 10 first states
[ u74={[ p304=1 ]
} u73={[ p298=1 ]
} u35={[ p81=1 ]
} u72={[ p292=1 ]
} u32={[ p74=1 ]
} u29={[ p67=1 ]
} u71={[ p286=1 ]
} u26={[ p60=1 ]
} u34={[ p78=1 ]
} u70={[ p280=1 ]
} u31={[ p71=1 ]
} u23={[ p53=1 ]
} u28={[ p64=1 ]
} u25={[ p57=1 ]
} u75={[ p306=1 ]
} u69={[ p274=1 ]
} u22={[ p50=1 ]
} u20={[ p46=1 ]
} u62={[ p232=1 ]
} u68={[ p268=1 ]
} u17={[ p39=1 ]
} u19={[ p43=1 ]
} u14={[ p32=1 ]
} u67={[ p262=1 ]
} u16={[ p36=1 ]
} u61={[ p182=1 ]
} u11={[ p25=1 ]
} u66={[ p256=1 ]
} u13={[ p29=1 ]
} u8={[ p18=1 ]
} u65={[ p250=1 ]
} u10={[ p22=1 ]
} u5={[ p11=1 ]
} u64={[ p244=1 ]
} u7={[ p15=1 ]
} u2={[ p4=1 ]
} u63={[ p234=1 ]
[ p235=1 ]
} u4={[ p8=1 ]
} u1={[ p1=1 ]
} ]
[ u74={[ p304=1 ]
} u73={[ p298=1 ]
} u35={[ p81=1 ]
} u72={[ p292=1 ]
} u32={[ p74=1 ]
} u29={[ p67=1 ]
} u71={[ p286=1 ]
} u26={[ p60=1 ]
} u34={[ p78=1 ]
} u70={[ p280=1 ]
} u31={[ p71=1 ]
} u23={[ p53=1 ]
} u28={[ p64=1 ]
} u25={[ p57=1 ]
} u75={[ p306=1 ]
} u69={[ p274=1 ]
} u22={[ p50=1 ]
} u20={[ p46=1 ]
} u62={[ p232=1 ]
} u68={[ p268=1 ]
} u17={[ p39=1 ]
} u19={[ p43=1 ]
} u14={[ p32=1 ]
} u67={[ p262=1 ]
} u16={[ p36=1 ]
} u61={[ p182=1 ]
} u11={[ p25=1 ]
} u66={[ p256=1 ]
} u13={[ p29=1 ]
} u8={[ p18=1 ]
} u65={[ p250=1 ]
} u10={[ p22=1 ]
} u5={[ p11=1 ]
} u64={[ p240=1 ]
[ p241=1 ]
} u7={[ p15=1 ]
} u2={[ p4=1 ]
} u63={[ p238=1 ]
} u4={[ p8=1 ]
} u1={[ p1=1 ]
} ]
[ u74={[ p304=1 ]
} u73={[ p298=1 ]
} u35={[ p81=1 ]
} u72={[ p292=1 ]
} u32={[ p74=1 ]
} u29={[ p67=1 ]
} u71={[ p286=1 ]
} u26={[ p60=1 ]
} u34={[ p78=1 ]
} u70={[ p280=1 ]
} u31={[ p71=1 ]
} u23={[ p53=1 ]
} u28={[ p64=1 ]
} u25={[ p57=1 ]
} u75={[ p306=1 ]
} u69={[ p274=1 ]
} u22={[ p50=1 ]
} u20={[ p46=1 ]
} u62={[ p232=1 ]
} u68={[ p268=1 ]
} u17={[ p39=1 ]
} u19={[ p43=1 ]
} u14={[ p32=1 ]
} u67={[ p262=1 ]
} u16={[ p36=1 ]
} u61={[ p182=1 ]
} u11={[ p25=1 ]
} u66={[ p256=1 ]
} u13={[ p29=1 ]
} u8={[ p18=1 ]
} u65={[ p246=1 ]
[ p247=1 ]
} u10={[ p22=1 ]
} u5={[ p11=1 ]
} u64={[ p244=1 ]
} u7={[ p15=1 ]
} u2={[ p4=1 ]
} u63={[ p238=1 ]
} u4={[ p8=1 ]
} u1={[ p1=1 ]
} ]
[ u74={[ p304=1 ]
} u73={[ p298=1 ]
} u35={[ p81=1 ]
} u72={[ p292=1 ]
} u32={[ p74=1 ]
} u29={[ p67=1 ]
} u71={[ p286=1 ]
} u26={[ p60=1 ]
} u34={[ p78=1 ]
} u70={[ p280=1 ]
} u31={[ p71=1 ]
} u23={[ p53=1 ]
} u28={[ p64=1 ]
} u25={[ p57=1 ]
} u75={[ p306=1 ]
} u69={[ p274=1 ]
} u22={[ p50=1 ]
} u20={[ p46=1 ]
} u62={[ p232=1 ]
} u68={[ p268=1 ]
} u17={[ p39=1 ]
} u19={[ p43=1 ]
} u14={[ p32=1 ]
} u67={[ p262=1 ]
} u16={[ p36=1 ]
} u61={[ p182=1 ]
} u11={[ p25=1 ]
} u66={[ p252=1 ]
[ p253=1 ]
} u13={[ p29=1 ]
} u8={[ p18=1 ]
} u65={[ p250=1 ]
} u10={[ p22=1 ]
} u5={[ p11=1 ]
} u64={[ p244=1 ]
} u7={[ p15=1 ]
} u2={[ p4=1 ]
} u63={[ p238=1 ]
} u4={[ p8=1 ]
} u1={[ p1=1 ]
} ]
[ u74={[ p304=1 ]
} u73={[ p298=1 ]
} u35={[ p81=1 ]
} u72={[ p292=1 ]
} u32={[ p74=1 ]
} u29={[ p67=1 ]
} u71={[ p286=1 ]
} u26={[ p60=1 ]
} u34={[ p78=1 ]
} u70={[ p280=1 ]
} u31={[ p71=1 ]
} u23={[ p53=1 ]
} u28={[ p64=1 ]
} u25={[ p57=1 ]
} u75={[ p306=1 ]
} u69={[ p274=1 ]
} u22={[ p50=1 ]
} u20={[ p46=1 ]
} u62={[ p232=1 ]
} u68={[ p268=1 ]
} u17={[ p39=1 ]
} u19={[ p43=1 ]
} u14={[ p32=1 ]
} u67={[ p258=1 ]
[ p259=1 ]
} u16={[ p36=1 ]
} u61={[ p182=1 ]
} u11={[ p25=1 ]
} u66={[ p256=1 ]
} u13={[ p29=1 ]
} u8={[ p18=1 ]
} u65={[ p250=1 ]
} u10={[ p22=1 ]
} u5={[ p11=1 ]
} u64={[ p244=1 ]
} u7={[ p15=1 ]
} u2={[ p4=1 ]
} u63={[ p238=1 ]
} u4={[ p8=1 ]
} u1={[ p1=1 ]
} ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1527231474166
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 6:57:50 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 6:57:50 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 6:57:50 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 135 ms
May 25, 2018 6:57:50 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 307 places.
May 25, 2018 6:57:50 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 305 transitions.
May 25, 2018 6:57:50 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 25, 2018 6:57:51 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 32 ms
May 25, 2018 6:57:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 168 ms
May 25, 2018 6:57:51 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 15 ms
May 25, 2018 6:57:51 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 305 transitions.
May 25, 2018 6:57:52 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 25, 2018 6:57:52 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 29 ms
May 25, 2018 6:57:52 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 34 ms
May 25, 2018 6:57:52 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 25, 2018 6:57:52 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 100 transitions.
May 25, 2018 6:57:52 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 65 ms
May 25, 2018 6:57:52 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 25, 2018 6:57:52 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 26 redundant transitions.
May 25, 2018 6:57:52 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 7 ms
May 25, 2018 6:57:52 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 40 place invariants in 39 ms
May 25, 2018 6:57:52 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout :(error "Failed to check-sat")
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 6:57:52 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 548ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-12a"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-12a.tgz
mv AutoFlight-PT-12a execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is AutoFlight-PT-12a, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r021-qhx1-152646246300139"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;