Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
........................
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.9K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 108 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 346 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 956K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is AutoFlight-PT-48b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r020-qhx1-152646244500174
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-48b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1526871456545

Flatten gal took : 904 ms
Constant places removed 1 places and 1 transitions.
Performed 2628 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 2629 rules applied. Total rules applied 2629 place count 3949 transition count 1307
Constant places removed 2629 places and 1 transitions.
Reduce isomorphic transitions removed 192 transitions.
Performed 168 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 2989 rules applied. Total rules applied 5618 place count 1320 transition count 946
Constant places removed 168 places and 0 transitions.
Iterating post reduction 2 with 168 rules applied. Total rules applied 5786 place count 1152 transition count 946
Performed 205 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 3 with 205 Pre rules applied. Total rules applied 5786 place count 1152 transition count 741
Constant places removed 301 places and 0 transitions.
Performed 96 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 397 rules applied. Total rules applied 6183 place count 851 transition count 645
Constant places removed 96 places and 0 transitions.
Iterating post reduction 4 with 96 rules applied. Total rules applied 6279 place count 755 transition count 645
Performed 109 Post agglomeration using F-continuation condition.
Constant places removed 109 places and 0 transitions.
Iterating post reduction 5 with 109 rules applied. Total rules applied 6388 place count 646 transition count 536
Applied a total of 6388 rules in 4968 ms. Remains 646 /3950 variables (removed 3304) and now considering 536/3936 (removed 3400) transitions.
// Phase 1: matrix 536 rows 646 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 536 rows 646 cols
invariant :p1362 + p1368 + p1372 = 1
invariant :p1508 + p1513 = 1
invariant :p504 + p510 + p514 = 1
invariant :p3880 + p3882 + p3883 + p3887 = 1
invariant :p3693 + p3700 = 1
invariant :p3336 + p3338 + p3339 + p3343 = 1
invariant :p1430 + p1435 = 1
invariant :p1079 + p1084 = 1
invariant :p3421 + p3423 + p3424 + p3428 = 1
invariant :p756 + p761 = 1
invariant :p639 + p644 = 1
invariant :p231 + p237 + p241 = 1
invariant :p834 + p839 = 1
invariant :p1050 + p1056 + p1060 = 1
invariant :p816 + p822 + p826 = 1
invariant :p3455 + p3457 + p3458 + p3462 = 1
invariant :p1586 + p1591 = 1
invariant :p1235 + p1240 = 1
invariant :p366 + p371 = 1
invariant :p543 + p549 + p553 = 1
invariant :p1157 + p1162 = 1
invariant :p717 + p722 = 1
invariant :p455 + p460 = 1
invariant :p767 + p772 = 1
invariant :p1068 + p1073 = 1
invariant :p582 + p588 + p592 = 1
invariant :p621 + p627 + p631 = 1
invariant :p1497 + p1502 = 1
invariant :p1380 + p1385 = 1
invariant :p3676 + p3683 = 1
invariant :p3387 + p3389 + p3390 + p3394 = 1
invariant :p377 + p382 = 1
invariant :p1011 + p1017 + p1021 = 1
invariant :p699 + p705 + p709 = 1
invariant :p1536 + p1541 = 1
invariant :p426 + p432 + p436 = 1
invariant :p3897 + p3899 + p3900 + p3904 = 1
invariant :p3285 + p3287 + p3288 + p3292 = 1
invariant :p270 + p276 + p280 = 1
invariant :p1206 + p1212 + p1216 = 1
invariant :p3489 + p3491 + p3492 + p3496 = 1
invariant :p611 + p616 = 1
invariant :p3591 + p3598 = 1
invariant :p855 + p861 + p865 = 1
invariant :p1469 + p1474 = 1
invariant :p3574 + p3581 = 1
invariant :p387 + p393 + p397 = 1
invariant :p1263 + p1268 = 1
invariant :p912 + p917 = 1
invariant :p1440 + p1446 + p1450 = 1
invariant :p3778 + p3780 + p3781 + p3785 = 1
invariant :p990 + p995 = 1
invariant :p1479 + p1485 + p1489 = 1
invariant :p1518 + p1524 + p1528 = 1
invariant :p1029 + p1034 = 1
invariant :p1185 + p1190 = 1
invariant :p3006 + p3020 + p3021 + p3022 + p3023 + p3024 + p3025 + p3026 + p3027 + p3028 + p3029 + p3030 + p3031 + p3069 + p3070 + p3071 + p3072 + p3073 + p3074 + p3075 + p3076 + p3077 + p3078 + p3079 + p3080 + p3093 + p3094 + p3095 + p3096 + p3097 + p3098 + p3099 + p3100 + p3101 + p3102 + p3103 + p3104 + p3105 = 1
invariant :p1128 + p1134 + p1138 = 1
invariant :p3251 + p3253 + p3254 + p3258 = 1
invariant :p3846 + p3848 + p3849 + p3853 = 1
invariant :p3506 + p3508 + p3509 + p3513 = 1
invariant :p3761 + p3763 + p3764 + p3768 = 1
invariant :p1040 + p1045 = 1
invariant :p260 + p265 = 1
invariant :p806 + p811 = 1
invariant :p1284 + p1290 + p1294 = 1
invariant :p1274 + p1279 = 1
invariant :p465 + p471 + p475 = 1
invariant :p777 + p783 + p787 = 1
invariant :p845 + p850 = 1
invariant :p3863 + p3865 + p3866 + p3870 = 1
invariant :p444 + p449 = 1
invariant :p327 + p332 = 1
invariant :p1391 + p1396 = 1
invariant :p2880 + p2882 + p2883 + p2884 + p2885 + p2886 + p2887 + p2888 + p2889 + p2890 + p2891 + p2892 + p2893 + p2894 + p2895 + p2896 + p2897 + p2898 + p2899 + p2900 + p2901 + p2902 + p2903 + p2904 + p2905 + p2931 + p2932 + p2933 + p2934 + p2935 + p2936 + p2937 + p2938 + p2939 + p2940 + p2941 + p2942 + p2943 + p2944 + p2945 + p2946 + p2947 + p2948 + p2949 + p2950 + p2951 + p2952 + p2953 + p2954 + p2955 + p2956 + p2957 + p2958 + p2959 + p2960 + p2961 + p2962 + p2963 + p2964 + p2965 + p2966 + p2967 + p2968 + p2969 + p2970 + p2971 + p2972 + p2973 + p2974 + p2975 + p2976 + p2977 + p2978 + p2979 = 1
invariant :p3744 + p3746 + p3747 + p3751 = 1
invariant :p738 + p744 + p748 = 1
invariant :p962 + p967 = 1
invariant :p1167 + p1173 + p1177 = 1
invariant :p338 + p343 = 1
invariant :p678 + p683 = 1
invariant :p288 + p293 = 1
invariant :p3268 + p3270 + p3271 + p3275 = 1
invariant :p3642 + p3649 = 1
invariant :p650 + p655 = 1
invariant :p3659 + p3666 = 1
invariant :p689 + p694 = 1
invariant :p348 + p354 + p358 = 1
invariant :p728 + p733 = 1
invariant :p3217 + p3219 + p3220 + p3224 = 1
invariant :p1302 + p1307 = 1
invariant :p1341 + p1346 = 1
invariant :p572 + p577 = 1
invariant :p1401 + p1407 + p1411 = 1
invariant :p3438 + p3440 + p3441 + p3445 = 1
invariant :p309 + p315 + p319 = 1
invariant :p1458 + p1463 = 1
invariant :p972 + p978 + p982 = 1
invariant :p3404 + p3406 + p3407 + p3411 = 1
invariant :p1575 + p1580 = 1
invariant :p3727 + p3734 = 1
invariant :p3931 + p3933 + p3934 + p3938 = 1
invariant :p600 + p605 = 1
invariant :p1089 + p1095 + p1099 = 1
invariant :p2603 + p2803 + p2979 + p3105 + p3139 + p3156 + p3173 + p3190 + p3207 + p3224 + p3241 + p3258 + p3275 + p3292 + p3309 + p3326 + p3343 + p3360 + p3377 + p3394 + p3411 + p3428 + p3445 + p3462 + p3479 + p3496 + p3513 + p3530 + p3547 + p3564 + p3581 + p3598 + p3615 + p3632 + p3649 + p3666 + p3683 + p3700 + p3717 + p3734 + p3751 + p3768 + p3785 + p3802 + p3819 + p3836 + p3853 + p3870 + p3887 + p3904 + p3921 + p3938 + p3949 = 52
invariant :p894 + p900 + p904 = 1
invariant :p3557 + p3564 = 1
invariant :p3472 + p3474 + p3475 + p3479 = 1
invariant :p3540 + p3547 = 1
invariant :p873 + p878 = 1
invariant :p3234 + p3236 + p3237 + p3241 = 1
invariant :p522 + p527 = 1
invariant :p1118 + p1123 = 1
invariant :p561 + p566 = 1
invariant :p933 + p939 + p943 = 1
invariant :p1001 + p1006 = 1
invariant :p1557 + p1563 + p1567 = 1
invariant :p3710 + p3717 = 1
invariant :p1245 + p1251 + p1255 = 1
invariant :p3319 + p3321 + p3322 + p3326 = 1
invariant :p3812 + p3814 + p3815 + p3819 = 1
invariant :p660 + p666 + p670 = 1
invariant :p3795 + p3797 + p3798 + p3802 = 1
invariant :p405 + p410 = 1
invariant :p1323 + p1329 + p1333 = 1
invariant :p483 + p488 = 1
invariant :p1224 + p1229 = 1
invariant :p3370 + p3372 + p3373 + p3377 = 1
invariant :p951 + p956 = 1
invariant :p923 + p928 = 1
invariant :p1596 + p1602 + p1606 = 1
invariant :p3829 + p3831 + p3832 + p3836 = 1
invariant :p299 + p304 = 1
invariant :p533 + p538 = 1
invariant :p249 + p254 = 1
invariant :p1146 + p1151 = 1
invariant :p1313 + p1318 = 1
invariant :p210 + p215 = 1
invariant :p795 + p800 = 1
invariant :p3166 + p3168 + p3169 + p3173 = 1
invariant :p3149 + p3151 + p3152 + p3156 = 1
invariant :p3608 + p3615 = 1
invariant :p3625 + p3632 = 1
invariant :p1419 + p1424 = 1
invariant :p494 + p499 = 1
invariant :p3914 + p3916 + p3917 + p3921 = 1
invariant :p3353 + p3355 + p3356 + p3360 = 1
invariant :p3183 + p3185 + p3186 + p3190 = 1
invariant :p884 + p889 = 1
invariant :p2680 + p2694 + p2695 + p2696 + p2697 + p2698 + p2699 + p2700 + p2701 + p2702 + p2703 + p2704 + p2705 + p2767 + p2768 + p2769 + p2770 + p2771 + p2772 + p2773 + p2774 + p2775 + p2776 + p2777 + p2778 + p2791 + p2792 + p2793 + p2794 + p2795 + p2796 + p2797 + p2798 + p2799 + p2800 + p2801 + p2802 + p2803 = 1
invariant :p1107 + p1112 = 1
invariant :p416 + p421 = 1
invariant :p3132 + p3134 + p3135 + p3139 = 1
invariant :p3946 + p3949 = 1
invariant :p1196 + p1201 = 1
invariant :p221 + p226 = 1
invariant :p2480 + p2482 + p2483 + p2484 + p2485 + p2486 + p2487 + p2488 + p2489 + p2490 + p2491 + p2492 + p2493 + p2494 + p2495 + p2496 + p2497 + p2498 + p2499 + p2500 + p2501 + p2502 + p2503 + p2504 + p2505 + p2555 + p2556 + p2557 + p2558 + p2559 + p2560 + p2561 + p2562 + p2563 + p2564 + p2565 + p2566 + p2567 + p2568 + p2569 + p2570 + p2571 + p2572 + p2573 + p2574 + p2575 + p2576 + p2577 + p2578 + p2579 + p2580 + p2581 + p2582 + p2583 + p2584 + p2585 + p2586 + p2587 + p2588 + p2589 + p2590 + p2591 + p2592 + p2593 + p2594 + p2595 + p2596 + p2597 + p2598 + p2599 + p2600 + p2601 + p2602 + -1'p2803 + -1'p2979 + -1'p3105 + -1'p3139 + -1'p3156 + -1'p3173 + -1'p3190 + -1'p3207 + -1'p3224 + -1'p3241 + -1'p3258 + -1'p3275 + -1'p3292 + -1'p3309 + -1'p3326 + -1'p3343 + -1'p3360 + -1'p3377 + -1'p3394 + -1'p3411 + -1'p3428 + -1'p3445 + -1'p3462 + -1'p3479 + -1'p3496 + -1'p3513 + -1'p3530 + -1'p3547 + -1'p3564 + -1'p3581 + -1'p3598 + -1'p3615 + -1'p3632 + -1'p3649 + -1'p3666 + -1'p3683 + -1'p3700 + -1'p3717 + -1'p3734 + -1'p3751 + -1'p3768 + -1'p3785 + -1'p3802 + -1'p3819 + -1'p3836 + -1'p3853 + -1'p3870 + -1'p3887 + -1'p3904 + -1'p3921 + -1'p3938 + -1'p3949 = -51
invariant :p3200 + p3202 + p3203 + p3207 = 1
invariant :p3302 + p3304 + p3305 + p3309 = 1
invariant :p1352 + p1357 = 1
invariant :p3523 + p3525 + p3526 + p3530 = 1
invariant :p1547 + p1552 = 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,2.41701e+41,9.1461,118372,2,69943,5,419259,6,0,3123,395008,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,1.23695e+13,213.072,2250276,2,6195,7,1.29193e+07,9,1,13666,455555,2

System contains 1.23695e+13 deadlocks (shown below if less than --print-limit option) !
FORMULA AutoFlight-PT-48b-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 12369505812480 states ] showing 10 first states
[ p1469=1 p1508=1 p1430=1 p1497=1 p1458=1 p1391=1 p1419=1 p1352=1 p1547=1 p1380=1 p1536=1 p1341=1 p1313=1 p1302=1 p1274=1 p1263=1 p1586=1 p1235=1 p1575=1 p1224=1 p1118=1 p1107=1 p1079=1 p1068=1 p1196=1 p3904=1 p3887=1 p3870=1 p3853=1 p3921=1 p1185=1 p3836=1 p3819=1 p3802=1 p3938=1 p3785=1 p3530=1 p3513=1 p3768=1 p3734=1 p3717=1 p3700=1 p3683=1 p3666=1 p3649=1 p3632=1 p3615=1 p3598=1 p3581=1 p3564=1 p3547=1 p3949=1 p1040=1 p3105=1 p3479=1 p2803=1 p3751=1 p3491=1 p3462=1 p2979=1 p3445=1 p2603=1 p3428=1 p3411=1 p3394=1 p3377=1 p3360=1 p3343=1 p3326=1 p3309=1 p1029=1 p3292=1 p3275=1 p3258=1 p3241=1 p3224=1 p3207=1 p3190=1 p3173=1 p3156=1 p3139=1 p1001=1 p990=1 p1157=1 p962=1 p951=1 p1146=1 p923=1 p912=1 p884=1 p845=1 p873=1 p806=1 p834=1 p767=1 p795=1 p728=1 p756=1 p689=1 p717=1 p650=1 p678=1 p611=1 p639=1 p572=1 p600=1 p533=1 p561=1 p494=1 p522=1 p455=1 p483=1 p416=1 p444=1 p377=1 p405=1 p366=1 p338=1 p327=1 p299=1 p288=1 p260=1 p1602=1 p249=1 p1173=1 p221=1 p210=1 p1563=1 p1524=1 p1212=1 p1485=1 p1446=1 p1251=1 p237=1 p1407=1 p1368=1 p1290=1 p1134=1 p1329=1 p1095=1 p276=1 p1056=1 p1017=1 p978=1 p939=1 p900=1 p315=1 p861=1 p822=1 p783=1 p744=1 p705=1 p354=1 p666=1 p627=1 p588=1 p549=1 p393=1 p510=1 p471=1 p432=1 ]
[ p1469=1 p1508=1 p1430=1 p1497=1 p1458=1 p1391=1 p1419=1 p1352=1 p1547=1 p1380=1 p1536=1 p1341=1 p1313=1 p1302=1 p1274=1 p1263=1 p1586=1 p1235=1 p1575=1 p1224=1 p1118=1 p1107=1 p1079=1 p1068=1 p1196=1 p3904=1 p3887=1 p3870=1 p3853=1 p3921=1 p1185=1 p3836=1 p3819=1 p3802=1 p3938=1 p3785=1 p3530=1 p3513=1 p3768=1 p3734=1 p3717=1 p3700=1 p3683=1 p3666=1 p3649=1 p3632=1 p3615=1 p3598=1 p3581=1 p3564=1 p3547=1 p3949=1 p1040=1 p3105=1 p3479=1 p2803=1 p3751=1 p3491=1 p3462=1 p2979=1 p3445=1 p2603=1 p3428=1 p3411=1 p3394=1 p3377=1 p3360=1 p3343=1 p3326=1 p3309=1 p1029=1 p3292=1 p3275=1 p3258=1 p3241=1 p3224=1 p3207=1 p3190=1 p3173=1 p3156=1 p3139=1 p1001=1 p990=1 p1157=1 p962=1 p951=1 p1146=1 p923=1 p912=1 p884=1 p845=1 p873=1 p806=1 p834=1 p767=1 p795=1 p728=1 p756=1 p689=1 p717=1 p650=1 p678=1 p611=1 p639=1 p572=1 p600=1 p533=1 p561=1 p494=1 p522=1 p455=1 p483=1 p416=1 p444=1 p377=1 p405=1 p366=1 p338=1 p327=1 p299=1 p288=1 p260=1 p1602=1 p249=1 p1173=1 p221=1 p210=1 p1563=1 p1524=1 p1212=1 p1485=1 p1446=1 p1251=1 p237=1 p1407=1 p1368=1 p1290=1 p1134=1 p1329=1 p1095=1 p276=1 p1056=1 p1017=1 p978=1 p939=1 p900=1 p315=1 p861=1 p822=1 p783=1 p744=1 p705=1 p354=1 p666=1 p627=1 p588=1 p549=1 p393=1 p510=1 p471=1 p426=1 ]
[ p1469=1 p1508=1 p1430=1 p1497=1 p1458=1 p1391=1 p1419=1 p1352=1 p1547=1 p1380=1 p1536=1 p1341=1 p1313=1 p1302=1 p1274=1 p1263=1 p1586=1 p1235=1 p1575=1 p1224=1 p1118=1 p1107=1 p1079=1 p1068=1 p1196=1 p3904=1 p3887=1 p3870=1 p3853=1 p3921=1 p1185=1 p3836=1 p3819=1 p3802=1 p3938=1 p3785=1 p3530=1 p3513=1 p3768=1 p3734=1 p3717=1 p3700=1 p3683=1 p3666=1 p3649=1 p3632=1 p3615=1 p3598=1 p3581=1 p3564=1 p3547=1 p3949=1 p1040=1 p3105=1 p3479=1 p2803=1 p3751=1 p3491=1 p3462=1 p2979=1 p3445=1 p2603=1 p3428=1 p3411=1 p3394=1 p3377=1 p3360=1 p3343=1 p3326=1 p3309=1 p1029=1 p3292=1 p3275=1 p3258=1 p3241=1 p3224=1 p3207=1 p3190=1 p3173=1 p3156=1 p3139=1 p1001=1 p990=1 p1157=1 p962=1 p951=1 p1146=1 p923=1 p912=1 p884=1 p845=1 p873=1 p806=1 p834=1 p767=1 p795=1 p728=1 p756=1 p689=1 p717=1 p650=1 p678=1 p611=1 p639=1 p572=1 p600=1 p533=1 p561=1 p494=1 p522=1 p455=1 p483=1 p416=1 p444=1 p377=1 p405=1 p366=1 p338=1 p327=1 p299=1 p288=1 p260=1 p1602=1 p249=1 p1173=1 p221=1 p210=1 p1563=1 p1524=1 p1212=1 p1485=1 p1446=1 p1251=1 p237=1 p1407=1 p1368=1 p1290=1 p1134=1 p1329=1 p1095=1 p276=1 p1056=1 p1017=1 p978=1 p939=1 p900=1 p315=1 p861=1 p822=1 p783=1 p744=1 p705=1 p354=1 p666=1 p627=1 p588=1 p549=1 p393=1 p510=1 p465=1 p432=1 ]
[ p1469=1 p1508=1 p1430=1 p1497=1 p1458=1 p1391=1 p1419=1 p1352=1 p1547=1 p1380=1 p1536=1 p1341=1 p1313=1 p1302=1 p1274=1 p1263=1 p1586=1 p1235=1 p1575=1 p1224=1 p1118=1 p1107=1 p1079=1 p1068=1 p1196=1 p3904=1 p3887=1 p3870=1 p3853=1 p3921=1 p1185=1 p3836=1 p3819=1 p3802=1 p3938=1 p3785=1 p3530=1 p3513=1 p3768=1 p3734=1 p3717=1 p3700=1 p3683=1 p3666=1 p3649=1 p3632=1 p3615=1 p3598=1 p3581=1 p3564=1 p3547=1 p3949=1 p1040=1 p3105=1 p3479=1 p2803=1 p3751=1 p3491=1 p3462=1 p2979=1 p3445=1 p2603=1 p3428=1 p3411=1 p3394=1 p3377=1 p3360=1 p3343=1 p3326=1 p3309=1 p1029=1 p3292=1 p3275=1 p3258=1 p3241=1 p3224=1 p3207=1 p3190=1 p3173=1 p3156=1 p3139=1 p1001=1 p990=1 p1157=1 p962=1 p951=1 p1146=1 p923=1 p912=1 p884=1 p845=1 p873=1 p806=1 p834=1 p767=1 p795=1 p728=1 p756=1 p689=1 p717=1 p650=1 p678=1 p611=1 p639=1 p572=1 p600=1 p533=1 p561=1 p494=1 p522=1 p455=1 p483=1 p416=1 p444=1 p377=1 p405=1 p366=1 p338=1 p327=1 p299=1 p288=1 p260=1 p1602=1 p249=1 p1173=1 p221=1 p210=1 p1563=1 p1524=1 p1212=1 p1485=1 p1446=1 p1251=1 p237=1 p1407=1 p1368=1 p1290=1 p1134=1 p1329=1 p1095=1 p276=1 p1056=1 p1017=1 p978=1 p939=1 p900=1 p315=1 p861=1 p822=1 p783=1 p744=1 p705=1 p354=1 p666=1 p627=1 p588=1 p549=1 p393=1 p510=1 p465=1 p426=1 ]
[ p1469=1 p1508=1 p1430=1 p1497=1 p1458=1 p1391=1 p1419=1 p1352=1 p1547=1 p1380=1 p1536=1 p1341=1 p1313=1 p1302=1 p1274=1 p1263=1 p1586=1 p1235=1 p1575=1 p1224=1 p1118=1 p1107=1 p1079=1 p1068=1 p1196=1 p3904=1 p3887=1 p3870=1 p3853=1 p3921=1 p1185=1 p3836=1 p3819=1 p3802=1 p3938=1 p3785=1 p3530=1 p3513=1 p3768=1 p3734=1 p3717=1 p3700=1 p3683=1 p3666=1 p3649=1 p3632=1 p3615=1 p3598=1 p3581=1 p3564=1 p3547=1 p3949=1 p1040=1 p3105=1 p3479=1 p2803=1 p3751=1 p3491=1 p3462=1 p2979=1 p3445=1 p2603=1 p3428=1 p3411=1 p3394=1 p3377=1 p3360=1 p3343=1 p3326=1 p3309=1 p1029=1 p3292=1 p3275=1 p3258=1 p3241=1 p3224=1 p3207=1 p3190=1 p3173=1 p3156=1 p3139=1 p1001=1 p990=1 p1157=1 p962=1 p951=1 p1146=1 p923=1 p912=1 p884=1 p845=1 p873=1 p806=1 p834=1 p767=1 p795=1 p728=1 p756=1 p689=1 p717=1 p650=1 p678=1 p611=1 p639=1 p572=1 p600=1 p533=1 p561=1 p494=1 p522=1 p455=1 p483=1 p416=1 p444=1 p377=1 p405=1 p366=1 p338=1 p327=1 p299=1 p288=1 p260=1 p1602=1 p249=1 p1173=1 p221=1 p210=1 p1563=1 p1524=1 p1212=1 p1485=1 p1446=1 p1251=1 p237=1 p1407=1 p1368=1 p1290=1 p1134=1 p1329=1 p1095=1 p276=1 p1056=1 p1017=1 p978=1 p939=1 p900=1 p315=1 p861=1 p822=1 p783=1 p744=1 p705=1 p354=1 p666=1 p627=1 p588=1 p549=1 p393=1 p504=1 p471=1 p432=1 ]
[ p1469=1 p1508=1 p1430=1 p1497=1 p1458=1 p1391=1 p1419=1 p1352=1 p1547=1 p1380=1 p1536=1 p1341=1 p1313=1 p1302=1 p1274=1 p1263=1 p1586=1 p1235=1 p1575=1 p1224=1 p1118=1 p1107=1 p1079=1 p1068=1 p1196=1 p3904=1 p3887=1 p3870=1 p3853=1 p3921=1 p1185=1 p3836=1 p3819=1 p3802=1 p3938=1 p3785=1 p3530=1 p3513=1 p3768=1 p3734=1 p3717=1 p3700=1 p3683=1 p3666=1 p3649=1 p3632=1 p3615=1 p3598=1 p3581=1 p3564=1 p3547=1 p3949=1 p1040=1 p3105=1 p3479=1 p2803=1 p3751=1 p3491=1 p3462=1 p2979=1 p3445=1 p2603=1 p3428=1 p3411=1 p3394=1 p3377=1 p3360=1 p3343=1 p3326=1 p3309=1 p1029=1 p3292=1 p3275=1 p3258=1 p3241=1 p3224=1 p3207=1 p3190=1 p3173=1 p3156=1 p3139=1 p1001=1 p990=1 p1157=1 p962=1 p951=1 p1146=1 p923=1 p912=1 p884=1 p845=1 p873=1 p806=1 p834=1 p767=1 p795=1 p728=1 p756=1 p689=1 p717=1 p650=1 p678=1 p611=1 p639=1 p572=1 p600=1 p533=1 p561=1 p494=1 p522=1 p455=1 p483=1 p416=1 p444=1 p377=1 p405=1 p366=1 p338=1 p327=1 p299=1 p288=1 p260=1 p1602=1 p249=1 p1173=1 p221=1 p210=1 p1563=1 p1524=1 p1212=1 p1485=1 p1446=1 p1251=1 p237=1 p1407=1 p1368=1 p1290=1 p1134=1 p1329=1 p1095=1 p276=1 p1056=1 p1017=1 p978=1 p939=1 p900=1 p315=1 p861=1 p822=1 p783=1 p744=1 p705=1 p354=1 p666=1 p627=1 p588=1 p549=1 p393=1 p504=1 p471=1 p426=1 ]
[ p1469=1 p1508=1 p1430=1 p1497=1 p1458=1 p1391=1 p1419=1 p1352=1 p1547=1 p1380=1 p1536=1 p1341=1 p1313=1 p1302=1 p1274=1 p1263=1 p1586=1 p1235=1 p1575=1 p1224=1 p1118=1 p1107=1 p1079=1 p1068=1 p1196=1 p3904=1 p3887=1 p3870=1 p3853=1 p3921=1 p1185=1 p3836=1 p3819=1 p3802=1 p3938=1 p3785=1 p3530=1 p3513=1 p3768=1 p3734=1 p3717=1 p3700=1 p3683=1 p3666=1 p3649=1 p3632=1 p3615=1 p3598=1 p3581=1 p3564=1 p3547=1 p3949=1 p1040=1 p3105=1 p3479=1 p2803=1 p3751=1 p3491=1 p3462=1 p2979=1 p3445=1 p2603=1 p3428=1 p3411=1 p3394=1 p3377=1 p3360=1 p3343=1 p3326=1 p3309=1 p1029=1 p3292=1 p3275=1 p3258=1 p3241=1 p3224=1 p3207=1 p3190=1 p3173=1 p3156=1 p3139=1 p1001=1 p990=1 p1157=1 p962=1 p951=1 p1146=1 p923=1 p912=1 p884=1 p845=1 p873=1 p806=1 p834=1 p767=1 p795=1 p728=1 p756=1 p689=1 p717=1 p650=1 p678=1 p611=1 p639=1 p572=1 p600=1 p533=1 p561=1 p494=1 p522=1 p455=1 p483=1 p416=1 p444=1 p377=1 p405=1 p366=1 p338=1 p327=1 p299=1 p288=1 p260=1 p1602=1 p249=1 p1173=1 p221=1 p210=1 p1563=1 p1524=1 p1212=1 p1485=1 p1446=1 p1251=1 p237=1 p1407=1 p1368=1 p1290=1 p1134=1 p1329=1 p1095=1 p276=1 p1056=1 p1017=1 p978=1 p939=1 p900=1 p315=1 p861=1 p822=1 p783=1 p744=1 p705=1 p354=1 p666=1 p627=1 p588=1 p549=1 p393=1 p504=1 p465=1 p432=1 ]
[ p1469=1 p1508=1 p1430=1 p1497=1 p1458=1 p1391=1 p1419=1 p1352=1 p1547=1 p1380=1 p1536=1 p1341=1 p1313=1 p1302=1 p1274=1 p1263=1 p1586=1 p1235=1 p1575=1 p1224=1 p1118=1 p1107=1 p1079=1 p1068=1 p1196=1 p3904=1 p3887=1 p3870=1 p3853=1 p3921=1 p1185=1 p3836=1 p3819=1 p3802=1 p3938=1 p3785=1 p3530=1 p3513=1 p3768=1 p3734=1 p3717=1 p3700=1 p3683=1 p3666=1 p3649=1 p3632=1 p3615=1 p3598=1 p3581=1 p3564=1 p3547=1 p3949=1 p1040=1 p3105=1 p3479=1 p2803=1 p3751=1 p3491=1 p3462=1 p2979=1 p3445=1 p2603=1 p3428=1 p3411=1 p3394=1 p3377=1 p3360=1 p3343=1 p3326=1 p3309=1 p1029=1 p3292=1 p3275=1 p3258=1 p3241=1 p3224=1 p3207=1 p3190=1 p3173=1 p3156=1 p3139=1 p1001=1 p990=1 p1157=1 p962=1 p951=1 p1146=1 p923=1 p912=1 p884=1 p845=1 p873=1 p806=1 p834=1 p767=1 p795=1 p728=1 p756=1 p689=1 p717=1 p650=1 p678=1 p611=1 p639=1 p572=1 p600=1 p533=1 p561=1 p494=1 p522=1 p455=1 p483=1 p416=1 p444=1 p377=1 p405=1 p366=1 p338=1 p327=1 p299=1 p288=1 p260=1 p1602=1 p249=1 p1173=1 p221=1 p210=1 p1563=1 p1524=1 p1212=1 p1485=1 p1446=1 p1251=1 p237=1 p1407=1 p1368=1 p1290=1 p1134=1 p1329=1 p1095=1 p276=1 p1056=1 p1017=1 p978=1 p939=1 p900=1 p315=1 p861=1 p822=1 p783=1 p744=1 p705=1 p354=1 p666=1 p627=1 p588=1 p549=1 p393=1 p504=1 p465=1 p426=1 ]
[ p1469=1 p1508=1 p1430=1 p1497=1 p1458=1 p1391=1 p1419=1 p1352=1 p1547=1 p1380=1 p1536=1 p1341=1 p1313=1 p1302=1 p1274=1 p1263=1 p1586=1 p1235=1 p1575=1 p1224=1 p1118=1 p1107=1 p1079=1 p1068=1 p1196=1 p3904=1 p3887=1 p3870=1 p3853=1 p3921=1 p1185=1 p3836=1 p3819=1 p3802=1 p3938=1 p3785=1 p3530=1 p3513=1 p3768=1 p3734=1 p3717=1 p3700=1 p3683=1 p3666=1 p3649=1 p3632=1 p3615=1 p3598=1 p3581=1 p3564=1 p3547=1 p3949=1 p1040=1 p3105=1 p3479=1 p2803=1 p3751=1 p3491=1 p3462=1 p2979=1 p3445=1 p2603=1 p3428=1 p3411=1 p3394=1 p3377=1 p3360=1 p3343=1 p3326=1 p3309=1 p1029=1 p3292=1 p3275=1 p3258=1 p3241=1 p3224=1 p3207=1 p3190=1 p3173=1 p3156=1 p3139=1 p1001=1 p990=1 p1157=1 p962=1 p951=1 p1146=1 p923=1 p912=1 p884=1 p845=1 p873=1 p806=1 p834=1 p767=1 p795=1 p728=1 p756=1 p689=1 p717=1 p650=1 p678=1 p611=1 p639=1 p572=1 p600=1 p533=1 p561=1 p494=1 p522=1 p455=1 p483=1 p416=1 p444=1 p377=1 p405=1 p366=1 p338=1 p327=1 p299=1 p288=1 p260=1 p1602=1 p249=1 p1173=1 p221=1 p210=1 p1563=1 p1524=1 p1212=1 p1485=1 p1446=1 p1251=1 p237=1 p1407=1 p1368=1 p1290=1 p1134=1 p1329=1 p1095=1 p276=1 p1056=1 p1017=1 p978=1 p939=1 p900=1 p315=1 p861=1 p822=1 p783=1 p744=1 p705=1 p354=1 p666=1 p627=1 p588=1 p549=1 p387=1 p510=1 p471=1 p432=1 ]
[ p1469=1 p1508=1 p1430=1 p1497=1 p1458=1 p1391=1 p1419=1 p1352=1 p1547=1 p1380=1 p1536=1 p1341=1 p1313=1 p1302=1 p1274=1 p1263=1 p1586=1 p1235=1 p1575=1 p1224=1 p1118=1 p1107=1 p1079=1 p1068=1 p1196=1 p3904=1 p3887=1 p3870=1 p3853=1 p3921=1 p1185=1 p3836=1 p3819=1 p3802=1 p3938=1 p3785=1 p3530=1 p3513=1 p3768=1 p3734=1 p3717=1 p3700=1 p3683=1 p3666=1 p3649=1 p3632=1 p3615=1 p3598=1 p3581=1 p3564=1 p3547=1 p3949=1 p1040=1 p3105=1 p3479=1 p2803=1 p3751=1 p3491=1 p3462=1 p2979=1 p3445=1 p2603=1 p3428=1 p3411=1 p3394=1 p3377=1 p3360=1 p3343=1 p3326=1 p3309=1 p1029=1 p3292=1 p3275=1 p3258=1 p3241=1 p3224=1 p3207=1 p3190=1 p3173=1 p3156=1 p3139=1 p1001=1 p990=1 p1157=1 p962=1 p951=1 p1146=1 p923=1 p912=1 p884=1 p845=1 p873=1 p806=1 p834=1 p767=1 p795=1 p728=1 p756=1 p689=1 p717=1 p650=1 p678=1 p611=1 p639=1 p572=1 p600=1 p533=1 p561=1 p494=1 p522=1 p455=1 p483=1 p416=1 p444=1 p377=1 p405=1 p366=1 p338=1 p327=1 p299=1 p288=1 p260=1 p1602=1 p249=1 p1173=1 p221=1 p210=1 p1563=1 p1524=1 p1212=1 p1485=1 p1446=1 p1251=1 p237=1 p1407=1 p1368=1 p1290=1 p1134=1 p1329=1 p1095=1 p276=1 p1056=1 p1017=1 p978=1 p939=1 p900=1 p315=1 p861=1 p822=1 p783=1 p744=1 p705=1 p354=1 p666=1 p627=1 p588=1 p549=1 p387=1 p510=1 p471=1 p426=1 ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1526871686299

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 21, 2018 2:57:39 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 21, 2018 2:57:39 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 21, 2018 2:57:40 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 435 ms
May 21, 2018 2:57:40 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3950 places.
May 21, 2018 2:57:40 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3936 transitions.
May 21, 2018 2:57:40 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 21, 2018 2:57:40 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 94 ms
May 21, 2018 2:57:41 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 893 ms
May 21, 2018 2:57:41 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 48 ms
May 21, 2018 2:57:42 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 3936 transitions.
May 21, 2018 2:57:48 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 9 ms
May 21, 2018 2:57:48 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 536 transitions.
May 21, 2018 2:57:49 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 162 place invariants in 160 ms
May 21, 2018 2:57:51 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 646 variables to be positive in 1565 ms
May 21, 2018 2:57:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 536 transitions.
May 21, 2018 2:57:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/536 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 21, 2018 2:57:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 93 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 21, 2018 2:57:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 536 transitions.
May 21, 2018 2:57:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 26 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 21, 2018 2:57:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 536 transitions.
May 21, 2018 2:58:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/536) took 28818 ms. Total solver calls (SAT/UNSAT): 211(123/88)
May 21, 2018 2:58:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1/536) took 49448 ms. Total solver calls (SAT/UNSAT): 421(245/176)
May 21, 2018 2:59:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/536) took 81526 ms. Total solver calls (SAT/UNSAT): 766(414/352)
May 21, 2018 2:59:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/536) took 84602 ms. Total solver calls (SAT/UNSAT): 987(533/454)
May 21, 2018 2:59:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(136/536) took 87616 ms. Total solver calls (SAT/UNSAT): 1197(646/551)
May 21, 2018 2:59:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(148/536) took 91353 ms. Total solver calls (SAT/UNSAT): 1407(785/622)
May 21, 2018 2:59:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(149/536) took 94564 ms. Total solver calls (SAT/UNSAT): 1579(903/676)
May 21, 2018 2:59:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(150/536) took 97975 ms. Total solver calls (SAT/UNSAT): 1750(1020/730)
May 21, 2018 2:59:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(151/536) took 101086 ms. Total solver calls (SAT/UNSAT): 1920(1136/784)
May 21, 2018 2:59:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(152/536) took 121343 ms. Total solver calls (SAT/UNSAT): 2089(1251/838)
May 21, 2018 2:59:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(154/536) took 128245 ms. Total solver calls (SAT/UNSAT): 2424(1478/946)
May 21, 2018 3:00:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(155/536) took 132271 ms. Total solver calls (SAT/UNSAT): 2590(1590/1000)
May 21, 2018 3:00:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(157/536) took 136496 ms. Total solver calls (SAT/UNSAT): 2919(1811/1108)
May 21, 2018 3:00:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(158/536) took 153042 ms. Total solver calls (SAT/UNSAT): 3082(1920/1162)
May 21, 2018 3:00:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(159/536) took 157507 ms. Total solver calls (SAT/UNSAT): 3244(2028/1216)
May 21, 2018 3:00:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(161/536) took 165311 ms. Total solver calls (SAT/UNSAT): 3565(2241/1324)
May 21, 2018 3:00:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/536) took 169225 ms. Total solver calls (SAT/UNSAT): 3724(2346/1378)
May 21, 2018 3:00:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(164/536) took 175088 ms. Total solver calls (SAT/UNSAT): 4039(2553/1486)
May 21, 2018 3:00:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(165/536) took 179137 ms. Total solver calls (SAT/UNSAT): 4195(2655/1540)
May 21, 2018 3:00:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(166/536) took 182619 ms. Total solver calls (SAT/UNSAT): 4350(2756/1594)
May 21, 2018 3:00:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(168/536) took 187997 ms. Total solver calls (SAT/UNSAT): 4657(2955/1702)
May 21, 2018 3:01:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(169/536) took 194214 ms. Total solver calls (SAT/UNSAT): 4809(3053/1756)
May 21, 2018 3:01:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(171/536) took 213066 ms. Total solver calls (SAT/UNSAT): 5110(3246/1864)
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 21, 2018 3:01:24 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 216159ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-48b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-48b.tgz
mv AutoFlight-PT-48b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is AutoFlight-PT-48b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r020-qhx1-152646244500174"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;