About the Execution of ITS-Tools for Angiogenesis-PT-20
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15749.890 | 230361.00 | 461142.00 | 896.20 | T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.......................................................
/home/mcc/execution
total 212K
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.4K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 109 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 347 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 33K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Angiogenesis-PT-20, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r020-qhx1-152646244300034
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Angiogenesis-PT-20-ReachabilityDeadlock-0
=== Now, execution of the tool begins
BK_START 1526842117374
Flatten gal took : 82 ms
Constant places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 38 transition count 64
Performed 1 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 1 with 1 Pre rules applied. Total rules applied 1 place count 38 transition count 63
Constant places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 36 transition count 63
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 10 places and 0 transitions.
Iterating post reduction 2 with 10 rules applied. Total rules applied 13 place count 26 transition count 53
Performed 5 Post agglomeration using F-continuation condition.
Constant places removed 5 places and 0 transitions.
Iterating post reduction 3 with 5 rules applied. Total rules applied 18 place count 21 transition count 59
Applied a total of 18 rules in 25 ms. Remains 21 /39 variables (removed 18) and now considering 59/64 (removed 5) transitions.
Normalized transition count is 38
// Phase 1: matrix 38 rows 21 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
its-ctl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 38
// Phase 1: matrix 38 rows 21 cols
invariant :-1'Gab1 + -1'GP3 + -1'GStarP3 + KdStar + KdStarGStarP3kStar + KdStarGStarP3kStarP3 + KdStarGStarPgStar + KdStarGStarPgStarP3 + 2'KdStarPgStar + P3k + Pg = 40
invariant :Gab1 + GP3 + GStarP3 + KdStarGStar + KdStarGStarP3 + -1'KdStarPgStar + -1'P3k + -1'Pg = -20
invariant :DAG + -1'Gab1 + -1'KdStarGStar + -1'KdStarGStarP3kStar + -1'KdStarGStarPgStar + Pip2 + Pip3 + PtP2 = 0
invariant :Pten + PtP2 = 20
invariant :GStarP3kP3 + KdStarGStarP3kStar + KdStarGStarP3kStarP3 + P3k = 20
invariant :GStarPgP3 + KdStarGStarPgStar + KdStarGStarPgStarP3 + KdStarPgStar + Pg = 20
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2019 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 253 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,1.06181e+12,145.07,1062828,2,158943,5,6.79825e+06,6,0,144,7.03565e+06,0
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,441,223.005,1062828,2,302,7,6.79825e+06,9,1,1037,7.03565e+06,2
System contains 441 deadlocks (shown below if less than --print-limit option) !
FORMULA Angiogenesis-PT-20-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
[ 441 states ] showing 10 first states
[ KdStarGStarPgStarP3=20 P3k=20 Pten=20 ]
[ KdStarGStarPgStarP3=20 P3k=20 Akt=1 Pten=20 ]
[ KdStarGStarPgStarP3=20 P3k=20 Akt=2 Pten=20 ]
[ KdStarGStarPgStarP3=20 P3k=20 Akt=3 Pten=20 ]
[ KdStarGStarPgStarP3=20 P3k=20 Akt=4 Pten=20 ]
[ KdStarGStarPgStarP3=20 P3k=20 Akt=5 Pten=20 ]
[ KdStarGStarPgStarP3=20 P3k=20 Akt=6 Pten=20 ]
[ KdStarGStarPgStarP3=20 P3k=20 Akt=7 Pten=20 ]
[ KdStarGStarPgStarP3=20 P3k=20 Akt=8 Pten=20 ]
[ KdStarGStarPgStarP3=20 P3k=20 Akt=9 Pten=20 ]
ITS tools runner thread asked to quit. Dying gracefully.
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1526842347735
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 20, 2018 6:48:40 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 20, 2018 6:48:40 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 20, 2018 6:48:40 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 59 ms
May 20, 2018 6:48:40 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 39 places.
May 20, 2018 6:48:41 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 64 transitions.
May 20, 2018 6:48:41 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 116 ms
May 20, 2018 6:48:41 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 76 ms
May 20, 2018 6:48:41 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 4 ms
May 20, 2018 6:48:41 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 64 transitions.
May 20, 2018 6:48:41 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 3 ms
May 20, 2018 6:48:41 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 59 transitions.
May 20, 2018 6:48:42 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 6 place invariants in 10 ms
May 20, 2018 6:48:42 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 21 variables to be positive in 141 ms
May 20, 2018 6:48:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 59 transitions.
May 20, 2018 6:48:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/59 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 20, 2018 6:48:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 3 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 20, 2018 6:48:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 59 transitions.
May 20, 2018 6:48:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 7 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 20, 2018 6:48:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 59 transitions.
May 20, 2018 6:48:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/59) took 3023 ms. Total solver calls (SAT/UNSAT): 881(881/0)
May 20, 2018 6:48:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 5178 ms. Total solver calls (SAT/UNSAT): 1367(1367/0)
May 20, 2018 6:48:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 59 transitions.
May 20, 2018 6:48:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 2007 ms. Total solver calls (SAT/UNSAT): 394(0/394)
May 20, 2018 6:48:49 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 7556ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Angiogenesis-PT-20"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/Angiogenesis-PT-20.tgz
mv Angiogenesis-PT-20 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Angiogenesis-PT-20, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r020-qhx1-152646244300034"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;