Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...............................
/home/mcc/execution
total 240K
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.4K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 110 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 348 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_pt
-rw-r--r-- 1 mcc users 5 May 15 18:49 instance
-rw-r--r-- 1 mcc users 5 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 67K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool tapaal
Input is AirplaneLD-COL-0200, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r012-qhx2-152646142600039
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-00
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-01
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-02
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-03
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-04
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-05
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-06
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-07
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-08
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-09
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-10
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-11
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-12
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-13
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-14
FORMULA_NAME AirplaneLD-COL-0200-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1528629939736

tapaal
---> tapaal --- TAPAAL
Total timeout: 3590
Time left: 3590

*************************************
* TAPAAL verifying CTLFireability *
*************************************
/home/mcc/tmp
/home/mcc/tmp/tmp.tkOyr4K9V8
/home/mcc/tmp/tmp.r2wuuJHXYw
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)


Unable to decide if AirplaneLD-COL-0200-CTLFireability-09 is satisfied.

Query is MAYBE satisfied.
Time left: 3589
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
/home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --write-simplified /home/mcc/tmp/tmp.tkOyr4K9V8 --write-reduced /home/mcc/tmp/tmp.r2wuuJHXYw -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml












FORMULA AirplaneLD-COL-0200-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX UNFOLDING_TO_PT
Query index 2 was solved

Query is NOT satisfied.
Solution found by parallel simplification (step 0)
Time left: 2792

---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (15 in total)
Each query is verified by 4 parallel strategies for 299 seconds
------------------- QUERY 1 ----------------------
Solution found by parallel processing (step 1)





Query index 0 was solved

Query is satisfied.

@@@0.82,8564@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BestFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 1 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT EXPLICIT STATE_COMPRESSION STUBBORN_SETS
Time left: 2791
------------------- QUERY 2 ----------------------
Solution found by parallel processing (step 1)






Query index 0 was solved
Query is satisfied.

@@@0.61,92248@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 2 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2790
------------------- QUERY 3 ----------------------
Solution found by parallel processing (step 1)






Query index 0 was solved
Query is satisfied.

@@@15.24,116964@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 3 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2774
------------------- QUERY 4 ----------------------
No solution found




terminate called after throwing an instance of 'std::bad_alloc'
what(): std::bad_alloc
Command terminated by signal 6
@@@296.05,3918556@@@


Time left: 2471
------------------- QUERY 5 ----------------------
Solution found by parallel processing (step 1)






Query index 0 was solved
Query is satisfied.

@@@1.04,92144@@@


Query index 0 was solved
Query is satisfied.

parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 5 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2469
------------------- QUERY 6 ----------------------
Solution found by parallel processing (step 1)






Query index 0 was solved
Query is NOT satisfied.

@@@0.93,92172@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 6 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2468
------------------- QUERY 7 ----------------------
No solution found



Time left: 2166
------------------- QUERY 8 ----------------------
Solution found by parallel processing (step 1)






Query index 0 was solved
Query is NOT satisfied.

@@@0.97,92296@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 8 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2165
------------------- QUERY 9 ----------------------
Solution found by parallel processing (step 1)






Query index 0 was solved
Query is NOT satisfied.

@@@0.96,92220@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BestFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 9 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2163
------------------- QUERY 10 ----------------------
Solution found by parallel processing (step 1)






Query index 0 was solved
Query is satisfied.

@@@2.52,100900@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 10 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2160
------------------- QUERY 11 ----------------------
Solution found by parallel processing (step 1)






Query index 0 was solved
Query is NOT satisfied.

@@@1.10,92432@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 11 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2159
------------------- QUERY 12 ----------------------
Solution found by parallel processing (step 1)






Query index 0 was solved
Query is NOT satisfied.

@@@0.41,92232@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 12 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2158
------------------- QUERY 13 ----------------------
Solution found by parallel processing (step 1)






Query index 0 was solved
Query is NOT satisfied.

@@@0.44,92124@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 13 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2157
------------------- QUERY 14 ----------------------
Solution found by parallel processing (step 1)






Query index 0 was solved
Query is satisfied.

@@@0.46,92096@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 14 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2156
------------------- QUERY 15 ----------------------
Solution found by parallel processing (step 1)






Query index 0 was solved
Query is NOT satisfied.



Query index 0 was solved
Query is NOT satisfied.



Query index 0 was solved
Query is NOT satisfied.



Query index 0 was solved
Query is NOT satisfied.

@@@0.71,92264@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/tmp/tmp.r2wuuJHXYw /home/mcc/tmp/tmp.tkOyr4K9V8 --binary-query-io 1 -x 15 -n

FORMULA AirplaneLD-COL-0200-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2155
---------------------------------------------------
Step 2: Sequential processing
---------------------------------------------------
Remaining 2 queries are verified sequentially.
Each query is verified for a dynamic timeout (at least 598 seconds)
Time left: 2155
------------------- QUERY 4 ----------------------
Running query 4 for 1077 seconds. Remaining: 2 queries and 2155 seconds

No solution found
Time left: 1232
------------------- QUERY 7 ----------------------
Running query 7 for 1232 seconds. Remaining: 1 queries and 1232 seconds

No solution found
Time left: -2
Out of time, terminating!

BK_STOP 1528633531191

--------------------
content from stderr:

Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-15
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-14
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-13
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-12
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-11
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-10
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-08
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-07
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-06
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-05
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-04
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-03
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-02
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-01
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping AirplaneLD-COL-0200-CTLFireability-00
terminate called after throwing an instance of 'std::bad_alloc'
what(): std::bad_alloc
Command terminated by signal 6
"@@@923.13,14851252@@@"
Command exited with non-zero status 124
"@@@1233.71,11966048@@@"

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0200"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="tapaal"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0200.tgz
mv AirplaneLD-COL-0200 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool tapaal"
echo " Input is AirplaneLD-COL-0200, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r012-qhx2-152646142600039"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;