About the Execution of LoLA for ARMCacheCoherence-PT-none
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
578.110 | 415962.00 | 767934.00 | 3900.60 | FTFTFFFTFFFFFTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.............................................................................................................................................................
/home/mcc/execution
total 14M
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.4K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 14M May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool lola
Input is ARMCacheCoherence-PT-none, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r004-qhx2-152646133700005
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-00
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-01
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-02
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-03
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-04
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-05
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-06
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-07
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-08
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-09
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-10
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-11
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-12
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-13
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-14
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1526558664952
info: Time: 3600 - MCC
===========================================================================================
prep: translating ARMCacheCoherence-PT-none Petri net model.pnml into LoLA format
===========================================================================================
prep: translating PT Petri net complete
prep: net is already safe
prep: check for too many tokens
===========================================================================================
prep: translating ARMCacheCoherence-PT-none formula ReachabilityCardinality into LoLA format
===========================================================================================
prep: translating PT formula complete
vrfy: Checking ReachabilityCardinality @ ARMCacheCoherence-PT-none @ 3567 seconds
lola: LoLA will run for 3567 seconds at most (--timelimit)
lola: NET
lola: reading net from model.pnml.lola
lola: finished parsing
lola: closed net file model.pnml.lola
lola: 33763/65536 symbol table entries, 18925 collisions
lola: preprocessing...
lola: Size of bit vector: 87
lola: finding significant places
lola: 87 places, 33676 transitions, 75 significant places
lola: computing forward-conflicting sets
lola: computing back-conflicting sets
lola: 1209 transition conflict sets
lola: TASK
lola: reading formula from ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: LP says that atomic proposition is always false: (3 <= p12)
lola: LP says that atomic proposition is always false: (3 <= p17)
lola: LP says that atomic proposition is always false: (3 <= p76)
lola: LP says that atomic proposition is always false: (3 <= p44)
lola: LP says that atomic proposition is always false: (2 <= p80)
lola: LP says that atomic proposition is always false: (3 <= p52)
lola: LP says that atomic proposition is always false: (2 <= p31)
lola: LP says that atomic proposition is always false: (3 <= p62)
lola: LP says that atomic proposition is always false: (2 <= p15)
lola: LP says that atomic proposition is always false: (3 <= p65)
lola: LP says that atomic proposition is always false: (3 <= p57)
lola: LP says that atomic proposition is always false: (2 <= p50)
lola: LP says that atomic proposition is always false: (3 <= p82)
lola: LP says that atomic proposition is always false: (3 <= p7)
lola: LP says that atomic proposition is always false: (2 <= p0)
lola: LP says that atomic proposition is always false: (3 <= p22)
lola: LP says that atomic proposition is always false: (3 <= p21)
lola: LP says that atomic proposition is always false: (3 <= p51)
lola: E (F (FALSE)) : A (G (())) : E (F (FALSE)) : E (F ((((p17 + 1 <= p27) OR (p65 + 1 <= p7))))) : E (F (())) : A (G (((p33 <= p41) OR ((p75 <= 0) AND ((p30 <= p2) OR (1 <= p29)))))) : E (F (FALSE)) : A (G (TRUE)) : A (G (((p41 <= p49) OR (p16 <= p52) OR (p5 <= 0) OR ((p66 + 1 <= p71))))) : E (F (FALSE)) : E (F (FALSE)) : E (F (())) : E (F (FALSE)) : A (G (())) : A (G (TRUE)) : A (G (()))
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:157
lola: rewrite Frontend/Parser/formula_rewrite.k:148
lola: rewrite Frontend/Parser/formula_rewrite.k:100
lola: rewrite Frontend/Parser/formula_rewrite.k:160
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:157
lola: rewrite Frontend/Parser/formula_rewrite.k:148
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:157
lola: rewrite Frontend/Parser/formula_rewrite.k:148
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:157
lola: rewrite Frontend/Parser/formula_rewrite.k:148
lola: rewrite Frontend/Parser/formula_rewrite.k:100
lola: rewrite Frontend/Parser/formula_rewrite.k:160
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:157
lola: rewrite Frontend/Parser/formula_rewrite.k:148
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:157
lola: rewrite Frontend/Parser/formula_rewrite.k:148
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:157
lola: rewrite Frontend/Parser/formula_rewrite.k:148
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:157
lola: rewrite Frontend/Parser/formula_rewrite.k:148
lola: rewrite Frontend/Parser/formula_rewrite.k:100
lola: rewrite Frontend/Parser/formula_rewrite.k:160
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:100
lola: rewrite Frontend/Parser/formula_rewrite.k:160
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:100
lola: rewrite Frontend/Parser/formula_rewrite.k:160
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 220 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FALSE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FALSE
lola: processed formula length: 5
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-0 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 1 will run for 235 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: TRUE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: TRUE
lola: processed formula length: 4
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: preprocessing
lola: The net satisfies the property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-1 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 2 will run for 252 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FALSE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FALSE
lola: processed formula length: 5
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-2 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: ========================================
lola: subprocess 3 will run for 271 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FALSE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FALSE
lola: processed formula length: 5
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-4 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 4 will run for 294 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FALSE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FALSE
lola: processed formula length: 5
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-6 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 5 will run for 321 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: TRUE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: TRUE
lola: processed formula length: 4
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: preprocessing
lola: The net satisfies the property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-7 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 6 will run for 353 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FALSE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FALSE
lola: processed formula length: 5
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-9 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 7 will run for 392 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FALSE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FALSE
lola: processed formula length: 5
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 8 will run for 441 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FALSE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FALSE
lola: processed formula length: 5
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 9 will run for 504 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FALSE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FALSE
lola: processed formula length: 5
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 10 will run for 588 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: TRUE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: TRUE
lola: processed formula length: 4
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: preprocessing
lola: The net satisfies the property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 11 will run for 706 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: TRUE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: TRUE
lola: processed formula length: 4
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: preprocessing
lola: The net satisfies the property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 12 will run for 882 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: TRUE
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: TRUE
lola: processed formula length: 4
lola: 39 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: preprocessing
lola: The net satisfies the property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 13 will run for 1177 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F ((((p17 + 1 <= p27) OR (p65 + 1 <= p7)))))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: processed formula: E (F ((((p17 + 1 <= p27) OR (p65 + 1 <= p7)))))
lola: processed formula length: 48
lola: 40 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:625
lola: formula 0: (((p17 + 1 <= p27) OR (p65 + 1 <= p7)))
lola: state equation: Generated DNF with 2 literals and 2 conjunctive subformulas
lola: state equation: write sara problem file to ARMCacheCoherence-PT-none-ReachabilityCardinality-13-0.sara
lola: state equation: calling and running sara
sara: try reading problem file ARMCacheCoherence-PT-none-ReachabilityCardinality-13-0.sara.
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: The predicate is reachable.
lola: 8 markings, 7 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-3 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 14 will run for 1765 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (G (((p33 <= p41) OR ((p75 <= 0) AND ((p30 <= p2) OR (1 <= p29))))))
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: processed formula: A (G (((p33 <= p41) OR ((p75 <= 0) AND ((p30 <= p2) OR (1 <= p29))))))
lola: processed formula length: 72
lola: 41 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: formula 0: ((p41 + 1 <= p33) AND ((1 <= p75) OR ((p2 + 1 <= p30) AND (p29 <= 0))))
lola: state equation: Generated DNF with 5 literals and 2 conjunctive subformulas
lola: state equation: write sara problem file to ARMCacheCoherence-PT-none-ReachabilityCardinality-14-0.sara
lola: state equation: calling and running sara
sara: try reading problem file ARMCacheCoherence-PT-none-ReachabilityCardinality-14-0.sara.
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 15 markings, 14 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-5 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 15 will run for 3528 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (G (((p41 <= p49) OR (p16 <= p52) OR (p5 <= 0) OR ((p66 + 1 <= p71)))))
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: processed formula: A (G (((p41 <= p49) OR (p16 <= p52) OR (p5 <= 0) OR ((p66 + 1 <= p71)))))
lola: processed formula length: 76
lola: 41 rewrites
lola: closed formula file ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: formula 0: ((p49 + 1 <= p41) AND (p52 + 1 <= p16) AND (1 <= p5) AND ((p71 <= p66)))
lola: state equation: Generated DNF with 4 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to ARMCacheCoherence-PT-none-ReachabilityCardinality-15-0.sara
lola: state equation: calling and running sara
sara: try reading problem file ARMCacheCoherence-PT-none-ReachabilityCardinality-15-0.sara.
lola: sara is running 0 secs || 35 markings, 68 edges, 7 markings/sec, 0 secs
lola: sara is running 5 secs || 72 markings, 126 edges, 7 markings/sec, 5 secs
lola: sara is running 10 secs || 117 markings, 208 edges, 9 markings/sec, 10 secs
lola: sara is running 15 secs || 157 markings, 443 edges, 8 markings/sec, 15 secs
lola: sara is running 20 secs || 192 markings, 712 edges, 7 markings/sec, 20 secs
lola: sara is running 25 secs || 236 markings, 850 edges, 9 markings/sec, 25 secs
lola: sara is running 30 secs || 277 markings, 974 edges, 8 markings/sec, 30 secs
lola: sara is running 35 secs || 310 markings, 1122 edges, 7 markings/sec, 35 secs
lola: sara is running 40 secs || 346 markings, 1259 edges, 7 markings/sec, 40 secs
lola: sara is running 45 secs || 384 markings, 1435 edges, 8 markings/sec, 45 secs
lola: sara is running 50 secs || 418 markings, 1776 edges, 7 markings/sec, 50 secs
lola: sara is running 55 secs || 465 markings, 2007 edges, 9 markings/sec, 55 secs
lola: sara is running 60 secs || 508 markings, 2095 edges, 9 markings/sec, 60 secs
lola: sara is running 65 secs || 557 markings, 2273 edges, 10 markings/sec, 65 secs
lola: sara is running 70 secs || 601 markings, 2555 edges, 9 markings/sec, 70 secs
lola: sara is running 75 secs || 638 markings, 3091 edges, 7 markings/sec, 75 secs
lola: sara is running 80 secs || 673 markings, 3292 edges, 7 markings/sec, 80 secs
lola: sara is running 85 secs || 714 markings, 3687 edges, 8 markings/sec, 85 secs
lola: sara is running 90 secs || 752 markings, 3873 edges, 8 markings/sec, 90 secs
lola: sara is running 95 secs || 792 markings, 4405 edges, 8 markings/sec, 95 secs
lola: sara is running 100 secs || 826 markings, 4576 edges, 7 markings/sec, 100 secs
lola: sara is running 105 secs || 854 markings, 5114 edges, 6 markings/sec, 105 secs
lola: sara is running 110 secs || 887 markings, 5514 edges, 7 markings/sec, 110 secs
lola: sara is running 115 secs || 919 markings, 5970 edges, 6 markings/sec, 115 secs
lola: sara is running 120 secs || 953 markings, 6526 edges, 7 markings/sec, 120 secs
lola: sara is running 125 secs || 986 markings, 7067 edges, 7 markings/sec, 125 secs
lola: sara is running 130 secs || 1023 markings, 7378 edges, 7 markings/sec, 130 secs
lola: sara is running 135 secs || 1055 markings, 7687 edges, 6 markings/sec, 135 secs
lola: sara is running 140 secs || 1088 markings, 8008 edges, 7 markings/sec, 140 secs
lola: sara is running 145 secs || 1124 markings, 8234 edges, 7 markings/sec, 145 secs
lola: sara is running 150 secs || 1161 markings, 8406 edges, 7 markings/sec, 150 secs
lola: sara is running 155 secs || 1204 markings, 8831 edges, 9 markings/sec, 155 secs
lola: sara is running 160 secs || 1233 markings, 9038 edges, 6 markings/sec, 160 secs
lola: sara is running 165 secs || 1267 markings, 9155 edges, 7 markings/sec, 165 secs
lola: sara is running 170 secs || 1305 markings, 9684 edges, 8 markings/sec, 170 secs
lola: sara is running 175 secs || 1336 markings, 9848 edges, 6 markings/sec, 175 secs
lola: sara is running 180 secs || 1369 markings, 10233 edges, 7 markings/sec, 180 secs
lola: sara is running 185 secs || 1405 markings, 10609 edges, 7 markings/sec, 185 secs
lola: sara is running 190 secs || 1444 markings, 10946 edges, 8 markings/sec, 190 secs
lola: sara is running 195 secs || 1482 markings, 11323 edges, 8 markings/sec, 195 secs
lola: sara is running 200 secs || 1512 markings, 11677 edges, 6 markings/sec, 200 secs
lola: sara is running 205 secs || 1548 markings, 12112 edges, 7 markings/sec, 205 secs
lola: sara is running 210 secs || 1580 markings, 12507 edges, 6 markings/sec, 210 secs
lola: sara is running 215 secs || 1611 markings, 12714 edges, 6 markings/sec, 215 secs
lola: sara is running 220 secs || 1649 markings, 13126 edges, 8 markings/sec, 220 secs
lola: sara is running 225 secs || 1677 markings, 13736 edges, 6 markings/sec, 225 secs
lola: sara is running 230 secs || 1712 markings, 14061 edges, 7 markings/sec, 230 secs
lola: sara is running 235 secs || 1760 markings, 14314 edges, 10 markings/sec, 235 secs
lola: sara is running 240 secs || 1804 markings, 14626 edges, 9 markings/sec, 240 secs
lola: sara is running 245 secs || 1855 markings, 14875 edges, 10 markings/sec, 245 secs
lola: sara is running 250 secs || 1903 markings, 15237 edges, 10 markings/sec, 250 secs
lola: sara is running 255 secs || 1952 markings, 15645 edges, 10 markings/sec, 255 secs
lola: sara is running 260 secs || 2013 markings, 15740 edges, 12 markings/sec, 260 secs
lola: sara is running 265 secs || 2056 markings, 15971 edges, 9 markings/sec, 265 secs
lola: sara is running 270 secs || 2086 markings, 16493 edges, 6 markings/sec, 270 secs
lola: sara is running 275 secs || 2120 markings, 16805 edges, 7 markings/sec, 275 secs
lola: sara is running 280 secs || 2150 markings, 17155 edges, 6 markings/sec, 280 secs
lola: sara is running 285 secs || 2184 markings, 17504 edges, 7 markings/sec, 285 secs
lola: sara is running 290 secs || 2220 markings, 17858 edges, 7 markings/sec, 290 secs
lola: sara is running 295 secs || 2255 markings, 18045 edges, 7 markings/sec, 295 secs
lola: sara is running 300 secs || 2286 markings, 18291 edges, 6 markings/sec, 300 secs
lola: sara is running 305 secs || 2322 markings, 18612 edges, 7 markings/sec, 305 secs
lola: sara is running 310 secs || 2356 markings, 18843 edges, 7 markings/sec, 310 secs
lola: sara is running 315 secs || 2397 markings, 19477 edges, 8 markings/sec, 315 secs
lola: sara is running 320 secs || 2432 markings, 19774 edges, 7 markings/sec, 320 secs
lola: sara is running 325 secs || 2466 markings, 20133 edges, 7 markings/sec, 325 secs
lola: sara is running 330 secs || 2500 markings, 20498 edges, 7 markings/sec, 330 secs
lola: sara is running 335 secs || 2537 markings, 20905 edges, 7 markings/sec, 335 secs
lola: sara is running 340 secs || 2570 markings, 21299 edges, 7 markings/sec, 340 secs
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 2591 markings, 21702 edges
lola: ========================================
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-8 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: RESULT
lola:
SUMMARY: no yes no yes no no no yes no no no no no yes yes yes
lola:
preliminary result: no yes no yes no no no yes no no no no no yes yes yes
lola: memory consumption: 153536 KB
lola: time consumption: 387 seconds
BK_STOP 1526559080914
--------------------
content from stderr:
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool lola"
echo " Input is ARMCacheCoherence-PT-none, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r004-qhx2-152646133700005"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;