fond
Model Checking Contest @ Petri Nets 2017
7th edition, Zaragoza, Spain, June 27, 2017
Execution of r120-blw7-149441651800076
Last Updated
June 27, 2017

About the Execution of ITS-Tools for S_IBM703-PT-none

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
445.810 8204.00 10424.00 103.00 FFFTTFTFFFFTFTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......
=====================================================================
Generated by BenchKit 2-3254
Executing tool itstools
Input is S_IBM703-PT-none, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r120-blw7-149441651800076
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME IBM703-PT-none-CTLFireability-0
FORMULA_NAME IBM703-PT-none-CTLFireability-1
FORMULA_NAME IBM703-PT-none-CTLFireability-10
FORMULA_NAME IBM703-PT-none-CTLFireability-11
FORMULA_NAME IBM703-PT-none-CTLFireability-12
FORMULA_NAME IBM703-PT-none-CTLFireability-13
FORMULA_NAME IBM703-PT-none-CTLFireability-14
FORMULA_NAME IBM703-PT-none-CTLFireability-15
FORMULA_NAME IBM703-PT-none-CTLFireability-2
FORMULA_NAME IBM703-PT-none-CTLFireability-3
FORMULA_NAME IBM703-PT-none-CTLFireability-4
FORMULA_NAME IBM703-PT-none-CTLFireability-5
FORMULA_NAME IBM703-PT-none-CTLFireability-6
FORMULA_NAME IBM703-PT-none-CTLFireability-7
FORMULA_NAME IBM703-PT-none-CTLFireability-8
FORMULA_NAME IBM703-PT-none-CTLFireability-9

=== Now, execution of the tool begins

BK_START 1496414088365


its-ctl command run as :

/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,8370,0.089665,7192,2,1236,5,7248,6,0,1316,7571,0


Converting to forward existential form...Done !
original formula: (AF(EX((merge_s00000446_input_s00000285>=1 + task_s00000747_inputCriterion_s00000257_used>=1))) + EX(((decision_s00000784_input_s00000263>=1 * (task_s00000738_output_s00000264>=1 + task_s00000730_input_s00000263>=1)) + EX(decision_s00000777_activated>=1))))
=> equivalent forward existential formula: [FwdG((Init * !(EX(((decision_s00000784_input_s00000263>=1 * (task_s00000738_output_s00000264>=1 + task_s00000730_input_s00000263>=1)) + EX(decision_s00000777_activated>=1))))),!(EX((merge_s00000446_input_s00000285>=1 + task_s00000747_inputCriterion_s00000257_used>=1))))] = FALSE
(forward)formula 0,0,2.02338,80204,1,0,691,301209,598,443,6747,388650,875
FORMULA IBM703-PT-none-CTLFireability-0 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: (AF((decision_s00000801_activated>=1 * !(task_s00000756_inputCriterion_s00000257_used>=1))) + task_s00000757_inputCriterion_s00000257_used>=1)
=> equivalent forward existential formula: [FwdG((Init * !(task_s00000757_inputCriterion_s00000257_used>=1)),!((decision_s00000801_activated>=1 * !(task_s00000756_inputCriterion_s00000257_used>=1))))] = FALSE
Hit Full ! (commute/partial/dont) 279/0/5
(forward)formula 1,0,2.0753,81792,1,0,693,303830,612,446,7259,395524,879
FORMULA IBM703-PT-none-CTLFireability-1 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: A(!((task_s00000729_output_s00000264>=1 * merge_s00000458_input_s00000263>=1)) U (((task_s00000721_inputCriterion_s00000257_used>=1 * merge_s00000458_input_s00000285>=1) + (decision_s00000783_activated>=1 + task_s00000751_inputCriterion_s00000257_used>=1)) + decision_s00000802_input_s00000263>=1))
=> equivalent forward existential formula: [((Init * !(EG(!((((task_s00000721_inputCriterion_s00000257_used>=1 * merge_s00000458_input_s00000285>=1) + (decision_s00000783_activated>=1 + task_s00000751_inputCriterion_s00000257_used>=1)) + decision_s00000802_input_s00000263>=1))))) * !(E(!((((task_s00000721_inputCriterion_s00000257_used>=1 * merge_s00000458_input_s00000285>=1) + (decision_s00000783_activated>=1 + task_s00000751_inputCriterion_s00000257_used>=1)) + decision_s00000802_input_s00000263>=1)) U (!(!((task_s00000729_output_s00000264>=1 * merge_s00000458_input_s00000263>=1))) * !((((task_s00000721_inputCriterion_s00000257_used>=1 * merge_s00000458_input_s00000285>=1) + (decision_s00000783_activated>=1 + task_s00000751_inputCriterion_s00000257_used>=1)) + decision_s00000802_input_s00000263>=1))))))] != FALSE
(forward)formula 2,0,3.5748,131500,1,0,972,660294,632,592,7280,664647,1199
FORMULA IBM703-PT-none-CTLFireability-2 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: AG(EF(EX(task_s00000745_output_s00000264>=1)))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U EX(task_s00000745_output_s00000264>=1))))] = FALSE
(forward)formula 3,0,3.66741,134980,1,0,983,682406,638,599,7752,674195,1219
FORMULA IBM703-PT-none-CTLFireability-3 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EF((AG((callToProcess_s00000808_inputCriterion_s00000257_used>=1 + decision_s00000793_input_s00000263>=1)) * !((!(task_s00000722_input_s00000263>=1) * !(merge_s00000455_input_s00000263>=1)))))
=> equivalent forward existential formula: [((FwdU(Init,TRUE) * !((!(task_s00000722_input_s00000263>=1) * !(merge_s00000455_input_s00000263>=1)))) * !(E(TRUE U !((callToProcess_s00000808_inputCriterion_s00000257_used>=1 + decision_s00000793_input_s00000263>=1)))))] != FALSE
(forward)formula 4,0,3.72158,137148,1,0,985,696789,642,600,7756,682196,1225
FORMULA IBM703-PT-none-CTLFireability-4 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: AF(EG(!((decision_s00000789_activated>=1 + decision_s00000784_input_s00000263>=1))))
=> equivalent forward existential formula: [FwdG(Init,!(EG(!((decision_s00000789_activated>=1 + decision_s00000784_input_s00000263>=1)))))] = FALSE
dead was empty
(forward)formula 5,1,4.03869,147968,1,0,1241,776495,648,745,7760,751721,1540
FORMULA IBM703-PT-none-CTLFireability-5 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: (task_s00000711_output_s00000264>=1 + E(((task_s00000739_output_s00000264>=1 + decision_s00000777_activated>=1) + (task_s00000705_inputCriterion_s00000257_used>=1 + merge_s00000446_activated>=1)) U AF(merge_s00000456_input_s00000263>=1)))
=> equivalent forward existential formula: ([(Init * task_s00000711_output_s00000264>=1)] != FALSE + [(FwdU(Init,((task_s00000739_output_s00000264>=1 + decision_s00000777_activated>=1) + (task_s00000705_inputCriterion_s00000257_used>=1 + merge_s00000446_activated>=1))) * !(EG(!(merge_s00000456_input_s00000263>=1))))] != FALSE)
Hit Full ! (commute/partial/dont) 272/0/12
(forward)formula 6,0,4.58418,158508,1,0,1403,845773,666,831,7776,807545,1795
FORMULA IBM703-PT-none-CTLFireability-6 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: !(EF((((task_s00000723_input_s00000263>=1 * task_s00000747_output_s00000264>=1) + (decision_s00000788_activated>=1 + decision_s00000789_activated>=1)) * task_s00000755_input_s00000263>=1)))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * (((task_s00000723_input_s00000263>=1 * task_s00000747_output_s00000264>=1) + (decision_s00000788_activated>=1 + decision_s00000789_activated>=1)) * task_s00000755_input_s00000263>=1))] = FALSE
(forward)formula 7,1,4.58559,158612,1,0,1403,845946,676,831,7782,807545,1795
FORMULA IBM703-PT-none-CTLFireability-7 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AF(EF(((task_s00000734_inputCriterion_s00000257_used>=1 + task_s00000711_inputCriterion_s00000257_used>=1) * (task_s00000761_input_s00000263>=1 * decision_s00000796_input_s00000263>=1))))
=> equivalent forward existential formula: [FwdG(Init,!(E(TRUE U ((task_s00000734_inputCriterion_s00000257_used>=1 + task_s00000711_inputCriterion_s00000257_used>=1) * (task_s00000761_input_s00000263>=1 * decision_s00000796_input_s00000263>=1)))))] = FALSE
(forward)formula 8,0,4.62758,159772,1,0,1403,847521,686,833,8221,811746,1798
FORMULA IBM703-PT-none-CTLFireability-8 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: !(A(AF(task_s00000742_output_s00000264>=1) U AG(task_s00000737_inputCriterion_s00000257_used>=1)))
=> equivalent forward existential formula: ([(FwdU((FwdU(Init,!(!(E(TRUE U !(task_s00000737_inputCriterion_s00000257_used>=1))))) * !(!(EG(!(task_s00000742_output_s00000264>=1))))),TRUE) * !(task_s00000737_inputCriterion_s00000257_used>=1))] != FALSE + [FwdG(Init,!(!(E(TRUE U !(task_s00000737_inputCriterion_s00000257_used>=1)))))] != FALSE)
(forward)formula 9,1,5.45646,186536,1,0,1568,1.04314e+06,693,919,8223,965978,2075
FORMULA IBM703-PT-none-CTLFireability-9 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AG(AF(AF(decision_s00000796_input_s00000263>=1)))
=> equivalent forward existential formula: [FwdG(FwdU(Init,TRUE),!(!(EG(!(decision_s00000796_input_s00000263>=1)))))] = FALSE
(forward)formula 10,0,5.60337,192004,1,0,1640,1.08404e+06,700,972,8224,996822,2288
FORMULA IBM703-PT-none-CTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EG(!(A(merge_s00000446_input_s00000263>=1 U decision_s00000780_activated>=1)))
=> equivalent forward existential formula: [FwdG(Init,!(!((E(!(decision_s00000780_activated>=1) U (!(merge_s00000446_input_s00000263>=1) * !(decision_s00000780_activated>=1))) + EG(!(decision_s00000780_activated>=1))))))] != FALSE
(forward)formula 11,1,6.28878,221068,1,0,1999,1.25682e+06,712,1218,8228,1.20304e+06,2703
FORMULA IBM703-PT-none-CTLFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EX(!(AF(task_s00000725_output_s00000264>=1)))
=> equivalent forward existential formula: [FwdG(EY(Init),!(task_s00000725_output_s00000264>=1))] != FALSE
Hit Full ! (commute/partial/dont) 282/0/2
(forward)formula 12,1,6.32601,222120,1,0,2001,1.2589e+06,720,1221,8550,1.20728e+06,2706
FORMULA IBM703-PT-none-CTLFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EF(EF(EG(fork_s00000464_input_s00000263>=1)))
=> equivalent forward existential formula: [FwdG(FwdU(FwdU(Init,TRUE),TRUE),fork_s00000464_input_s00000263>=1)] != FALSE
dead was empty
(forward)formula 13,0,6.32646,222408,1,0,2001,1.2589e+06,721,1222,8550,1.2073e+06,2709
FORMULA IBM703-PT-none-CTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: !(EF((((callToProcess_s00000807_output_s00000264>=1 * task_s00000729_inputCriterion_s00000257_used>=1) + merge_s00000462_input_s00000285>=1) * ((task_s00000721_output_s00000264>=1 + decision_s00000768_activated>=1) * !(decision_s00000768_activated>=1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * (((callToProcess_s00000807_output_s00000264>=1 * task_s00000729_inputCriterion_s00000257_used>=1) + merge_s00000462_input_s00000285>=1) * ((task_s00000721_output_s00000264>=1 + decision_s00000768_activated>=1) * !(decision_s00000768_activated>=1))))] = FALSE
(forward)formula 14,1,6.32808,222576,1,0,2001,1.25904e+06,735,1222,8559,1.2073e+06,2709
FORMULA IBM703-PT-none-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AF(((((merge_s00000455_input_s00000290>=1 + task_s00000742_inputCriterion_s00000257_used>=1) * !(merge_s00000446_activated>=1)) * (!(task_s00000725_input_s00000263>=1) * !(task_s00000737_inputCriterion_s00000257_used>=1))) * merge_s00000319_input_s00000263>=1))
=> equivalent forward existential formula: [FwdG(Init,!(((((merge_s00000455_input_s00000290>=1 + task_s00000742_inputCriterion_s00000257_used>=1) * !(merge_s00000446_activated>=1)) * (!(task_s00000725_input_s00000263>=1) * !(task_s00000737_inputCriterion_s00000257_used>=1))) * merge_s00000319_input_s00000263>=1)))] = FALSE
(forward)formula 15,0,6.33157,222580,1,0,2001,1.25971e+06,751,1222,8578,1.20776e+06,2710
FORMULA IBM703-PT-none-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Exit code :0

BK_STOP 1496414096569

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ java -Dosgi.requiredJavaVersion=1.6 -Xss8m -Xms40m -Xmx8192m -Declipse.pde.launch=true -Dfile.encoding=UTF-8 -classpath /home/mcc/BenchKit//eclipse/plugins/org.eclipse.equinox.launcher_1.3.201.v20161025-1711.jar org.eclipse.equinox.launcher.Main -application fr.lip6.move.gal.application.pnmcc -data /home/mcc/BenchKit//workspace -os linux -ws gtk -arch x86_64 -nl en_US -consoleLog -pnfolder /home/mcc/execution -examination CTLFireability -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
Jun 02, 2017 2:34:49 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2017 2:34:49 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 76 ms
Jun 02, 2017 2:34:49 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 262 places.
Jun 02, 2017 2:34:49 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 284 transitions.
Jun 02, 2017 2:34:50 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 45 ms
Jun 02, 2017 2:34:50 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 12 ms
Jun 02, 2017 2:34:50 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 0 ms
Jun 02, 2017 2:34:56 PM fr.lip6.move.gal.itstools.Runner runTool
INFO: Standard error output from running tool CommandLine [args=[/home/mcc/BenchKit/eclipse/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201705302212/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions merge_s00000320_activate_s00000284, merge_s00000320_activate_s00000286, merge_s00000451_activate_s00000284, merge_s00000341_activate_s00000286, merge_s00000451_activate_s00000286, merge_s00000319_activate_s00000284, merge_s00000455_activate_s00000284, merge_s00000453_activate_s00000286, merge_s00000446_activate_s00000284, merge_s00000454_activate_s00000286, merge_s00000319_activate_s00000448, merge_s00000319_activate_s00000286, merge_s00000461_activate_s00000289, merge_s00000455_activate_s00000286, merge_s00000446_activate_s00000286, merge_s00000319_activate_s00000289, merge_s00000455_activate_s00000289, merge_s00000449_activate_s00000286, merge_s00000446_activate_s00000289, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/265/19/284

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="S_IBM703-PT-none"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/S_IBM703-PT-none.tgz
mv S_IBM703-PT-none execution

# this is for BenchKit: explicit launching of the test

cd execution
echo "====================================================================="
echo " Generated by BenchKit 2-3254"
echo " Executing tool itstools"
echo " Input is S_IBM703-PT-none, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r120-blw7-149441651800076"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;